SN65175, SN75175 QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS145B – OCTOBER 1990 – REVISED MAY 1995 D D D D D D D D D D D Meet or Exceed the Requirements of ANSI Standard EIA/TIA-422-B, RS-423-B, and RS-485 Meet ITU Recommendations V.10, V.11, X.26, and X.27 Designed for Multipoint Bus Transmission on Long Bus Lines in Noisy Environments 3-State Outputs Common-Mode Input Voltage Range – 12 V to 12 V Input Sensitivity . . . ± 200 mV Input Hysteresis . . . 50 mV Typ High Input Impedance . . . 12 kΩ Min Operate From Single 5-V Supply Low-Power Requirements Plug-In Replacement for MC3486 D OR N PACKAGE (TOP VIEW) 1B 1A 1Y 1, 2EN 2Y 2A 2B GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 4B 4A 4Y 3, 4EN 3Y 3A 3B description The SN65175 and SN75175 are monolithic quadruple differential line receivers with 3-state outputs. They are designed to meet the requirements of ANSI Standards EIA/TIA-422-B, RS-423-B, and RS-485, and several ITU recommendations. These standards are for balanced multipoint bus transmission at rates up to 10 megabits per second. Each of the two pairs of receivers has a common active-high enable. The receivers feature high input impedance, input hysteresis for increased noise immunity, and input sensitivity of ± 200 mV over a common-mode input voltage range of ± 12 V. The SN65175 and SN75175 are designed for optimum performance when used with the SN75172 or SN75174 quadruple differential line drivers. The SN65175 is characterized for operation from – 40°C to 85°C. The SN75175 is characterized for operation from 0°C to 70°C. FUNCTION TABLE (each receiver) ENABLE OUTPUT Y VID ≥ 0.2 V – 0.2 V < VID < 0.2 V H H H ? VID ≥ – 0.2 V X H L L Z Open circuit H ? DIFFERENTIAL A–B H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off) Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN65175, SN75175 QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS145B – OCTOBER 1990 – REVISED MAY 1995 logic symbol† 1, 2EN 1A 1B 2A 2B logic diagram (positive logic) 4 1, 2EN EN 2 3 1 6 5 7 1Y 1A 1B 3, 4EN 3A 3B 4A 4B 2B EN 10 11 9 14 13 15 2 1 3 1Y 2Y 2A 12 4 3Y 3, 4EN 4Y 3A † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 3B 4A 4B 6 7 5 2Y 12 10 9 14 15 11 13 3Y 4Y schematics of inputs and outputs EQUIVALENT OF EACH A OR B INPUT VCC EQUIVALENT OF EACH ENABLE INPUT VCC 8.3 kΩ NOM 16.8 kΩ NOM 960 Ω NOM 85 Ω NOM VCC Input Input Output 960 Ω NOM 2 TYPICAL OF ALL OUTPUTS POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN65175, SN75175 QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS145B – OCTOBER 1990 – REVISED MAY 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage VI, (A or B inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 25 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 25 V Enable input voltage, VI, EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Low-level output current, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: SN65175 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C SN75175 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential input voltage, are with respect to network ground terminal. 2. Differential-input voltage is measured at the noninverting input with respect to the corresponding inverting input. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR TA = 70°C POWER RATING TA = 85°C POWER RATING D 950 mW 7.6 mW/°C 608 mW 494 mW N 1150 mW 9.2 mW/°C 736 mW 598 mW recommended operating conditions Supply voltage, VCC MIN NOM MAX UNIT 4.75 5 5.25 V Common-mode input voltage, VIC ± 12 V Differential input voltage, VID ± 12 V High-level enable-input voltage, VIH 2 Low-level enable-input voltage, VIL V 0.8 High-level output current, IOH Low-level output current, IOL free air temperature, temperature TA Operating free-air POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V – 400 µA 16 mA SN65175 – 40 85 SN75175 0 70 °C 3 SN65175, SN75175 QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS145B – OCTOBER 1990 – REVISED MAY 1995 electrical characteristics over recommended ranges of common-mode input voltage, supply voltage and operating free-air temperature PARAMETER TEST CONDITIONS VIT+ VIT– Positive-going input threshold voltage Negative-going input threshold voltage VO = 2.7 V, VO = 0.5 V, Vhys VIK Hysteresis voltage (VIT+ – VIT–) See Figure 4 Enable-input clamp voltage VOH High-level output voltage II = – 18 mA VID = 200 mV, IO = – 0.4 mA IO = 16 mA mV VID = – 200 mV, IOZ High-impedance-state output current VO = 0.4 V to 2.4 V Other input at 0 V V, IIH IIL High-level enable-input current VIH = 2.7 V VIL = 0.4 V Low-level enable-input current MAX 0.2 – 0.2‡ IOH = – 400 µA, See Figure 1 See Figure 1 IOL = 8 mA IOL = 16 mA See Note 3 VI = 12 V VI = – 7 V UNIT V V mV – 1.5 Low level output voltage Low-level Line input current TYP† 50 VOL II MIN 2.7 V V 0.45 0.5 ± 20 1 – 0.8 V µA mA 20 µA – 100 µA ri Input resistance 12 kΩ IOS Short-circuit output current§ – 15 – 85 mA ICC Supply current Outputs disabled 70 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold voltage levels only. § Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. NOTE 3: Refer to ANSI Standards EIA/TIA-422-B, RS-423-B, and RS-485 for exact conditions. switching characteristics, VCC = 5 V, CL = 15 pF, TA = 25°C PARAMETER TEST CONDITIONS tPLH tPHL Propagation delay time, low- to high-level output tPZH tPZL Output enable time to high level tPHZ tPLZ Output disable time from high level 4 Propagation delay time, high- to low-level output See Figure 2 See Figure 3 Output enable time to low level See Figure 3 Output disable time from low level POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN TYP MAX UNIT 22 35 ns 25 35 ns 13 30 ns 19 30 ns 26 35 ns 25 35 ns SN65175, SN75175 QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS145B – OCTOBER 1990 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION VID S VOH VOL 2V IOH (–) IOL (+) Figure 1. VOH, VOL Generator (see Note A) Output 50 Ω 3V Input 1.5 V 1.5 V 0V 1.5 V CL = 15 pF (see Note B) tPLH tPHL VOH Output 1.3 V 1.3 V VOL 2V TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and stray capacitance. Figure 2. Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN65175, SN75175 QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS145B – OCTOBER 1990 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION Output SW1 1.5 V 2 kΩ –1.5 V SW2 5V CL (see Note B) Generator (see Note A) See Note C 5 kΩ SW3 51 Ω TEST CIRCUIT 3V Input 3V 1.5 V Input 0V tPZH VOH Output 1.5 V 0V SW1 to 1.5 V SW2 Open SW3 Closed 1.5 V tPZL 4.5 V 1.5 V VOL Output 0V tPZL tPZH 3V Input 3V Input 1.5 V tPHZ Output 0.5 V SW1 to –1.5 V SW2 Closed SW3 Open 3V 1.5 V 0V 0 V SW1 to 1.5 V SW2 Closed SW3 Closed VOH tPLZ 1.4 V Output SW1 to –1.5 V SW2 Closed SW3 Closed 0.5 V VOL 1.4 V tPHZ tPLZ VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tf ≤ 6 ns, tr ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and stray capacitance. C. All diodes are 1N916 or equivalent. Figure 3. Test Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN65175, SN75175 QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS145B – OCTOBER 1990 – REVISED MAY 1995 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 5 5 4.5 IO = 0 TA = 25°C VO – Output Voltage – V 4 VIC = 0 VIC = –12 V 3.5 VIC = 12 V 3 VIT– VIT– VIT– 2.5 VIT+ 2 VIT+ VID = 0.2 V TA = 25°C 4.5 VOH – High-Level Output Voltage – V VCC = 5 V VIT+ 1.5 1 0.5 4 3.5 3 VCC = 5.25 V 2.5 VCC = 5 V 2 1.5 1 VCC = 4.75 V 0.5 0 –125 –100 –75 – 50 – 25 0 25 50 75 100 125 VID – Differential Input Voltage – mV 0 0 – 5 –10 –15 – 20 – 25 – 30 – 35 – 40 – 45 – 50 IOH – High-Level Output Current – mA Figure 4 Figure 5 HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 0.6 5 VOH – High-Level Output Voltage – V 4.5 4 VOL – Low-Level Output Voltage – V VCC = 5 V VID = 0.2 V IOH = – 400 µA 3.5 SN65175 Only 3 2.5 2 1.5 1 VCC = 5 V TA = 25°C VID = – 0.2 V 0.5 0.4 0.3 0.2 0.1 0.5 0 0 0 10 70 20 30 40 50 60 TA – Free-Air Temperature – °C 80 90 0 5 10 15 20 25 30 IOL – Low-Level Output Current – mA Figure 6 Figure 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN65175, SN75175 QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS145B – OCTOBER 1990 – REVISED MAY 1995 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE OUTPUT VOLTAGE vs ENABLE G VOLTAGE 5 VCC = 5 V VID = – 0.2 V IOL = 8 mA 0.4 VID = 0.2 V Load = 8 kΩ to GND TA = 25°C 4 VO – Output Voltage – V VOL – Low-Level Output Voltage – V 0.5 0.3 SN65175 Only 0.2 0.1 VCC = 5.25 V VCC = 4.75 V 3 VCC = 5 V 2 1 0 0 0 10 20 30 40 50 70 60 80 90 0 0.5 1 TA – Free-Air Temperature – °C Figure 8 2 2.5 3 Figure 9 SUPPLY CURRENT (ALL RECEIVERS) vs SUPPLY VOLTAGE OUTPUT VOLTAGE vs ENABLE G VOLTAGE 6 100 VID = –0.2 V Load = 1 kΩ to VCC TA = 25°C 5 No Load Inputs Open TA = 25°C 90 I CC – Supply Current – mA VCC = 5.25 V VO – Output Voltage – V 1.5 Enable G Voltage – V VCC = 4.75 V 4 VCC = 5 V 3 2 80 Outputs Disabled 70 60 50 Outputs Enabled 40 30 20 1 10 0 0 0 0.5 1 1.5 2 2.5 3 0 1 Figure 10 8 2 3 4 5 6 VCC – Supply Voltage – V Enable G Voltage – V Figure 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 8 SN65175, SN75175 QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS145B – OCTOBER 1990 – REVISED MAY 1995 TYPICAL CHARACTERISTICS INPUT CURRENT vs INPUT VOLTAGE 1 VCC = 5 V TA = 25°C I I – Input Current – mA 0.75 0.5 0.25 0 – 0.25 The Unshaded Area Conforms to Figure 3.2 of EIA RS-485 – 0.5 – 0.75 –1 –8 –6 –4 –2 0 2 4 6 8 10 12 VI – Input Voltage – V Figure 12 APPLICATION INFORMATION 1/4 SN75174 1/4 SN75172 RT RT 1/4 SN75173 Up to 32 Driver/Receiver Pairs 1/4 SN75172 1/4 SN75173 1/4 SN75173 1/4 SN75175 1/4 SN75174 NOTE A: The line should be terminated at both ends in its characteristicc impedance (RT = ZO). Stub lengths off the main line should be kept as short as possible. Figure 13. Typical Application Circuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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