TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 10-W STEREO CLASS-D AUDIO POWER AMPLIFIER FEATURES • • • • • • • • DESCRIPTION 10-W/Channel Into an 16-Ω Load From a 17-V Supply Up to 92% Efficient, Class-D Operation Eliminates Need For Heatsinks 8.5-V to 18-V Single-Supply Operation Four Selectable, Fixed Gain Settings Differential Inputs Minimizes Common-Mode Noise Space-Saving, Thermally Enhanced PowerPAD™ Packaging Thermal and Short-Circuit Protection With Auto Recovery Option Pinout Similar to TPA3000D Family The TPA3008D2 is a 10-W (per channel) efficient, class-D audio amplifier for driving bridged-tied stereo speakers. The TPA3008D2 can drive stereo speakers as low as 8 Ω. The high efficiency of the TPA3008D2 eliminates the need for external heatsinks when playing music. The gain of the amplifier is controlled by two gain select pins. The gain selections are 15.3, 21.2, 27.2, and 31.8 dB. The outputs are fully protected against shorts to GND, VCC, and output-to-output shorts. A fault terminal allows short-circuit fault reporting and automatic recovery. Thermal protection ensures that the maximum junction temperature is not exceeded. APPLICATIONS LCD Monitors and TVs All-In-One PCs PVCC 10 µF 10 µF PVCC 220 nF 220 nF Right Differential Inputs BSRP PVCCR ROUTP ROUTP PGNDR ROUTN PGNDR ROUTN 0.1 µF NC RINN 0.47 µF 0.47 µF 0.47 µF 0.47 µF Gain Control 1 µF VCLAMPR SHUTDOWN 0.47 µF Left Differential Inputs PVCCR Shutdown/Mute Control PVCCR BSRN 0.1 µF PVCCR • • NC RINP AVCC V2P5 AVCC LINP NC LINN NC TPA3008D2 AVDDREF 0.1 µF 10 µF AGND NC AVDD GAIN0 COSC GAIN1 ROSC FAULT 1 µF 220 pF 120 kΩ AGND PVCC 0.1 µF 0.1 µF 10 µF 10 µF BSLP PVCCL PVCCL LOUTP LOUTP PGNDL LOUTN LOUTN PVCCL PVCCL BSLN 220 nF PGNDL VCLAMPL NC 1 µF 220 nF PVCC † †Optional output filter for EMI suppression Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004, Texas Instruments Incorporated TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) TPA3008D2 Supply voltage range AVCC, PVCC -0.3 V to 20 V ≥6Ω Load Impedance, RL SHUTDOWN Input voltage range, VI -0.3 V to VCC + 0.3 V GAIN0, GAIN1, RINN, RINP, LINN, LINP -0.3 V to 6 V Continuous total power dissipation See Dissipation Rating Table Operating free–air temperature range, TA - 40°C to 85°C Operating junction temperature range, TJ - 40°C to 150°C Storage temperature range, Tstg - 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds (1) 260°C Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE TA≤ 25°C θJC DERATING FACTOR (1/θJA) TA = 70°C TA = 85°C PHP 4.3 W 1.14 °C/W (1) 34.7 mW/°C (1) 2.7 W 2.2 W (1) Based on a JEDEC high-K PCB with the PowerPAD™ soldered to a thermal land on the printed-circuit board. See the PowerPAD Thermally Enhanced Package application note (SLMA002). The PowerPAD must be soldered to the PCB. RECOMMENDED OPERATING CONDITIONS TA = 25°C (unless otherwise noted) MIN MAX 8.5 18 UNIT Supply voltage, VCC PVCC, AVCC High-level input voltage, VIH SHUTDOWN, GAIN0, GAIN1 Low-level input voltage, VIL SHUTDOWN, GAIN0, GAIN1 0.8 V SHUTDOWN, VI = VCC = 18 V 10 µA GAIN0, GAIN1, VI = 5.5 V, VCC = 18 V 1 µA SHUTDOWN, VI = 0 V, VCC = 18 V 1 µA GAIN0, GAIN1, VI = 5.5 V, VCC = 18 V 1 µA High-level input current, IIH Low-level input current, IIL High-level output voltage, VOH FAULT, IOH = 100 µA Low-level output voltage, VOL FAULT, IOL = -100 µA Oscillator frequency, fOSC Frequency is set by selection of ROSC and COSC (see the Application Information Section). Operating free–air temperature, TA 2 2 V V AVDD - 0.8 V V AGND + 0.8 V V 200 300 kHz -40 85 °C TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 AVAILABLE OPTIONS (1) TA PACKAGED DEVICE 48-PIN HTQFP (PHP) (1) -40°C to 85°C TPA3008D2PHP The PHP package is available taped and reeled. To order a taped and reeled part, add the suffix R to the part number (e.g., TPA3008D2PHPR). DC ELECTRICAL CHARACTERISTICS TA = 25°C, VCC = 12 V, RL = 8 Ω (unless otherwise noted) PARAMETER TEST CONDITIONS |VOO| Class-D output offset voltage (measured differentially) INN and INP connected together, Gain = 31.8 dB V2P5 2.5-V Bias voltage No load AVDD +5-V internal supply voltage IL = 10 mA, SHUTDOWN = 2 V, VCC = 8.5 V to 18 V PSRR Power supply rejection ratio VCC = 11.5 V to 12.5 V ICC Quiescent supply current SHUTDOWN = 2 V, no load ICC(SD) Quiescent supply current in shutdown mode SHUTDOWN = 0 V rDS(on) Drain-source on-state resistance VCC = 12 V, IO = 1 A, TJ = 25°C TYP MAX 2 5 55 2.5 GAIN1 = 0.8 V G MIN Gain GAIN1 = 2 V 4.5 5 mV V 5.5 V 11 22 mA 1.6 25 µA -76 High side 600 Low side 500 Total UNIT dB mΩ 1100 1300 GAIN0 = 0.8 V 14.6 15.3 16.2 GAIN0 = 2 V 20.5 21.2 21.8 GAIN0 = 0.8 V 26.4 27.2 27.8 GAIN0 = 2 V 31.1 31.8 32.5 dB ton Turnon time C(V2P5) = 1 µF, SHUTDOWN = 2 V 16 ms toff Turnoff time C(V2P5) = 1 µF, SHUTDOWN = 0.8 V 60 µs AC ELECTRICAL CHARACTERISTICS TA = 25°C, VCC = 12 V, RL = 8 Ω, (unless otherwise noted) PARAMETER kSVR TEST CONDITIONS Supply voltage rejection ratio 200 mVPP ripple from 20 Hz to 1 kHz, Gain = 15.6 dB, Inputs ac-coupled to GND THD+N = 0.13%, f = 1 kHz, RL = 8 Ω THD+N = 10%, f = 1 kHz, RL = 8 Ω PO Continuous output power MIN TYP -70 MAX UNIT dB 5 8.5 THD+N = 0.16%, f = 1 kHz, RL = 16 Ω, VCC = 17 V 5 THD+N = 10%, f = 1 kHz, RL = 16 Ω, VCC = 17 V 10 W THD+N Total harmonic distortion plus noise PO = 1 W, f = 1 kHz, RL = 8 Ω Vn Output integrated noise floor 20 Hz to 22 kHz, A-weighted filter, Gain = 15.6 dB -80 dB Crosstalk PO = 1 W, RL = 8 Ω, Gain = 15.6 dB, f = 1 kHz -93 dB Signal-to-noise ratio Maximum output at THD+N < 0.5%, f = 1 kHz, Gain = 15.6 dB 97 dB Thermal trip point 150 °C Thermal hystersis 20 °C SNR 0.1% 3 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 FUNCTIONAL BLOCK DIAGRAM V2P5 PVCC V2P5 VClamp Gen VCLAMPR BSRN PVCCR(2) Gate Drive RINN RINP ROUTN(2) Deglitch and PWM Mode Logic Gain Adj. V2P5 PGNDR BSRP PVCCR(2) Gate Drive GAIN0 GAIN1 Gain Control To Gain Adj. Blocks and Start-up Logic 4 PGNDR FAULT V2P5 ROSC Ramp Generator COSC AVDDREF ROUTP(2) SC Detect Biases and References Start-up and Protection Logic Thermal VDDok AVDD VCCok 5-V LDO AVDD PVCC TTL Input Buffer (VCC Compl) SHUTDOWN VDD AVCC AVCC AGND(2) VClamp Gen VCLAMPL BSLN PVCCL(2) Gate Drive V2P5 LINN LINP Gain Adj. Deglitch and PWM Mode Logic LOUTN(2) PGNDL BSLP PVCCL(2) Gate Drive LOUTP(2) PGNDL 4 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 48 47 46 45 44 43 42 41 40 39 38 BSRP PVCCR PVCCR ROUTP ROUTP PGNDR PGNDR ROUTN ROUTN PVCCR PVCCR BSRN PHP PACKAGE (TOP VIEW) 37 SHUTDOWN 1 36 VCLAMPR RINN 2 35 NC RINP 3 34 NC V2P5 4 33 AVCC LINP 5 32 NC LINN 6 31 NC AVDDREF 7 30 AGND NC 8 29 AVDD GAIN0 9 28 COSC GAIN1 10 27 ROSC FAULT 11 26 AGND NC 12 25 VCLAMPL LOUTP BSLP PVCCL PGNDL PVCCL 24 LOUTP 20 21 22 23 PGNDL 18 19 LOUTN 15 16 17 LOUTN PVCCL BSLN 13 14 PVCCL TPA3008D2 5 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 TERMINAL FUNCTIONS PIN NUMBER I/O AGND PIN NAME 26, 30 - Analog ground for digital/analog cells in core AVCC 33 - High-voltage analog power supply, not connected internally to PVCCR or PVCCL AVDD 29 O 5-V Regulated output for use by internal cells and GAIN0, GAIN1 pins only. Not specified for driving other external circuitry. AVDDREF 7 O 5-V Reference output—connect to gain setting resistor or directly to GAIN0, GAIN1. BSLN 13 - Bootstrap I/O for left channel, negative high-side FET BSLP 24 - Bootstrap I/O for left channel, positive high-side FET BSRN 48 - Bootstrap I/O for right channel, negative high-side FET BSRP 37 - Bootstrap I/O for right channel, positive high-side FET COSC 28 I/O I/O for charge/discharging currents onto capacitor for ramp generator. FAULT 11 O Short-circuit detect fault output. FAULT = high, short-circuit detected. FAULT = low, normal operation. Status is reset when power is cycled or SHUTDOWN is cycled. GAIN0 9 I Gain select least significant bit. TTL logic levels with compliance to AVDD. GAIN1 10 I Gain select most significant bit. TTL logic levels with compliance to AVDD. LINN 6 I Negative audio input for left channel LINP 5 I Positive audio input for left channel LOUTN 16, 17 O Class-D 1/2-H-bridge negative output for left channel LOUTP 20, 21 O Class-D 1/2-H-bridge positive output for left channel 8, 12, 31, 32, 34, 35 - No internal connection PGNDL 18, 19 - Power ground for left channel H-bridge PGNDR 42, 43 - Power ground for right channel H-bridge PVCCL 14, 15 - Power supply for left channel H-bridge (internally connected to pins 22 and 23), not connected to PVCCR or AVCC. PVCCL 22, 23 - Power supply for left channel H-bridge (internally connected to pins 14 and 15), not connected to PVCCR or AVCC. PVCCR 38, 39 - Power supply for right channel H-bridge (internally connected to pins 46 and 47), not connected to PVCCL or AVCC. PVCCR 46, 47 - Power supply for right channel H-bridge (internally connected to pins 38 and 39), not connected to PVCCL or AVCC. RINP 3 I Positive audio input for right channel RINN 2 I Negative audio input for right channel NC ROSC DESCRIPTION 27 I/O I/O current setting resistor for ramp generator. ROUTN 44, 45 O Class-D 1/2-H-bridge negative output for right channel ROUTP 40, 41 O Class-D 1/2-H-bridge positive output for right channel SHUTDOWN 1 I Shutdown signal for IC (low = shutdown, high = operational). TTL logic levels with compliance to VCC. VCLAMPL 25 - Internally generated voltage supply for left channel bootstrap capacitors. VCLAMPR 36 - Internally generated voltage supply for right channel bootstrap capacitors. V2P5 4 O 2.5-V Reference for analog cells. Thermal Pad - - Connect to AGND and PGND—should be the center point for both grounds. Internal resistive connection to AGND. 6 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 TYPICAL CHARACTERISTICS TABLE OF GRAPHS FIGURE THD+N Total harmonic distortion + noise vs Frequency THD+N Total harmonic distortion + noise vs Output power 1, 2, 3, 4 5, 6 Closed-loop response VCC 7 Output power vs Supply voltage 8, 9 Efficiency vs Output power 10 Efficiency vs Total output power 11 Supply current vs Total output power 12 Crosstalk vs Frequency 13 kSVR Supply ripple rejection ratio vs Frequency 14 CMRR Commom-mode rejection ratio vs Frequency 15 10 VCC = 12 V, RL = 16 , Gain = 21.6 dB 1 0.1 PO = 2.5 W PO = 1 W 0.01 PO = 0.5 W 0.005 20 100 1k f − Frequency − Hz Figure 1. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY THD+N −Total Harmonic Distortion + Noise − % THD+N −Total Harmonic Distortion + Noise − % TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 10 VCC = 18 V, RL = 16 Gain = 21.6 dB 1 PO = 0.5 W 0.1 PO = 1 W PO = 2.5 W 0.01 10 k 20 k 20 100 1k f − Frequency − Hz 10 k 20 k Figure 2. 7 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 10 THD+N −Total Harmonic Distortion + Noise − % THD+N −Total Harmonic Distortion + Noise − % TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY VCC = 12 V, RL = 8 Gain = 21.6 dB 1 PO = 0.5 W PO = 1 W 0.1 PO = 2.5 W 20 100 1k f − Frequency − Hz 1 PO = 2.5 W 0.1 PO = 1 W 0.01 PO = 5 W 20 10 k 20 k 1k f − Frequency − Hz 10 k 20 k Figure 4. TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 10 VCC = 12 V, RL = 8 , Gain = 21.6 dB THD+N −Total Harmonic Distortion + Noise − % 10 100 Figure 3. 20 THD+N −Total Harmonic Distortion + Noise − % VCC = 18 V, RL = 8 , Gain = 21.6 dB 0.005 0.01 1 1 kHz 0.1 20 Hz 20 kHz 0.01 20m 100 m 200 m 1 2 PO − Output Power − W Figure 5. 8 10 10 20 VCC = 18 V, RL = 16 , Gain = 21.6 dB 1 1 kHz 0.1 20 kHz 20 Hz 0.01 20m 100 m 200 m 1 2 PO − Output Power − W Figure 6. 10 20 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 OUTPUT POWER vs SUPPLY VOLTAGE CLOSED-LOOP RESPONSE 40 12 RL = 16 10 32 Gain Phase 20 0 16 Phase − 50 24 −50 12 4 −100 100 THD+N = 10% 8 7 6 5 THD+N = 1% 4 2 1 −150 0 10 9 3 VCC = 12 V, RL = 8 Ω, Gain = 32 dB 33 kHz, RC LPF 8 PO − Output Power − W 100 28 1k 10k 0 80k 8 9 10 f − Frequency − Hz 11 12 13 14 15 16 VCC − Supply Voltage − V Figure 7. Figure 8. OUTPUT POWER vs SUPPLY VOLTAGE EFFICIENCY vs OUTPUT POWER 12 100 11 90 10 80 9 17 18 VCC = 18 V, RL = 16 RL = 8 70 THD+N = 10% 8 Efficiency − % PO − Output Power − W Gain − dB 11 150 36 7 6 THD+N = 1% 5 4 60 50 40 30 20 Power represented by dashed line may require external heatsinking 3 10 2 0 8 9 10 11 12 VCC − Supply Voltage − V Figure 9. 13 14 0 1 2 3 4 5 6 7 8 9 PO − Output Power (Per Channel) − W 10 Figure 10. 9 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 EFFICIENCY vs TOTAL OUTPUT POWER SUPPLY CURRENT vs TOTAL OUTPUT POWER 100 2.0 LC Filter, Resistive Load, Stereo Operation 16 1.8 90 1.6 80 VCC− Supply Current − A 8 Efficiency − % 70 60 50 40 30 VCC = 12 V, LC Filter, Resistive Load, Stereo Operation 20 10 0 0 1 2 3 4 5 6 7 8 9 10 11 VCC = 12 V, RL = 8 1.4 1.2 VCC = 12 V, RL = 16 1 0.8 0.6 VCC = 18 V, RL = 16 0.4 0.2 0 12 0 PO − Total Output Power − W −10 −20 SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY 0 Crosstalk − dB −40 −50 −60 −70 −80 −90 −100 10 18 20 CROSSTALK vs FREQUENCY VCC = 12 V, PO = 2.5 W, Gain = 21.6 dB RL = 8 100 6 8 10 12 14 16 PO − Total Output Power − W Figure 12. −30 20 4 Figure 11. k SVR − Supply Ripple Rejection Ratio − dB 0 2 1k 10 k 20 k −10 −20 VCC = 12 V, V(RIPPLE) = 200 mVPP, RL = 8 , Gain = 15.6 dB −30 −40 −50 −60 −70 −80 −90 −100 20 100 1k f − Frequency − Hz f − Frequency − Hz Figure 13. Figure 14. 10 k 20 k TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 COMMON-MODE REJECTION RATIO vs FREQUENCY CMRR − Common-Mode Rejection Ratio − dB 0 VCC = 12 V, Gain = 15.6 dB, RL = 8 Output Referred −10 −20 −30 −40 −50 −60 −70 20 100 1k 10 k 20 k f − Frequency − Hz Figure 15. 11 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 APPLICATION INFORMATION PVCC 1 nF 1 nF PVCC 220 nF 220 nF 10 F 10 F 0.47 F 0.47 F 0.47 F BSRP PVCCR PVCCR ROUTP PGNDR PGNDR ROUTN ROUTN NC V2P5 AVCC LINP NC AVDDREF 0.1 F 10 F 220 nF 220 nF PVCC 1 nF 1 F 220 pF 120 k VCLAMPL BSLP PVCCL PVCCL BSLN 10 F LOUTP AGND LOUTP FAULT PGNDL ROSC PGNDL GAIN1 LOUTN COSC LOUTN AVDD GAIN0 0.1 F 0.1 F AGND NC NC 1 nF PVCC Chip ferrite bead (example: Fair-Rite 251206700743) shown for EMI suppression. Figure 16. Stereo Class-D With Differential Inputs 12 AVCC NC TPA3008D2 PVCCL Fault Reporting RINP LINN 0.47 F Gain Control 1 F VCLAMPR NC RINN 0.47 F Left Differential Inputs PVCCR BSRN SHUTDOWN PVCCL Right Differential Inputs PVCCR Shutdown/Mute Control ROUTP 0.1 F 0.1 F 1 F 10 F TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 APPLICATION INFORMATION (continued) CLASS-D OPERATION This section focuses on the class-D operation of the TPA3008D2. Traditional Class-D Modulation Scheme The traditional class-D modulation scheme, which is used in the TPA032D0x family, has a differential output where each output is 180 degrees out of phase and changes from ground to the supply voltage, VCC. Therefore, the differential prefiltered output varies between positive and negative VCC, where filtered 50% duty cycle yields 0 V across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown in Figure 17. Note that even at an average of 0 V across the load (50% duty cycle), the current to the load is high, causing high loss and thus causing a high supply current. OUTP OUTN +12 V Differential Voltage Across Load 0V −12 V Current Figure 17. Traditional Class-D Modulation Scheme's Output Voltage and Current Waveforms Into an Inductive Load With No Input TPA3008D2 Modulation Scheme The TPA3008D2 uses a modulation scheme that still has each output switching from 0 to the supply voltage. However, OUTP and OUTN are now in phase with each other with no input. The duty cycle of OUTP is greater than 50% and OUTN is less than 50% for positive output voltages. The duty cycle of OUTP is less than 50% and OUTN is greater than 50% for negative output voltages. The voltage across the load sits at 0 V throughout most of the switching period, greatly reducing the switching current, which reduces any I2R losses in the load. 13 TPA3008D2 SLOS435A – MAY 2004 – REVISED JULY 2004 www.ti.com APPLICATION INFORMATION (continued) OUTP OUTN Differential Voltage Across Load Output = 0 V +12 V 0V −12 V Current OUTP OUTN Differential Voltage Output > 0 V +12 V 0V Across Load −12 V Current Figure 18. The TPA3008D2 Output Voltage and Current Waveforms Into an Inductive Load Efficiency: LC Filter Required With the Traditional Class-D Modulation Scheme The main reason that the traditional class-D amplifier needs an output filter is that the switching waveform results in maximum current flow. This causes more loss in the load, which causes lower efficiency. The ripple current is large for the traditional modulation scheme, because the ripple current is proportional to voltage multiplied by the time at that voltage. The differential voltage swing is 2 x VCC, and the time at each voltage is half the period for the traditional modulation scheme. An ideal LC filter is needed to store the ripple current from each half cycle for the next half cycle, while any resistance causes power dissipation. The speaker is both resistive and reactive, whereas an LC filter is almost purely reactive. The TPA3008D2 modulation scheme has little loss in the load without a filter because the pulses are short and the change in voltage is VCC instead of 2 x VCC. As the output power increases, the pulses widen, making the ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but for most applications the filter is not needed. An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flow through the filter instead of the load. The filter has less resistance than the speaker, which results in less power dissipation, therefore increasing efficiency. 14 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 APPLICATION INFORMATION (continued) Effects of Applying a Square Wave Into a Speaker Audio specialists have advised for years not to apply a square wave to speakers. If the amplitude of the waveform is high enough and the frequency of the square wave is within the bandwidth of the speaker, the square wave could cause the voice coil to jump out of the air gap and/or scar the voice coil. A 250-kHz switching frequency, however, does not significantly move the voice coil, as the cone movement is proportional to 1/f2 for frequencies beyond the audio band. Damage may occur if the voice coil cannot handle the additional heat generated from the high-frequency switching current. The amount of power dissipated in the speaker may be estimated by first considering the overall efficiency of the system. If the on-resistance (rds(on)) of the output transistors is considered to cause the dominant loss in the system, then the maximum theoretical efficiency for the TPA3008D2 with an 8-Ω load is as follows: R 8 L Efficiency (theoretical, %) 100% 100% 86% (8 1.3) R r L ds(on) (1) The maximum measured output power is approximately 8.5 W with an 12-V power supply. The total theoretical power supplied (P(total)) for this worst-case condition would therefore be as follows: P O P 8.5 W 9.88 W (total) 0.86 Efficiency (2) The efficiency measured in the lab using an 8-Ω speaker was 81%. The power not accounted for as dissipated across the rDS(on) may be calculated by simply subtracting the theoretical power from the measured power: Other losses P (total) (measured) P (total) (theoretical) 10.49 9.88 0.61 W (3) The quiescent supply current at 12 V is measured to be 22 mA. It can be assumed that the quiescent current encapsulates all remaining losses in the device, i.e., biasing and switching losses. It may be assumed that any remaining power is dissipated in the speaker and is calculated as follows: P (dis) 0.61 W (12 V 22 mA) 0.35 W (4) Note that these calculations are for the worst-case condition of 8.5 W delivered to the speaker. Because the 0.35 W is only 4% of the power delivered to the speaker, it may be concluded that the amount of power actually dissipated in the speaker is relatively insignificant. Furthermore, this power dissipated is well within the specifications of most loudspeaker drivers in a system, as the power rating is typically selected to handle the power generated from a clipping waveform. When to Use an Output Filter for EMI Suppression Design the TPA3008D2 without the filter if the traces from amplifier to speaker are short (< 50 cm). Powered speakers, where the speaker is in the same enclosure as the amplifier, is a typical application for class-D without a filter. Most applications require a ferrite bead filter. The ferrite filter reduces EMI around 1 MHz and higher (FCC and CE only test radiated emissions greater than 30 MHz). When selecting a ferrite bead, choose one with high impedance at high frequencies, but low impedance at low frequencies. Use a LC output filter if there are low frequency (<1 MHz) EMI-sensitive circuits and/or there are long wires from the amplifier to the speaker. When both an LC filter and a ferrite bead filter are used, the LC filter should be placed as close as possible to the IC followed by the ferrite bead filter. 15 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 APPLICATION INFORMATION (continued) 33 µH OUTP L1 33 µH C2 C1 0.1 µF 0.47 µF OUTN C3 L2 0.1 µF Figure 19. Typical LC Output Filter, Cutoff Frequency of 27 kHz, Speaker Impedance = 8 Ω Ferrite Chip Bead OUTP 1 nF Ferrite Chip Bead OUTN 1 nF Figure 20. Typical Ferrite Chip Bead Filter (Chip bead example: Fair-Rite 2512067007Y3) Gain setting via GAIN0 and GAIN1 inputs The gain of the TPA3008D2 is set by two input terminals, GAIN0 and GAIN1. The gains listed in Table 1 are realized by changing the taps on the input resistors inside the amplifier. This causes the input impedance (Zi) to be dependent on the gain setting. The actual gain settings are controlled by ratios of resistors, so the gain variation from part-to-part is small. However, the input impedance may shift by 20% due to shifts in the actual resistance of the input resistors. For design purposes, the input network (discussed in the next section) should be designed assuming an input impedance of 26 kΩ, which is the absolute minimum input impedance of the TPA3008D2. At the lower gain settings, the input impedance could increase as high as 165 kΩ Table 1. Gain Setting AMPLIFIER GAIN (dB) INPUT IMPEDANCE (kΩ) TYP TYP 15.3 137 1 21.2 88 0 27.2 52 1 31.8 33 GAIN1 GAIN0 0 0 0 1 1 INPUT RESISTANCE Each gain setting is achieved by varying the input resistance of the amplifier that can range from its smallest value, 33 kΩ, to the largest value, 137 kΩ. As a result, if a single capacitor is used in the input high-pass filter, the -3 dB or cutoff frequency changes when changing gain steps. 16 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 Zf Ci IN Input Signal Zi The -3-dB frequency can be calculated using Equation 5. Use Table 1 for Zi values. 1 f 2 Z iCi (5) INPUT CAPACITOR, CI In the typical application, an input capacitor (Ci) is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, Ci and the input impedance of the amplifier (Zi) form a high-pass filter with the corner frequency determined in Equation 6. −3 dB fc 1 2 Zi C i fc (6) The value of Ci is important, as it directly affects the bass (low-frequency) performance of the circuit. Consider the example where Zi is 137 kΩ and the specification calls for a flat bass response down to 20 Hz. Equation 6 is reconfigured as Equation 7. 1 Ci 2 Z i f c (7) In this example, Ci is 58 nF; so, one would likely choose a value of 0.1 µF as this value is commonly used. If the gain is known and is constant, use Zi from Table 1 to calculate Ci. A further consideration for this capacitor is the leakage path from the input source through the input network (Ci) and the feedback network to the load. This leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason, a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at 2.5 V, which is likely higher than the source dc level. Note that it is important to confirm the capacitor polarity in the application. For the best pop performance, CI should be less than or equal to 1µF. Power Supply Decoupling,CS The TPA3008D2 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF placed as close as possible to the device VCC lead works best. For filtering lower frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the audio power amplifier is recommended. The 10-µF capacitor also serves as local storage capacitor for supplying current during large signal transients on the amplifier outputs. 17 TPA3008D2 SLOS435A – MAY 2004 – REVISED JULY 2004 www.ti.com BSN and BSP Capacitors The full H-bridge output stages use only NMOS transistors. Therefore, they require bootstrap capacitors for the high side of each output to turn on correctly. A 220-nF ceramic capacitor, rated for at least 25 V, must be connected from each output to its corresponding bootstrap input. Specifically, one 220-nF capacitor must be connected from xOUTP to xBSP, and one 220-nF capacitor must be connected from xOUTN to xBSN. (See the application circuit diagram in Figure 16.) The bootstrap capacitors connected between the BSxx pins and corresponding output function as a floating power supply for the high-side N-channel power MOSFET gate drive circuitry. During each high-side switching cycle, the bootstrap capacitors hold the gate-to-source voltage high enough to keep the high-side MOSFETs turned on. VCLAMP Capacitors To ensure that the maximum gate-to-source voltage for the NMOS output transistors is not exceeded, two internal regulators clamp the gate voltage. Two 1-µF capacitors must be connected from VCLAMPL (pin 25) and VCLAMPR (pin 36) to ground and must be rated for at least 25 V. The voltages at the VCLAMP terminals vary with VCC and may not be used for powering any other circuitry. Internal Regulated 5-V Supply (AVDD) The AVDD terminal (pin 29) is the output of an internally generated 5-V supply, used for the oscillator, preamplifier, and volume control circuitry. It requires a 1-µF capacitor, placed close to the pin, to keep the regulator stable. This regulated voltage can be used to control GAIN0 and GAIN1 terminals, but should not be used to drive external circuitry. Differential Input The differential input stage of the amplifier cancels any noise that appears on both input lines of the channel. To use the TPA3008D2 with a differential source, connect the positive lead of the audio source to the INP input and the negative lead from the audio source to the INN input. To use the TPA3008D2 with a single-ended source, ac ground the INP or INN input through a capacitor equal in value to the input capacitor on INN or INP and apply the audio source to either input. In a single-ended input application, the unused input should be ac grounded at the audio source instead of at the device input for best noise performance. SHUTDOWN OPERATION The TPA3008D2 employs a shutdown mode of operation designed to reduce supply current (ICC) to the absolute minimum level during periods of nonuse for power conservation. The SHUTDOWN input terminal should be held high (see specification table for trip point) during normal operation when the amplifier is in use. Pulling SHUTDOWN low causes the outputs to mute and the amplifier to enter a low-current state. Never leave SHUTDOWN unconnected, because amplifier operation would be unpredictable. For the best power-off pop performance, place the amplifier in the shutdown mode prior to removing the power supply voltage. USING LOW-ESR CAPACITORS Low-ESR capacitors are recommended throughout this application section. A real (as opposed to ideal) capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor behaves like an ideal capacitor. 18 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 SHORT-CIRCUIT PROTECTION AND AUTOMATIC RECOVERY FEATURE The TPA3008D2 has short-circuit protection circuitry on the outputs that prevents damage to the device during output-to-output shorts, output-to-GND shorts, and output-to-VCC shorts. When a short circuit is detected on the outputs, the part immediately disables the output drive. This is a latched fault and must be reset by cycling the voltage on the SHUTDOWN pin to a logic low and back to the logic high state for normal operation. This clears the short-circuit flag and allows for normal operation if the short was removed. If the short was not removed, the protection circuitry again activates. The fault terminal can be used for automatic recovery from a short-circuit event, or used to monitor the status with an external GPIO. THERMAL PROTECTION Thermal protection on the TPA3008D2 prevents damage to the device when the internal die temperature exceeds 150°C. There is a ±15 degree tolerance on this trip point from device to device. Once the die temperature exceeds the thermal set point, the device enters into the shutdown state and the outputs are disabled. This is not a latched fault. The thermal fault is cleared once the temperature of the die is reduced by 20°C. The device begins normal operation at this point with no external system interaction. PRINTED-CIRCUIT BOARD (PCB) LAYOUT Because the TPA3008D2 is a class-D amplifier that switches at a high frequency, the layout of the printed-circuit board (PCB) should be optimized according to the following guidelines for the best possible performance. • Decoupling capacitors—The high-frequency 0.1-µF decoupling capacitors should be placed as close to the PVCC (pins 14, 15, 22, 23, 38, 39, 46, and 47) and AVCC (pin 33) terminals as possible. The V2P5 (pin 4) capacitor, AVDD (pin 29) capacitor, and VCLAMP (pins 25 and 36) capacitor should also be placed as close to the device as possible. Large (10 µF or greater) bulk power supply decoupling capacitors should be placed near the TPA3008D2 on the PVCCL, PVCCR, and AVCC terminals. • Grounding—The AVCC (pin 33) decoupling capacitor, AVDD (pin 29) capacitor, V2P5 (pin 4) capacitor, COSC (pin 28) capacitor, and ROSC (pin 27) resistor should each be grounded to analog ground (AGND, pins 26 and 30). The PVCC decoupling capacitors should each be grounded to power ground (PGND, pins 18, 19, 42, and 43). Analog ground and power ground may be connected at the PowerPAD, which should be used as a central ground connection or star ground for the TPA3008D2. Basically, an island should be created with a single connection to PGND at the PowerPAD. • Output filter—The ferrite EMI filter (Figure 20) should be placed as close to the output terminals as possible for the best EMI performance. The LC filter (Figure 19) should be placed close to the outputs. The capacitors used in both the ferrite and LC filters should be grounded to power ground. If both filters are used, the LC filter should be placed first, following the outputs. • PowerPAD—The PowerPAD must be soldered to the PCB for proper thermal performance and optimal reliability. The dimensions of the PowerPAD thermal land should be 5 mm by 5 mm (197 mils by 197 mils). The PowerPAD size measures 4,55 x 4,55 mm. Four rows of solid vias (four vias per row, 0,3302 mm or 13 mils diameter) should be equally spaced underneath the thermal land. The vias should connect to a solid copper plane, either on an internal layer or on the bottom layer of the PCB. The vias must be solid vias, not thermal relief or webbed vias. For additional information, see the PowerPAD Thermally Enhanced Package application note, (SLMA002). For an example layout, see the TPA3008D2 Evaluation Module (TPA3008D2EVM) User Manual, (SLOU165). Both the EVM user manual and the PowerPAD application note are available on the TI Web site at http://www.ti.com. 19 TPA3008D2 SLOS435A – MAY 2004 – REVISED JULY 2004 www.ti.com BASIC MEASUREMENT SYSTEM This application note focuses on methods that use the basic equipment listed below: • Audio analyzer or spectrum analyzer • Digital multimeter (DMM) • Oscilloscope • Twisted-pair wires • Signal generator • Power resistor(s) • Linear regulated power supply • Filter components • EVM or other complete audio circuit Figure 21 shows the block diagrams of basic measurement systems for class-AB and class-D amplifiers. A sine wave is normally used as the input signal because it consists of the fundamental frequency only (no other harmonics are present). An analyzer is then connected to the APA output to measure the voltage output. The analyzer must be capable of measuring the entire audio bandwidth. A regulated dc power supply is used to reduce the noise and distortion injected into the APA through the power pins. A System Two audio measurement system (AP-II) (Reference 1) by Audio Precision includes the signal generator and analyzer in one package. The generator output and amplifier input must be ac-coupled. However, the EVMs already have the ac-coupling capacitors, (CIN), so no additional coupling is required. The generator output impedance should be low to avoid attenuating the test signal, and is important because the input resistance of APAs is not high. Conversely, the analyzer-input impedance should be high. The output impedance, ROUT, of the APA is normally in the hundreds of milliohms and can be ignored for all but the power-related calculations. Figure 21(a) shows a class-AB amplifier system. It takes an analog signal input and produces an analog signal output. This amplifier circuit can be directly connected to the AP-II or other analyzer input. This is not true of the class-D amplifier system shown in Figure 21(b), which requires low-pass filters in most cases in order to measure the audio output waveforms. This is because it takes an analog input signal and converts it into a pulse-width modulated (PWM) output signal that is not accurately processed by some analyzers. 20 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 Power Supply Signal Generator APA RL Analyzer 20 Hz − 20 kHz (a) Basic Class−AB Power Supply Low-Pass RC Filter Signal Generator Class-D APA (A) RL Low-Pass RC Filter Analyzer 20 Hz − 20 kHz (b) Filter-Free and Traditional Class-D (A) For efficiency measurements with filter-free class-D, RL should be an inductive load like a speaker. Figure 21. Audio Measurement Systems The TPA3008D2 uses a modulation scheme that does not require an output filter for operation, but they do sometimes require an RC low-pass filter when making measurements. This is because some analyzer inputs cannot accurately process the rapidly changing square-wave output and therefore record an extremely high level of distortion. The RC low-pass measurement filter is used to remove the modulated waveforms so the analyzer can measure the output sine wave. DIFFERENTIAL INPUT AND BTL OUTPUT All of the class-D APAs and many class-AB APAs have differential inputs and bridge-tied load (BTL) outputs. Differential inputs have two input pins per channel and amplify the difference in voltage between the pins. Differential inputs reduce the common-mode noise and distortion of the input circuit. BTL is a term commonly used in audio to describe differential outputs. BTL outputs have two output pins providing voltages that are 180 degrees out of phase. The load is connected between these pins. This has the added benefits of quadrupling the output power to the load and eliminating a dc blocking capacitor. A block diagram of the measurement circuit is shown in Figure 22. The differential input is a balanced input, meaning the positive (+) and negative (-) pins have the same impedance to ground. Similarly, the BTL output equates to a balanced output. 21 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 Evaluation Module Audio Power Amplifier Generator Analyzer Low−Pass RC Filter CIN RGEN VGEN RIN ROUT RIN ROUT CIN RGEN Twisted-Pair Wire RL Low−Pass RC Filter RANA CANA RANA CANA Twisted-Pair Wire Figure 22. Differential Input, BTL Output Measurement Circuit The generator should have balanced outputs, and the signal should be balanced for best results. An unbalanced output can be used, but it may create a ground loop that affects the measurement accuracy. The analyzer must also have balanced inputs for the system to be fully balanced, thereby cancelling out any common-mode noise in the circuit and providing the most accurate measurement. The following general rules should be followed when connecting to APAs with differential inputs and BTL outputs: • Use a balanced source to supply the input signal. • Use an analyzer with balanced inputs. • Use twisted-pair wire for all connections. • Use shielding when the system environment is noisy. • Ensure that the cables from the power supply to the APA, and from the APA to the load, can handle the large currents (see Table 2). Table 2 shows the recommended wire size for the power supply and load cables of the APA system. The real concern is the dc or ac power loss that occurs as the current flows through the cable. These recommendations are based on 12-inch long wire with a 20-kHz sine-wave signal at 25°C. Table 2. Recommended Minimum Wire Size for Power Cables DC POWER LOSS (MW) AWG Size AC POWER LOSS (MW) POUT (W) RL(Ω) 10 4 18 22 16 40 18 42 2 4 18 22 3.2 8 3.7 8.5 1 8 22 28 2 8 2.1 8.1 < 0.75 8 22 28 1.5 6.1 1.6 6.2 CLASS-D RC LOW-PASS FILTER An RC filter is used to reduce the square-wave output when the analyzer inputs cannot process the pulse-width modulated class-D output waveform. This filter has little effect on the measurement accuracy because the cutoff frequency is set above the audio band. The high frequency of the square wave has negligible impact on measurement accuracy because it is well above the audible frequency range, and the speaker cone cannot respond at such a fast rate. The RC filter is not required when an LC low-pass filter is used, such as with the class-D APAs that employ the traditional modulation scheme (TPA032D0x, TPA005Dxx). The component values of the RC filter are selected using the equivalent output circuit as shown in Figure 23. RL is the load impedance that the APA is driving for the test. The analyzer input impedance specifications should be available and substituted for RANA and CANA. The filter components, RFILT and CFILT, can then be derived for the system. The filter should be grounded to the APA near the output ground pins or at the power supply ground pin to minimize ground loops. 22 TPA3008D2 www.ti.com SLOS435A – MAY 2004 – REVISED JULY 2004 Load CFILT VL= VIN RL AP Analyzer Input RC Low-Pass Filters RFILT CANA RANA CANA RANA VOUT RFILT CFILT To APA GND Figure 23. Measurement Low-Pass Filter Derivation Circuit-Class-D APAs The transfer function for this circuit is shown in Equation 8 where ωO = REQCEQ, REQ = RFILT || RANA and CEQ = (CFILT + CANA). The filter frequency should be set above fMAX, the highest frequency of the measurement bandwidth, to avoid attenuating the audio signal. Equation 9 provides this cutoff frequency, fC. The value of RFILT must be chosen large enough to minimize current that is shunted from the load, yet small enough to minimize the attenuation of the analyzer-input voltage through the voltage divider formed by RFILT and RANA. A rule of thumb is that RFILT should be small (~100 Ω) for most measurements. This reduces the measurement error to less than 1% for RANA ≥ 10 kΩ. R ANA OUT V IN f C R V 2 f ANA R FILT 1 j O (8) MAX (9) An exception occurs with the efficiency measurements, where RFILT must be increased by a factor of ten to reduce the current shunted through the filter. CFILT must be decreased by a factor of ten to maintain the same cutoff frequency. See Table 3 for the recommended filter component values. Once fC is determined and RFILT is selected, the filter capacitance is calculated using Equation 9. When the calculated value is not available, it is better to choose a smaller capacitance value to keep fC above the minimum desired value calculated in Equation 10. 1 C FILT 2 f R C FILT (10) Table 3 shows recommended values of RFILT and CFILT based on common component values. The value of fC was originally calculated to be 28 kHz for an fMAX of 20 kHz. CFILT, however, was calculated to be 57,000 pF, but the nearest values of 56,000 pF and 51,000 pF were not available. A 47,000-pF capacitor was used instead, and fC is 34 kHz, which is above the desired value of 28 kHz. Table 3. Typical RC Measurement Filter Values MEASUREMENT RFILT CFILT Efficiency 1000 Ω 5,600 pF All other measurements 100 Ω 56,000 pF 23 PACKAGE OPTION ADDENDUM www.ti.com 18-Jul-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPA3008D2PHP ACTIVE HTQFP PHP 48 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-4-260C-72 HR TPA3008D2PHPG4 ACTIVE HTQFP PHP 48 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-4-260C-72 HR TPA3008D2PHPR ACTIVE HTQFP PHP 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-4-260C-72 HR TPA3008D2PHPRG4 ACTIVE HTQFP PHP 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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