ASCell3911 ISM 868 MHz, 433 MHz and 315 MHz FSK Transmitter Preliminary Data Sheet ISM 868 MHz, 433 MHz and 315 MHz FSK Transmitter – Preliminary Data Sheet ASCell3911 Austria Mikro Systeme International AG Key Features • • • • • • • • • • • • Supports triple band operation: Europe 868 MHz and 433 MHz-, US and Japan 315 MHz ISM band. Designed to be conform to EN 300 220, and FCC 47 CFR Ch.1 par.15 requirements. Provides highly reliable packet oriented data transmission in blocks of 128 bit. Event oriented single message transmission and status oriented and continuous message transmission supported. Special transmission protocol for high reliability even in presence of burst interferer (e.g. GSM) implemented. Supports clock for an external µC and allows clock free total shut down of the whole system. Wide supply range between 2,2 to 3,5 V. Low TX current, typical 8,5 mA @ 2,2 V. Low standby current, typical 0,5 µA. Wide operating temperature range from –40 °C to +85 °C. Only a low cost XTAL for 25 ppm (868 MHz) or 50 ppm (433 and 315 MHz) reference frequency tolerance required. Typically only 1 XTAL, 4 capacitors and 2 inductors externally required. General Description The ASCell3911 is a low power, triple ISM band (868 / 433 / 315 MHz), single channel FSK transmitter designed to work in a remote control link together with the SC3912 receiver system cell. The ASCell3911 performs packet oriented data transmission, in a single message- or continuosmessage mode using a special protocol to ensure high reliability even in presence of strong pulsed interferers in close adjacent bands like e.g. GSM. It contains a general bi-directional five line micro-controller (µC) interface to support the µC with clock- and reset- signal and to operate the highly efficient power up/down management including. This allows e.g. a clock-free total shut-down of the whole transmitter system. As external components the ASCell3911 need only a reference XTAL, 4 capacitors and up to 2 inductors. Applications Key-less car entry systems. Short-range packet oriented data transmission. Security applications and alarm systems. Domestic remote control systems. Industrial remote control systems. Remote metering. RF+ 1 14 VDD RF- 2 13 DATA PAGND 3 12 D_CLK RESET/TEST 4 11 D_EN XTAL 5 10 WAKEUP VDDSYN 6 9 µC_CLK GNDSYN 7 8 GND ASCell3911 • • • • • • TSSOP-14 This pin-out is preliminary and will change for the real implementation! Rev. A, February 2000 Page 2 of 13 ISM 868 MHz, 433 MHz and 315 MHz FSK Transmitter – Preliminary Data Sheet ASCell3911 Austria Mikro Systeme International AG This document contains information on products under development. Austria Mikro Systeme International AG reserves the right to change or discontinue this product without notice. 1 Functional Description The ASCell3911 consists at the RF side of a reference XTAL oscillator, a single channel RFsynthesizer, an I/Q based direct conversion FSK modulator, a driving amplifier. On the digital side the pulse interference resistant protocol encoder and a µC interface, including microprocessor clock divider and a sophisticated power up/down circuitry are implemented. RF+ VDD f =868.3 MHz D_CLK Driving Quadrature Baseband Amplifier Up Converter Filters Sin / Cos Generator RF- Protocol Encoder Po µC we Int r erf up ac /d e ow + n Transmit. Timing PAGND 90° Control Register Synthesizer Divider 64:1/32:1/16:1 LoopFilter Phase Detector VDDSTN VCO GNDSYN D_EN DATA WAKEUP µC CLK XTAL Oscillator VDD Clock GND ASCell3911 RESET/TEST Figure 1: 13.5672 MHz XTAL Block diagram of the ASCell3911. 1.1 RF Synthesizer Frequency synthesis is performed by a single channel synthesizer, consisting of a phase detector, a charge pump, a voltage-controlled oscillator (VCO), and a feedback divider. The VCO is working at 315,000 to 868,300 MHz. The feedback divider divides by 16 (315,00 MHz), 32 (433,920 MHz) or 64 (868,300 MHz). The different ISM bands are selected by different XTAL frequency values FXOSC and the CRYSTAL and RANGE control bits. A truth table for the selection of the different frequencies is given in Table 1. FXOSC / MHz Multiplier CRYSTAL RANGE 19,6875 16 H L 315,000 13,5600 32 L L 433,920 13,5672 64 L H 868,300 H H not used not used Table 1: FC/ MHz Quartz and RF output frequencies. Rev. A, February 2000 Page 3 of 13 ISM 868 MHz, 433 MHz and 315 MHz FSK Transmitter – Preliminary Data Sheet ASCell3911 Austria Mikro Systeme International AG Note: CRYSTAL and RANGE are bits of the control information. 1.2 Microprocessor Clock The microprocessor clock frequency FCLK is generated by dividing the XTAL frequency FXOSC by 4 if CRYSTAL is ´L´ and by dividing the XTAL frequency FXOSC by 6 if CRYSTAL is ´H´. Note: CRYSTAL is one bit of the control information. 1.3 Modulation The SC3011 uses FSK modulation with a frequency deviation of ≈60 kHz at a gross data rate from 18,25 kbit/s for the 868,300 MHz ISM band. In the transmitter, the data from the pulse interference resistant protocol encoder is first transformed into a complex base-band signal in the sin/cos block. After filtering it is shifted up to RF in an I/Q based direct conversion transmitter. 1.4 Burst interference Resistant Protocol Encoder In order to avoid disturbance due to pulsed interferes, e.g. GSM phones, the net data block is encoded with a special protocol. Up to two simultaneous GSM disturbers can be handled by adding redundancy to the FSK data in a suitable manner. The 128 bits of a message (net data block) are put into a transmission sequence that alternates a synchronization packet and data packet at transmission as shown in Figure 2. To form a data packet, the 128 bit net data the information is split in 16 bytes where a bytenumber and a parity is added to generate 14 bit words. Therefore the 128 bits of net data are expanded to the 224 bit long (gross) data packet. The synchronization packet is simple 0101sequence of 252 bit. Transmission Protocol SYNC Data Packet SYNC Data Packet 0-1-Sequence W0 . . . W 15 0-1-Sequence W0 . . . W 15 Word Pattern in Data Packet W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 W10 W11 W12 W13 W14 W15 12.28 ms Bit Pattern for SYNC 010101... ...010101 13.81 ms Figure 2: Transmission protocol of the ASCell3911. Rev. A, February 2000 Page 4 of 13 ISM 868 MHz, 433 MHz and 315 MHz FSK Transmitter – Preliminary Data Sheet ASCell3911 Austria Mikro Systeme International AG 1.4.1 Duty-Cycle Operation In certain countries, it is required to reduce the average transmit power but it is allowed to keep the peak power high. Therefore a duty-cycled operation mode is implemented in the ASCell3911. By selecting this operation mode, the duty cycle of the transmit signal is set to 50%, related to an observation interval of 10 ms. This function is be implemented in the burst interference resistant protocol encoder. The duty cycle operation is set via the bit duty cycle operation (DCO). Note: DCO is one bit of the control information. 1.4.2 Transmission Modi The ASCell3911 supports two different transmission modii: • The event oriented Single Message Transmission (SMT) where four times alternate synchronization and data packets are transmitted. Due to the limited transmission time this mode needs less power than CMT but supports no direct information about the duration of a transmitted command. The bit SMT/CMT is “L” for this mode. • The status oriented Continuous Message Transmission (CMT) where alternate synchronization and data packets are transmitted as long as one button is pressed. This mode is less power efficient than SMT but the duration of a command can be directly transported by the duration of the transmission power. The bit SMT/CMT is “H” for this mode. Note: SMT/CMT is one bit of the control information. 1.5 Driving Amplifier The driving amplifier has a differential open collector output optimized for driving of small, symmetrical high-impedance loop antennas. The amplifier drives a nominal RF current of 1 mARMS. The maximal differential voltage swing is about 2,8 VPP. Therefore, the output power is a function of the connected load impedance. With a 2 kΩ differential load a nominal peak output power (to the antenna) of ≈2 mW is obtained. Please note that the finally radiated power (from antenna) is lower and strongly dependent on the efficiency (function of the size) of the antenna to be used. 1.6 µC Interface and Power Management The ASCell3911 contains a direct interface to a micro controller (µC). The µC interface of the ASCell3911 consists of the following five pins: ”Transmit data input” (DATA). “Active ”H” transmit data enable” (D_EN). ”Transmit data clock input” (D_CLK). ”Active ”L” µC reset output/transmitter wakeup end input” (WAKEUP). ”µC clock output/active ”L” start-up input” (µC_CLK). These lines support the µC with the required reset and clock signals and control the ASCell3911 internal power on/off circuit, which wakes up and shuts down the whole transmitter consisting of the ASCell3911 and the µC. Figure 3 shows a typical interconnection of the ASCell3911 with a typical µC. Figure 4 presents a related timing for power up and down of the transmitter. Rev. A, February 2000 Page 5 of 13 ISM 868 MHz, 433 MHz and 315 MHz FSK Transmitter – Preliminary Data Sheet ASCell3911 Austria Mikro Systeme International AG µC ASCell3911 DATA I O SERIAL DATA OUT (P1) D_EN I O SERIAL DATA ENABLE (P2) D_CLK I O SERIAL DATA CLOCK (P3) O STOP TRANSMIT (P4) 10k WAKEUP I/O I NCLEAR µC_CLK I/O I CLK 10k SW Transmit button Figure 3: Note: Interconnection of the ASCell3911 with a typical µC with one button to wake up the whole system (example). At room temperature, resistor values of ≈10 kΩ are suggested for the µC interface. open SW closed µC_CLK WAKEUP P4 standby startup 32 clocks SC3911 reset µC Figure 4: Note: 16 clocks startup µC active/transmisson µC SC3911 4 clocks standby power down µC µC interface timing for wake-up and power down control. The dashed lines indicate w eak high or low state when the µC_CLK or WAKEUP output of the ASCell3911 is disabled (in high-resistive Z state) and pulled ”H” or ”L” by the internal pull-up device or by the µC via a resistor. These weak states can be overridden by the ASCell3911 if the respective outputs are enabled. Whenever a line is pulled via an external resistor, however, this should override the internal pull-up devices of the ASCell3911. 1.6.1 Interface Description It is assumed that the µC remains in low power standby mode as long as the P4 pin is kept ”L” and no clock cycles are applied. Standby: During standby (default after VCC-on) the XTAL oscillator is turned off and ASCell3911 holds the µC in a reset state: Rev. A, February 2000 Page 6 of 13 ISM 868 MHz, 433 MHz and 315 MHz FSK Transmitter – Preliminary Data Sheet ASCell3911 Austria Mikro Systeme International AG The ASCell3911 WAKEUP pin is active and set to ”L”, holding the µC in reset state. In standby mode the ASCell3911 WAKEUP internal pull-up is disabled and does not drain current from the supply. The ASCell3911 µC_CLK output is disabled, (in high resistive ”Z” state) and internally pulled up to ”H”. (Re)starting the transmitter: Closing the push button (giving a falling edge on µC_CLK line) starts up the ASCell3911. It turns on its XTAL oscillator and after the oscillator start up phase it turns the µC_CLK pin to active (CMOS level) mode and provides a clock to the µC. After a delay of 32 µC clock cycles the WAKEUP pin of the ASCell3911 is set to ”H” for 16 clock cycles. The transmitter is now in active mode. The WAKEUP acts in ASCell3911 active mode as an input waiting for a ”L” to trigger the transmission of the transmitter to standby mode During this active mode the µC sends the 132 bit data (8 bit control and 16 * 8 bit data) on the µC - P1 (Serial data out) line. The timing of the microcontroller interface is shown in Figure 5. The microcontroller clocks a 134-bit Data into the ASCell3911 for data encoding. This data consists of 6 control bits followed by 128 transmit data bits. After the data bock has been completely transferred to the ASCell3911, it starts up transmission, during which the I/Q modulator and power amplifier are powered up in order to transmit the encoded data. Transmission is done with respect to the control bits. Table 2 shows the control bits set different operation modes of the chip. TX-State standby startup/reset µC P4 active transmission Twe standby Tet SMT D_EN Te d Tde Tbit DATA D_CLK t wake up Figure 5: Note: Twt start transmission stop transmission µC interface timing for data transmission when ASCell3911 and µC are active. Figure 4 shows the timing for the CMT-mode where the controller sets P4 to “L” and so the transmission stops. The broken line shows the Signal P4 in the SMT mode where the ASCell3911 stops the transmission. Control bit description: bit# Name Comments 1 Quartz crystal (“CRYSTAL”): L=13,5600 / 13,5672MHz H=19,6875 MHz 2 Operating frequency range (“RANGE”): L=315/433MHz, H=868,3MHz 3 Duty cycle operation (“DCO”) L = OFF H = ON 4 Single / Continuous Message Transmission (“SMT/CMT”) L = SMT H = CMT Rev. A, February 2000 Page 7 of 13 ISM 868 MHz, 433 MHz and 315 MHz FSK Transmitter – Preliminary Data Sheet ASCell3911 5 GP 6 GP Table 2: Austria Mikro Systeme International AG Control bit description. Single message transmission: After completing the data transmission to the ASCell3911, the µC may indicate ”end of transmission” by setting P4 (not end of transmit) to ”L” and pulls the WAKEUP line to ”L”. Sensing this, 4 clock cycles later the ASCell3911 will switch the µC back to standby mode, disabling the µC_CLK output, setting the active WAKEUP pin to ”L”. The ASCell3911 will finish the transmission sequence and than turning off the XTAL oscillator to and goes back to the standby mode too. The SMT/CMT bit is ”L” indicates the single transmission mode. Note: SMT/CMT is one bit of the control information. Continuous message transmission: After completing the data transmission to the ASCell3911, the µC may indicate ”end of transmission” by setting P4 to ”L” and pulls the WAKEUP line to ”L”. Sensing this, 4 clock cycles later the ASCell3911 will switch back to standby mode, disabling the µC_CLK output, setting the active WAKEUP pin to ”L” and than turning off the XTAL oscillator. The SMT/CMT bit is ”H” indicates the continuous transmission mode. Note: SMT/CMT is one bit of the control information. Due to the sophisticated tri-state - active/inactive pull-up configuration of the WAKEUP pin the ASCell3911 does not drain current during its standby periods. The interface implemented in the ASCell3911 system cell is a general, non-specialized example only. It can be modified on customers demand. 2 Electrical Characteristics 2.1 Absolute Maximum Ratings (non operating) Symbol Parameter Min Max Units VDD; VDDSYN Positive supply voltage -0,5 6 V GND; GNDSYN Negative supply voltage 0 0 V Vin Voltage at every input pin Gnd-0,5 VCC+0,5 V Iin Input current into any pin except supply pins -10 10 mA ESD Electrostatic discharge 1k V 1) 3) ESDIN Electrostatic discharge of RF pins 500 V 1) 4) Tstg Storage temperature 125 °C Tlead Lead temperature 260 °C -55 Note Latch-up Test 2) 1) Test according to MIL STD 883C, Method 3015.7. HBM: R=1,5 kΩ, C=100 pF, 5 positive pulses per pin against supply pin(s), 5 negative pulses per pin against supply pin(s). 2) 260 °C for 10 s (Reflow and Wave Soldering), 360 °C for 3 s (Manual soldering). 3) All pins except RF+, RF-, XTAL. 4) Pins RF+, RF-, XTAL. Rev. A, February 2000 Page 8 of 13 ISM 868 MHz, 433 MHz and 315 MHz FSK Transmitter – Preliminary Data Sheet ASCell3911 Austria Mikro Systeme International AG 2.2 Operating Conditions Symbol Parameter VDD Positive supply voltage 2,2 GND Negative supply voltage 0 TA Operating temperature -40 ICC Current consumption VCC= 3,5 V VCC= 3,0 V VCC= 2,2 V ICCSD Standby current low voltage reset circuit active Rev. A, February 2000 Conditions / Notes Min Typ 0 10 9 8,5 Max Units 3,5 V 0 V 85 °C 12 11 10 mA mA mA 0,5 µA Page 9 of 13 ISM 868 MHz, 433 MHz and 315 MHz FSK Transmitter – Preliminary Data Sheet ASCell3911 Austria Mikro Systeme International AG 2.3 FSK Operation TA = 23 °C, VDD, VSYN = 2,7 V, unless specified otherwise. Device functional for TA= -40 to +85 °C. Symbol Parameter Conditions / Notes FC Carrier frequency Depends on different external crystals. ∆F FSK frequency devi ation 315,000 MHz: 433,920 MHz: 868,300 MHz: Fxosc Crystal oscillator (XOSC) 315,000 MHz, Crystal=H frequency 433,920 MHz, Crystal=L 868,300 MHz, Crystal=L FTxosc Crystal oscillator (XOSC) 315,000 M: (-40~+85 °C), fequency tolerance 433,920 MHz: (-40~+85 °C), 868,300 MHz: (-40~+85 °C) DR,gross Gross data rate Pout Available output power, 315,000MHz (USA), into Zout = 2000 Ω differ- 433,920 MHz ential 868,300 MHz 315MHz (Japan) - set through RPA??? TabTX Time between two different transmitted messages “a”&“b” 1) 2) Min Typ Max Units 315,000 433,920 868,300 -68,4 -61,7 -61,7 MHz MHz MHz +68,4 +61,7 +61,7 kHz kHz kHz 19,6875 13,5600 13,5672 MHz MHz MHz 50 50 25 ppm ppm ppm 18,2351) Including burst protocol. -1,5 –1,5 –3,0 kbps 0,0 0,0 -1,5 -20? +1,5 +1,5 +0,0 dBm dBm dBm dBm 30 ms @ 868,300 MHz: DR,gross = 13,5672 MHz / 46,5 / 16 = 18,235 kbps. @ 433,920 MHz: 18,225 kbps. @ 315,000 MHz: 19,226 kbps. Antenna dependent - will not be production tested. 2.4 Digital Pin Characteristics TA = 23 °C, VDD = 2,7 V, unless specified otherwise. GND is the 0 V reference. Input parameters for bi-directional pins (µC_CLK, WAKEUP) are valid at disabled outputs. Symbol Parameter Conditions Min Typ VDD-0,5 - Max Units µC_CLK (µC clock output / wake-up input) VOH High level output voltage IOH =-1 mA VOL Low level output voltage IOL =1 mA tr Rise time CLoad = 10 pF 20 ns td Fall time CLoad = 10 pF 20 ns jcc Cycle to cycle jitter VIH High level input voltage VIL Low level input voltage IIH High level input current VIH = VDD IIL Low level input current VIL =0 V; Due to internal pull-up Rev. A, February 2000 - V 0,3 +/-5 VDD-0,5 - -40 V % V 0,3 V 1 µA µA Page 10 of 13 ISM 868 MHz, 433 MHz and 315 MHz FSK Transmitter – Preliminary Data Sheet ASCell3911 Austria Mikro Systeme International AG DATA(serial data input), D_EN (serial data enable input), D_CLK (serial data clock input) VIH High level input voltage VDD-0,5 VIL Low level input voltage IIH High level input current VIH= VDD IIL Low level input current VIL =0 V - V - 0,3 V 1 µA -1 µA WAKEUP (µC clear output / transmitter power down input) VOH High level output voltage IOH = -1mA VOL Low level output voltage IOL = 1mA VIH High level input voltage VIL Low level input voltage IIH High level input current VIH = VDD IIL Low level input current VIL =0 V; Due to internal pull-up VDD-0,5 - V VDD-0,5 0,3 V - V - 0,3 V 1 µA -40 µA 2.4.1 µController Interface Symbol Parameter Conditions / Notes Tbit FSK Data Bit duration Twe Time between Wake up and Data Data input prepared to Enable receive data tbd s Ted Time between Data Enable and Data Data input prepared to receive data tbd s Tde Time between Data and Data Enable Start-up and lock PLL tbd s Tet Time between Data Enable and Transmit Start-up and lock PLL tbd s Twt Time between Wake up and Transmit start Tca Time that CLK output stays active after Twt VPOR Power-On-Reset threshold voltage TPOR Power-On-Reset duration Typ Max Units tbd s tbd tbd RESET invalid when Vdd < VCCminPOR VCCminPOR Minimum Supply Voltage for valid Power-On-Reset output 3 Min s s 1,6 1,8 V 2 10 ms 1,2 V Pin Description Note: pin ordering is preliminary - will be fixed at fab-in. Pin Name Type Description 1 RF+ A Power amplifier output (open collector) 2 RF- A Power amplifier output (open collector) 3 PAGND P Power amplifier ground Rev. A, February 2000 Page 11 of 13 ISM 868 MHz, 433 MHz and 315 MHz FSK Transmitter – Preliminary Data Sheet ASCell3911 Austria Mikro Systeme International AG Pin Name Type Description 4 RESET / TEST O Power-On-Reset output Test output in test mode 5 XTAL A XTAL oscillator input 6 VDDSYN P PLL, mixer positive supply 7 GNDSYN P PLL, mixer, negative supply 8 GND P Negative supply of DC/DC, POR, LBAT, XOSC, Data Interface, SinCos 9 uC_CLK O Clock output for micro-controller 10 WAKEUP I Wake-up signal, pos. edge wakes up the chip, negative edge stops transmission 11 D_CLK I Data clock, data is clocked into the chip with negative edge of DCLK 12 D_EN I Data enable, high while data is clocked into the chip 13 DATA I Data input for 128 bits of FSK data preceeded by 8 control bits 14 VDD P Positive supply of DC/DC, POR, LBAT, XOSC, Data Interface, SinCos 4 Application Schematic PAGND RF+ DC to 80 kHz DRA QUC 2*BBF SCG f =868.300 MHz R D_EN Protocol Encoder F RF- Driving Amplifier. Quadrature Up Converter 0° Implementation Example Baseband Filters D_CLK DATA Sin / Cos Generator WAKEUP Transmit. Timing 90° µC_CLK +/-45° Reset/Test DVCC R F VCO LPF f/64 Local Oscillator Loop-filter VDDSYN DIV PHD Clock RF_LO = f DVCC GNDSYN Phase Detector XTO DGND XTAL DGND Oscillator XTAL G. Schultes, ISM868_TX Revision: 0, 99 07 16 VDDSYN GNDSYN Figure 6: Basic application schematic of the ASCell3911. Rev. A, February 2000 Page 12 of 13 ISM 868 MHz, 433 MHz and 315 MHz FSK Transmitter – Preliminary Data Sheet ASCell3911 5 Austria Mikro Systeme International AG Package Information Figure 7: Physical dimensions of TSSOP-14. Symbol Common Dimensions Minimal (mm/mil) Nominal (mm/mil) Maximal (mm/mil) A - - 1,10/0,0433 A1 0,05/0,002 0,10/0,004 0,15/0,006 b 0,19/0,0075 - 0,30/0,0118 D e 0,65 BSC E 6,25/0,246 6,40/0,252 6,50/0,256 E1 4,30/0,169 4,40/0,173 4,50/0,177 L 0,50/0,020 0,60/0,024 0,70/0,028 α 0° 4° 8° ASCell's are functional and in-spec circuits, which are usually available as samples with documentation and demoboard. How ever they are intentionally to be used as a basis for ASIC derivatives. If an ASCell fits into a customer's application as it is, it will be immediately qualified and transfered to an ASSP to be ordered as a regular AS product. Copyright 2000, Austria Mikro Systeme International AG, Schloß Premstätten, 8141 Unterpremstätten, Austria. Telefon +43-(0)3136-500-0, Telefax +43-(0)3136-52501, E-Mail [email protected] All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any means, without the prior permission in writing by the copyright holder. To the best of its knowledge, Austria Mikro Systeme International asserts that the information contained in this publication is accurate and correct. Rev. A, February 2000 Page 13 of 13