APLUS APU4003

APU4003
4-Bit Micro-Controller With LCD Driver, 1K Word
Features
y Control outputs: ALARM, LIGHT
y LCD driver outputs
(can drive up to 75 LCD segments)
y Mask option to select 4 LCD drive modes: static,
duplex (1/2 duty 1/2 bias, 1/3 duty 1/2 bias or 1/3
duty 1/3 bias)
y Mask option permits LCD driver output pins to
be used for DC output ports; up to 25 pins are
available
y Segment PLA circuit permits any layout on LCD
panel
y Built-in clock generator (crystal or RC)
y Built-in voltage doubler, halver, tripler
Very low current dissipation
Wide operating voltage range
Supports both Ag and Li batteries
Powerful instruction set
4-level subroutine nesting (including interrupt)
4 event driven interrupts, 2 external and 2
internal
y ROM size: 1024x15 bits
y RAM size: 64x4 bits
y Input ports: 2 ports/8 pins (S and M)
y Output port: 1 port/4 pins (P)
y Pseudo serial output port (P)
y Input/output ports: 2 ports/8 pins (I/OA and I/OB)
y
y
y
y
y
y
General Description
The APU4003 is a single chip 4-bit micro-controller with
LCD drivers. It can drive up to 3 common times or 25
segments, i.e. a 75-segment LCD driver. This 4-bit
micro-controller contains a 4-bit parallel processing
ALU, 1024x15-bit program ROM, 64x4-bit data RAM,
input/output ports, alarm driver, timer, clock generator,
crystal and RC oscillator circuit, LCD driver and 79
powerful instructions in a single chip. The HALT
instruction can be used to stop all internal operations
other than timer, clock generator, crystal/RC oscillator
and LCD driver. Very low current dissipation can be
easily achieved by combining 4 kinds of interrupt
functions and HALT instruction to minimize the
operation cycle.
Block Diagram
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Preliminary
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1
Ver. 0.0
APU4003
Pad Assignment
Pad open: 90Pm X 90Pm
Pad pitch: 160Pm (Min.)
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APU4003
;
Pad Coordinates
Pad No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Pad Name
VDD
GND
VSS1
VSSO
VSS2
ALARM
LIGHT
S4
S3
IOA1
IOA2
IOA3
IOA4
IOB1
IOB2
IOB3
IOB4
RESET
INT
P1
P2
P3
P4
M1
M2
M3
M3
TESTA
CUP1
CUP2
S2
S1
X (Pm)
3118
3087
3113
3118
3118
3118
3118
3118
2935
2775
2615
2455
2295
2135
1975
1815
1655
1495
1335
1175
1015
855
695
535
375
215
50
50
50
50
50
50
Y (Pm)
1010
1170
1330
1490
1650
1810
1970
2196
2196
2196
2196
2196
2196
2196
2196
2196
2196
2196
2196
2196
2196
2196
2196
2196
2196
2196
2196
1970
1810
1650
1490
1330
Pad No.
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Pad Name
OSCIN
CAP
OSCOUT
COM1
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
COM3
COM2
VSS3
X (Pm)
50
50
50
50
50
50
50
50
210
370
530
690
850
1010
1170
1330
1490
1650
1810
1970
2130
2290
2450
2610
2770
2930
3118
3118
3118
3118
3118
3118
Y (Pm)
1170
1010
850
690
530
370
210
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
210
370
530
690
850
* Note: The substrate must connect to VDD.
Preliminary
2
Ver. 0.0
APU4003
Pin Description
Pin Name
OSCIN
OSCOUT
CAP
S1~4
Type
I
O
I
I
M1~4
P1~4
IOA1~4
IOB1~4
INT
RESET
LIGHT
ALARM
I
O
I/O
I/O
I
I
O
O
VDD
GND


VSS0
VSS1
VSS2
VSS3
CUP1~2
COM1~3

O
O
SEG1~25
O
TESTA
*
Description
Typical 32.768kHz crystal is connected across OSCIN/OSCOUT for Oscillation; R/C
oscillation mode also available.
Connected to OSCOUT for compensation capacitor.
Port for input only with chattering eliminator for CK10 (32ms), CK8 (8ms) & CK6
(2ms). (PLA mask option).
Input ports.
Output ports.
Input/Output ports. After power-on reset, sets as input mode.
Input/Output ports. After power-on reset, sets as input mode.
External interrupt request control input pin.
System reset pin.
Output only for outputting signal to drive transistor for light.
Output only for outputting 4kHz/2kHz/1kHz modulation signal. Also can be used to
output a non-modulation signal.
(+)Power supply pin.
Power supply pin for logic unit inside LSI. When using Li version, a capacitor must be
connected across GND and VDD to prevent the logic unit from malfunctioning.
(--) Power supply pin.
* For Ag version, apply (--) side to both VSS0 & VSS1.
For other than Ag version, apply (--) side to both VSS0 & VSS2.
LCD power supply pin.
Pins for connecting the voltage step-up (step-down) capacitor.
Output pins for LCD panel common plate.
The following pin is used in each case.
Statuc 1/2 duty 1/3 duty
COM1
0
0
0
COM2
0
0
Ё
COM3
0
Ё
Ё
Alternating Frequency 32Hz*
43Hz*
32Hz*
* Frequency can be doubled, quadrupled with PLA.
Output pins for LCD panel segments.
* Also used as output ports with mask option.
Test pin (for internal testing only).
Absolute Maximum Rating
Name
Maximum Supply Voltage
Maximum Input Voltage
Maximum Output Voltage
Maximum Operating Temperature
Maximum Storage Temperature
Preliminary
Ta = 0 to 70к, VDD=0V
Symbol
VSS1
VSS2
VSS3
VIN1
VIN2
VOUT1
VOUT2
VOUT3
tOPG
Rating
-5.5 ~ +0.3
-5.5 ~ +0.3
-8.5 ~ +0.3
VSS1-0.3 to +0.3
VSS2-0.3 to +0.3
VSS1-0.3 to +0.3
VSS2-0.3 to +0.3
VSS3-0.3 to +0.3
0 to +70
Unit
V
V
V
V
V
V
V
V
к
tSTG
-25 to +125
к
3
Ver. 0.0
APU4003
Allowable Operating Conditions
Ta = 0 to 70к, VDD=0V
Name
Symbol
Condition
VSS1
Supply Voltage
VSS2 External RC Mode
VSS3
VSS1
Supply Voltage
VSS2 Crystal Mode
VSS3
VSS1
Oscillator Start-up Supply Voltage
Crystal Mode
VSS2
VIH1
Input sHs Voltage
Ag Battery Mode
VIL1
Input sLs Voltage
Input sHs Voltage
VIH2
Input sLs Voltage
VIL2
Input sHs Voltage
VIH3
Min.
-5.25
-5.25
-8.0
-5.25
-5.25
-8.0
Li Battery Mode
OSCIN at Ext. RC & Ag
Battery Mode
0.3VSS1
Max.
-1.7
-3.5
-3.5
-1.2
-2.4
-2.4
-1.35
-2.4
0
Unit
V
V
V
V
V
V
V
V
V
VSS1
0.7VSS1
V
0.3VSS2
0
V
VSS2
0.7VSS2
V
0.3VSS1
0
V
VSS1
0.8VSS1
V
0
V
0.8VSS2
V
32
100
1000
kHz
kHz
kHz
Input sLs Voltage
VIL3
Input sHs Voltage
VIH4
Input sLs Voltage
VIL4
OSCIN at Ext. RC & Li Battery 0.2VSS2
Mode
VSS2
Operating Freq.
fOPG1
fOPG2
fOPG3
Ag Battery Mode
Li Battery Mode
External RC Mode
32
32
32
Electrical Characteristics
Ta=0 to 70к, VDD=0V
Input resistance
Name
sLs-Level Hold tR
M/S Pull-Down tR
INT Pull-Up tR
INT Pull-Down tR
RES Pull-Down tR
Symbol
RIIH1
Condition
VI=0.8VSS1, #1
Min.
10
Typ.
40
Max.
100
Unit
k:
RIIH2
VI=0.8VSS2, #2
10
40
100
k:
RIIH3
VI=0.8VSS2, #3
5
20
50
k:
RMSD1
VI=VDD, #1
200
500
1000
k:
RMSD2
VI=VDD, #2
200
500
1000
k:
RMSD3
VI=VDD, #3
100
250
500
k:
RINTU1
VI=VSS1, #1
200
500
1000
k:
RINTU2
VI=VSS2, #2
200
500
1000
k:
RINTU3
VI=VSS2, #3
100
250
500
k:
RINTD1
VI=VDD, #1
200
500
1000
k:
RINTD2
VI=VDD, #2
200
500
1000
k:
RINTD3
VI=VDD, #3
100
250
500
k:
RMSD1
VI=VDD or VSS1, #1
5
20
50
k:
RMSD2
VI=VDD or VSS2, #2
5
20
50
k:
RMSD3
VI=VDD or VSS2, #3
5
20
50
k:
Note: #1: VSS1= -1.2V ( Ag ), #2: VSS2= -2.4V ( Li ), #3: VSS2= -4V (ExtV).
Preliminary
4
Ver. 0.0
APU4003
DC output characteristics
Name
Output sHs Voltage
Output sLs Voltage
Output sHs Voltage
Symbol
VOH1a
VOH2 a
VOH3 a
VOL1 a
VOL2 a
VOL3 a
VOH1b
VOH2b
VOH3b
VOL1b
Output sLs Voltage
VOL2b
VOL3b
Condition
For
IOH=-200PA, #1
IOH=-1mA, #2
IOH=-3mA, #3
Alarm
Light
IOL=400PA, #1
IOL=2mA, #2
IOL=6mA, #3
P port
IOA-n
IOB-n
IOH=-100PA, #1
IOH=-500PA, #2
IOH=-1.5mA, #3
IOL=200PA, #1
IOL=1mA, #2
IOL=3mA, #3
Min.
-0.5
Typ.
-0.3
Max.
-0.1
Unit
V
-1
-1.5
-1.1
-0.6
-1.0
-0.9
-0.3
-0.5
-0.7
V
V
V
-2.1
-3.5
-0.5
-1.8
-3.0
-0.3
-1.4
-2.5
-0.1
V
V
V
-1
-0.6
-0.3
V
-1.5
-1.1
-1.0
-0.9
-0.5
-0.7
V
V
-2.1
-3.5
-1.8
-3.0
-1.4
-2.5
V
V
Min.
Typ.
Max.
Unit
-0.5
-0.3
-0.1
V
-1
-0.6
-0.3
V
-1.5
-1.0
-0.5
V
-0.9
-0.7
V
Note: #1: VSS1= -1.2V ( Ag ), #2: VSS2= -2.4V ( Li ), #3: VSS2= -4V (ExtV).
Segment driver output characteristics
Name
CMOS output mode
Output sHs Voltage
Symbol
VOH1c
IOH=-10PA, #1
VOH2c
IOH=-50PA, #2
VOH3c
Output sLs Voltage
Condition
For
SEG-n
IOH=-200PA, #3
VOL1c
IOL=20PA, #1
-1.1
VOL2c
IOL=100PA, #2
-2.1
-1.8
-1.4
V
VOL3c
IOL=400PA, #3
-3.5
-3.0
-2.5
V
VOH1d
Static display mode
Output sHs Voltage
Output sLs Voltage
Output sHs Voltage
Output sLs Voltage
IOH=-1PA, #1
-0.2
V
VOH2d
IOH=-1PA, #2
-0.2
V
VOH3d
IOH=-1PA, #3
-0.2
V
VOL1d
IOL=1PA, #1
VOL2d
SEG-n
-1.0
V
IOL=1PA, #2
-2.2
V
VOL3d
IOL=1PA, #3
-3.8
V
VOH1e
IOH=-10PA, #1
-0.2
V
VOH2e
IOH=-10PA, #2
-0.2
V
VOH3e
IOH=-10PA, #3
VOL1e
IOL=10PA, #1
VOL2e
IOL=10PA, #2
COM-n
-0.2
VOL3e
IOL=10PA, #3
Duplex (1/2 bias, 1/2 duty) display mode
VOH12f
IOH=-1PA, #1, #2
Output sHs Voltage
VOH3f
IOH=-1PA, #3
VOL12f
IOL=1PA, #1, #2
Output sLs Voltage
VOL3f
IOL=1PA, #3
Preliminary
V
-1.0
V
-2.2
V
-3.8
V
-0.2
SEG-n
5
V
-0.2
V
-2.2
V
-3.8
V
Ver. 0.0
APU4003
Name
Output sHs Voltage
Output sMs Voltage
Output sLs Voltage
Symbol
VOH12g
IOH=-10PA, #1, #2
Min.
-0.2
VOH3g
IOH=-10PA, #3
-0.2
VOM12g
IOI/H=r10PA, #1, #2
VOM3g
IOI/H=r10PA, #3
VOL12g
VOL3g
1/2 bias, 1/3 duty display mode
VOH12h
Output sHs Voltage
Output sLs Voltage
Output sHs Voltage
Output sMs Voltage
Output sLs Voltage
Output sM2s Voltage
Output sLs Voltage
Output sHs Voltage
Output sM1s Voltage
Output sM2s Voltage
Output sLs Voltage
For
Typ.
Max.
Unit
V
V
-1.4
-1.0
V
-2.2
-1.8
V
IOL=10PA, #1, #2
-2.2
V
IOL=10PA, #3
-3.8
V
COM-n
IOH=-1PA, #1, #2
VOH3h
IOH=-1PA, #3
VOL12h
IOL=1PA, #1, #2
VOL3h
IOL=1PA, #3
VOH12i
SEG-n
-0.2
V
-0.2
V
-2.2
V
-3.8
V
IOH=-10PA, #1, #2
-0.2
V
VOH3i
IOH=-10PA, #3
-0.2
V
VOM12i
IOI/H=r10PA, #1, #2
VOM3i
IOI/H=r10PA, #3
VOL12i
VOL3i
1/3bias, 1/3duty display mode
VOH12j
Output sHs Voltage
VOH3j
Output sM1s Voltage
Condition
-1.4
-1.0
V
-2.2
-1.8
V
IOL=10PA, #1, #2
-2.2
V
IOL=10PA, #3
-3.8
V
COM-n
IOH=-1PA, #1, #2
-0.2
V
IOH=-1PA, #3
-0.2
V
VOM12j
IOI/H=r10PA, #1, #2
-1.4
-1.0
V
VOM13j
IOI/H=r10PA, #1, #2
-2.2
-1.8
V
VOM22j
IOI/H=r10PA, #1, #2
-2.6
-2.2
V
VOM23j
IOI/H=r10PA, #1, #2
-4.2
-3.8
V
VOL2j
SEG-n
IOL=1PA, #2
-3.4
V
VOL3j
IOL=1PA, #3
-5.8
V
VOH2k
IOH=-10PA, #2
-0.2
V
VOH3k
IOH=-10PA, #3
-0.2
V
VOM12k
IOI/H=r10PA, #1, #2
-1.4
-1.0
V
VOM13k
IOI/H=r10PA, #3
-2.2
-1.8
V
VOM22k
IOI/H=r10PA, #1, #2
-2.6
-2.2
V
VOM23k
IOI/H=r10PA, #3
-4.2
-3.8
V
V
V
COM-n
VOL2k
IOL=1PA, #2
-3.4
VOL3k
IOL=1PA, #3
-5.8
Note: #1: VSS1= -1.2V ( Ag ), #2: VSS2= -2.4V ( Li ), #3: VSS2= -4V (ExtV).
Instruction Table
Instruction
NOP
LCT Y,X
OPPS X,D
Machine Code
Function
000 0000 0000 0000
No Operation
000 00YY YYXX XXXX (Ly) m (Rx)
000 1110 1DXX XXXX P1,2,3,4 m (Rx0,1),D,Pulse
MRA X
000 1101 01XX XXXX
Preliminary
Remark
Flag
Y=000- No Use
CF m (Rx3)
6
Ver. 0.0
APU4003
Instruction
OPP X
Machine Code
000 1110 00XX XXXX
Port(P) m (Rx)
OPA X
000 0100 01XX XXXX
Port(A) m (Rx)
OPB X
000 1000 01XX XXXX
Port(B) m (Rx)
LCB Y,X
000 01YY YYXX XXXX (Ly) m (Rx)
001 10YY YYXX XXXX abcd,efgh m (Rx),(AC)
LCP Y,X
Function
Remark
Flag
Y=000- No Use
Y=000- No Use
ADC X
001 0000 00XX XXXX
(AC) m (Rx)+(AC)+(CF)
CF
ADC* X
001 0000 10XX XXXX
(AC),(Rx) m (Rx)+(AC)+(CF)
CF
SBC X
001 0001 00XX XXXX
(AC) m (Rx)+(AC)B+(CF)
CF
SBC* X
001 0001 10XX XXXX
(AC),(Rx) m (Rx)+(AC)B+(CF)
CF
ADD X
001 0010 00XX XXXX
(AC) m (Rx)+(AC)
CF
ADD* X
001 0010 10XX XXXX
(AC),(Rx) m (Rx)+(AC)
CF
SUB X
001 0011 00XX XXXX
(AC) m (Rx)+(AC) B+1
CF
SUB* X
001 0011 10XX XXXX
(AC),(Rx) m (Rx)+(AC) B+1
CF
ADN X
001 0100 00XX XXXX
(AC) m (Rx)+(AC)
ADN* X
001 0100 10XX XXXX
(AC),(Rx) m (Rx)+(AC)
AND X
001 0101 00XX XXXX
(AC) m (Rx) AND (AC)
AND* X
001 0101 10XX XXXX
(AC),(Rx) m (Rx) AND (AC)
EOR X
001 0110 00XX XXXX
(AC) m (Rx) EOR (AC)
EOR* X
001 0110 10XX XXXX
(AC),(Rx) m (Rx) EOR (AC)
OR X
001 0111 00XX XXXX
(AC) m (Rx) OR (AC)
OR* X
001 0111 10XX XXXX
(AC),(Rx) m (Rx) OR (AC)
ADCI Y,D
001 1000 0DDD DYYY
(AC) m (Ry)+(D)+(CF)
CF
ADCI* Y,D
001 1000 1DDD DYYY
(AC),(Ry) m (Ry)+(D)+(CF)
CF
SBCI Y,D
001 1001 0DDD DYYY
(AC) m (Ry)+(D)B+(CF)
CF
SBCI* Y,D
001 1001 1DDD DYYY
(AC),(Ry) m (Ry)+(D)B+(CF)
CF
ADDI Y,D
001 1010 0DDD DYYY
(AC) m (Ry)+(D)
CF
ADDI* Y,D
001 1010 1DDD DYYY
(AC),(Ry) m (Ry)+(D)
CF
SUBI Y,D
001 1011 0DDD DYYY
(AC) m (Ry)+(D)B+1
CF
SUBI* Y,D
001 1011 1DDD DYYY
(AC),(Ry) m (Ry)+(D)B+1
CF
ADNI Y,D
001 1100 0DDD DYYY
(AC) m (Ry)+(D)
ADNI* Y,D
001 1100 1DDD DYYY
(AC),(Ry) m (Ry)+(D)
ANDI Y,D
001 1101 0DDD DYYY
(AC) m (Ry) AND (D)
ANDI* Y,D
001 1101 1DDD DYYY
(AC),(Ry) m (Ry) AND (D)
EORI Y,D
001 1110 0DDD DYYY
(AC) m (Ry) EOR (D)
EORI* Y,D
001 1110 1DDD DYYY
(AC),(Ry) m (Ry) EOR (D)
ORI Y,D
001 1111 0DDD DYYY
(AC) m (Ry) OR (D)
ORI* Y,D
001 1111 1DDD DYYY
(AC),(Ry) m (Ry) OR (D)
MRW Y,X
011 100Y YYXX XXXX
(AC),(Ry) m (Rx)
MWR X,Y
011 110Y YYXX XXXX
(AC),(Rx) m (Ry)
LDS X,D
010 01DD DDXX XXXX (AC),(Rx) m (D)
010 0000 00XX XXXX (AC),(Rx) m Port(S)
IPS X
IPM X
Preliminary
010 0000 10XX XXXX
(AC),(Rx) m Port(M)
7
Ver. 0.0
APU4003
Instruction
IPA X
Machine Code
010 0001 00XX XXXX
(AC),(Rx) m Port(A)
IPA* X
010 0001 01XX XXXX
(AC),(Rx) m Port(A)
IPB X
010 0001 10XX XXXX
(AC),(Rx) m Port(B)
IPB* X
010 0001 11XX XXXX
(AC),(Rx) m Port(B)
MAF X
011 0001 00XX XXXX
(AC),(Rx) m STS1
MSB X
010 0010 00XX XXXX
(AC),(Rx) m STS2
MSC X
011 0000 00XX XXXX
(AC),(Rx) m STS3
STA X
010 0010 10XX XXXX
(Rx) m (AC)
SR0 X
010 0011 00XX XXXX
(ACn),(Rxn) m (Rxn+1)
(AC3),(Rx3) m 0
SR1 X
010 0011 01XX XXXX
(ACn),(Rxn) m (Rxn+1)
(AC3),(Rx3) m 1
SL0 X
010 0011 10XX XXXX
(ACn),(Rxn) m (Rxn-1)
(AC0),(Rx0) m 0
SL 1 X
010 0011 11XX XXXX
(ACn),(Rxn) m (Rxn-1)
(AC0),(Rx0) m 1
LDA X
011 0111 10XX XXXX
(AC) m (Rx)
JB0 X
100 00XX XXXX XXXX (PC) m X
100 01XX XXXX XXXX (PC) m X
if (AC0)=1
100 10XX XXXX XXXX (PC) m X
100 11XX XXXX XXXX (PC) m X
if (AC2)=1
101 00XX XXXX XXXX (PC) m X
101 01XX XXXX XXXX (PC) m X
if (AC) z0
if (CF)=0
if (AC)=0
JC X
101 10XX XXXX XXXX (PC) m X
101 11XX XXXX XXXX (PC) m X
JMP X
110 00XX XXXX XXXX (PC) m X
CALL X
110 01XX XXXX XXXX
JB1 X
JB2 X
JB3 X
JNZ X
JNC X
JZ X
Function
Flag
I/OA m I/P
I/OB m I/P
TF2: AC=0
TF3: CF
B0: BCF
B1: SCF1(MPT)
B2: SCF2(HRF)
B3: SCF3(SPT)
B0: SCF4(INT)
B1: SCF5(TMR)
B2: PH15
B3: SCF7(PDV)
if (AC1)=1
if (AC3)=1
if (CF)=1
(STACK) m (PC)+1
(PC) m X
RTS
110 1000 0000 0000
(PC) m (STACK)
SMS X
111 0000 000X XXXX
SEF0~3 m X0~3
SEF4 m X4
TMS X
111 0010 00XX XXXX
SF X
111 0100 0XXX XXXX
Preliminary
Remark
TIMER m X
X6: M-PORT Pull-Low
X5: S-PORT Pull-Low
X3: HALT After Light
X2: LIGHT ON
X1: BCF Set
X0: CF Set
8
S1~4 is Enabled
M1~4 Enable
SCF3
SCF1
HRF0
HRF1
BCF
CF
Ver. 0.0
APU4003
Instruction
RF X
Machine Code
111 0110 0XXX XXXX
ALM X
111 0111 XXXX XXXX
SIE X
111 1000 XXXX XXXX
SIE* X
111 1010 0000 XXXX
PLC X
111 110X XXXX XXXX
HALT
111 1111 1111 1111
Function
X6: M-PORT Low-L-H
X5: S-PORT Low-L-H
X2: LIGHT OFF
X1: BCF Reset
X0: CF Reset
X7,X6
0,1
1,0
Signal
DC
1K/2K
Xn=1
X5
X4
Signal
1Hz
2Hz
Xn=1
X2
X1
Signal
8Hz
16Hz
X5~7: HEF1~3 is Enabled
X0~3: IEF0~3 is Enabled
X0~3: IEF0~3 is Enabled
X0~3: Reset HRF0~3
X8: Reset PH11~15
Remark
Flag
1,1
4kHz
X3
4Hz
X0
32Hz
Symbol description
AC:
ACn:
Rx:
Rxn:
Ry:
D:
PC:
:
Accumulator
Accumulator Bit N
Memory of Address X
Memory Bit N of Address X
Memory of Working Register Y
Immediate Data
Program Counter
LCD Latch
Preliminary
CF:
BCF:
IEFn:
HEFn:
HRFn:
SEFn:
SCFn:
9
Carry Flag
Backup Flag
Interrupt Enable Flag
HALT Release Enable Flag
HALT Release Flag
Switch Enable Flag
Start Condition Flag
Ver. 0.0