TI V62/10605-01XE

INA129-EP
www.ti.com
SBOS508 – DECEMBER 2009
PRECISION, LOW POWER INSTRUMENTATION AMPLIFIERS
Check for Samples: INA129-EP
FEATURES
1
•
•
•
•
•
•
Low Offset Voltage
Low Input Bias Current
High CMR
Inputs Protected to ±40 V
Wide Supply Range: ±2.25 V to ±18 V
Low Quiescent Current
APPLICATIONS
•
•
•
•
•
Bridge Amplifier
Thermocouple Amplifier
RTD Sensor Amplifier
Medical Instrumentation
Data Acquisition
SUPPORTS DEFENSE, AEROSPACE
AND MEDICAL APPLICATIONS
•
•
•
•
•
•
•
Controlled Baseline
One Assembly/Test Site
One Fabrication Site
Available in Military (–55°C/125°C)
Temperature Range (1)
Extended Product Life Cycle
Extended Product-Change Notification
Product Traceability
D PACKAGE
(TOP VIEW)
(1)
RG
1
8
RG
V- IN
2
7
V+
V+IN
3
6
VO
V-
4
5
Ref
Custom temperature ranges available
DESCRIPTION
The INA129 is a low power, general purpose instrumentation amplifier offering excellent accuracy. The versatile
3-op amp design and small size make it ideal for a wide range of applications. Current-feedback input circuitry
provides wide bandwidth even at high gain (200 kHz at G = 100).
A single external resistor sets any gain from 1 to 10,000. The INA129 provides an industry-standard gain
equation; the INA129 gain equation is compatible with the AD620.
The INA129 is laser trimmed for very low offset voltage, drift and high common-mode rejection (113 dB at
G ≥ 100). It operates with power supplies as low as ±2.25 V, and quiescent current is only 750 μA - ideal for
battery operated systems. Internal input protection can withstand up to ±40 V without damage.
The INA129 is available in an SO-8 surface-mount package specified for the –55°C to 125°C temperature range.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated
INA129-EP
SBOS508 – DECEMBER 2009
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
V+
7
G=1+
INA129
2
VIN
49.4 kW
RG
Over-Voltage
Protection
A1
40 kW
1
8
VIN
6
A3
RG
+
40 kW
24.7 kW
3
VO
24.7 kW
5
A2
Over-Voltage
Protection
40 kW
Ref
40 kW
4
V-
ORDERING INFORMATION (1)
(1)
(2)
TA
PACKAGE (2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
–55°C to 125°C
SOIC-D
INA129MDREP
129EP
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
VS
VALUE
UNIT
Supply voltage
±18
V
Analog input voltage range
±40
Output short-circuit (to ground)
V
Continuous
TA
Operating temperature
–55 to 125
°C
TSTG
Storage temperature range
–55 to 125
°C
TJ
Junction temperature
150
°C
Lead temperature (soldering, 10s)
300
°C
(1)
2
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
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ELECTRICAL CHARACTERISTICS
At TA = 25°C, VS = ±15 V, RL = 10 kΩ (unless otherwise noted)
Boldface limits apply over the specified temperature range, TA = –55°C to 125°C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
Offset Voltage, RTI
Initial
vs power supply
TA = 25°C
±100 ±800/G
Over temperature
±150 ±2050/G
TA = 25°C, VS = ±2.25 V to ±18 V
±1.6 ±175/G
Over temperature
±1.8 ±175/G
Long-term stability
±1 ±3/G
10
Impedance, differential
Common mode voltage range (1)
VO = 0 V
µV/mo
|| 2
Ω || pF
Ω || pF
(V+) − 2
(V+) − 1.4
(V−) + 2
(V−) + 1.7
Safe input voltage
Common-mode rejection
µV/V
1011||9
10
Common mode
µV
V
V
±40
VCM = ±13 V,
ΔRS = 1 kΩ
G=1
75
Over temperature
67
G = 10
93
Over temperature
84
G = 100
113
Over temperature
98
G = 1000
113
Over temperature
98
V
86
106
dB
125
130
CURRENT
±2
Bias current
Over temperature
±1
Offset Current
±8
±16
Over temperature
±8
±16
nA
nA
NOISE
Noise voltage, RTI
Noise current
G = 1000,
RS = 0 Ω
G = 1000,
RS = 0 Ω
f = 10 Hz
10
f = 100 Hz
8
f = 1 kHz
8
fB = 0.1 Hz to 10 Hz
0.2
f = 10 Hz
0.9
f = 1 kHz
0.3
fB = 0.1 Hz to 10 Hz
30
nV/√Hz
µVpp
pA/√Hz
pAPP
GAIN
1+
(49.4 kΩ/RG)
Gain equation
Range of gain
1
G=1
10000
±0.05
Over temperature
G = 10
Gain error
±0.02
(1)
±0.1
±0.5
±0.65
±0.05
Over temperature
G = 1000
V/V
±0.15
Over temperature
G = 100
V/V
%
±0.65
±1.1
±0.5
±2
Input common-mode range varies with output voltage — see typical curves.
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ELECTRICAL CHARACTERISTICS (continued)
At TA = 25°C, VS = ±15 V, RL = 10 kΩ (unless otherwise noted)
Boldface limits apply over the specified temperature range, TA = –55°C to 125°C.
PARAMETER
TEST CONDITIONS
Gain vs temperature (2)
49.4-kΩ resistance (2)
MIN
TYP
G=1
ppm/°C
±25
±100
ppm/°C
±0.0001
±0.0018
Over temperature
±0.0035
G = 10
Nonlinearity
UNIT
±10
(3)
VO = ±13.6 V,
G=1
MAX
±1
±0.0003
Over temperature
±0.0035
±0.0055
G = 100
±0.0005
Over temperature
% of FSR
±0.0035
±0.0055
G = 1000
±0.001
See
(4)
OUTPUT
Voltage
Positive
RL = 10 kΩ
(V+) − 1.4
(V+) − 0.9
Negative
RL = 10 kΩ
(V−) + 1.4
(V−) + 0.8
Load capacitance stability
Short-curcuit current
V
1000
pF
+6/−15
mA
FREQUENCY RESPONSE
Bandwidth, −3 dB
Slew rate
Settling time, 0.01%
Overload recovery
G=1
1300
G = 10
700
G = 100
200
G = 1000
20
VO = ±10 V,
G = 10
4
G=1
7
G = 10
7
G = 100
9
G = 1000
80
50% overdrive
4
kHz
V/µs
µs
µs
POWER SUPPLY
Voltage range
±2.25
VIN = 0 V
Current, total
±15
±18
±700
±750
Over temperature
±1200
V
µA
TEMPERATURE RANGE
Specification
−55
125
°C
Operating
−55
125
°C
θJA
(2)
(3)
(4)
4
8-pin DIP
80
SO-8 SOIC
150
°C/W
Specified by wafer test.
Temperature coefficient of the 49.4-kΩ term in the gain equation.
Nonlinearity measurements in G = 1000 are dominated by noise. Typical nonlinearity is ±0.001%.
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TYPICAL CHARACTERISTICS
At TA = 25°C, VS = ±15 V, unless otherwise noted.
GAIN
vs
FREQUENCY
COMMON-MODE REJECTION
vs
FREQUENCY
140
60
G =1000V/V
G =100V/V
G = 1000V/V
Common-Mode Rejection (dB)
50
40
Gain (dB)
G = 100V/V
30
20
G = 10V/V
10
0
G = 1V/V
− 10
− 20
120
G =10V/V
100
G =1V/V
80
60
40
20
0
1k
10k
100k
10M
1M
10
Frequency (Hz)
100
1k
10k
100k
1M
Frequency (Hz)
Figure 1.
Figure 2.
POSITIVE POWER SUPPLY REJECTION
vs
FREQUENCY
NEGATIVE POWER SUPPLY REJECTION
vs
FREQUENCY
140
140
Power Supply Rejection (dB)
Power Supply Rejection (dB)
G = 1000V/V
120
G =1000V/V
100
G =100V/V
80
60
G= 10V/V
40
G=1V/V
20
0
10
100
1k
10k
100k
1M
120
G =100V/V
100
80
60
G=10V/V
40
G=1V/V
20
0
10
Frequency (Hz)
Frequency (Hz)
Figure 3.
Figure 4.
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TYPICAL CHARACTERISTICS (continued)
At TA = 25°C, VS = ±15 V, unless otherwise noted.
INPUT COMMON-MODE RANGE
vs
OUTPUT VOLTAGE
(VS = ±15 V)
INPUT COMMON-MODE RANGE
vs
OUTPUT VOLTAGE
(VS = ±5 V, ±2.5 V)
5
15
G ≥ 10
G=1
G=1
5
+15V
VD/2
0
VD/2
5
+
VO
Ref
+
VCM
-15V
10
3
G=1
2
1
0
G=1
1
2
3
VS = ±5V
VS = ±2.5V
5
15
-15
-10
0
-5
10
5
-5
15
-4
-3
-1
-2
0
1
2
Output Voltage (V)
Output Voltage (V)
Figure 5.
Figure 6.
INPUT-REFERRED NOISE
vs
FREQUENCY
SETTLING TIME
vs
GAIN
1k
¾
Input Bias Current Noise (pA/√Hz)
100
10
G =10V/V
10
1
G =100, 1000V/V
Current Noise
1
0.1
1
10
100
1k
10k
4
5
0.01%
Settling Time (ms)
G = 1V / V
3
100
100
¾
Input-Referred Voltage Noise (nV/√Hz)
G=1
G ≥ 10
4
0.1%
10
1
1
10
100
1000
Gain (V/V)
Frequency (Hz)
Figure 7.
6
G ≥ 10
G ≥ 10
4
10
Common-Mode Voltage (V)
Common-Mode Voltage (V)
G ≥ 10
Figure 8.
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TYPICAL CHARACTERISTICS (continued)
At TA = 25°C, VS = ±15 V, unless otherwise noted.
QUIESCENT CURRENT AND SLEW RATE
vs
TEMPERATURE
INPUT OVER-VOLTAGE V/I CHARACTERISTICS
0.85
6
0.8
5
5
Slew Rate
0.7
3
IQ
0.65
Input Current (mA)
4
0.75
3
Slew Rate (V/ms)
Quiescent Current (mA)
4
2
2
-50
-25
0
25
50
75
100
G = 1V / V
0
1
+15V
G=1V/V
2
3
VIN
G = 1000V/V
IIN 15V
5
1
-75
G = 1000V/V
1
4
06
Flat region represents
normal linear operation.
125
-50
-40
-30
Temperature (°C)
-20
-10
0
10
30
20
40
50
Input Voltage (V)
Figure 9.
Figure 10.
INPUT OFFSET VOLTAGE WARM-UP
INPUT BIAS CURRENT
vs
TEMPERATURE
10
2
6
Input Bias Current (nA)
Offset Voltage Change (mV)
8
4
2
0
-2
-4
1
IOS
0
IB
1
Typical IB and IOS
Range ±2nA at 25°C
-6
-8
-10
0
100
200
300
400
500
2
-75
-50
Time (ms)
-25
0
25
50
75
100
125
Temperature (°C)
Figure 11.
Figure 12.
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TYPICAL CHARACTERISTICS (continued)
At TA = 25°C, VS = ±15 V, unless otherwise noted.
OUTPUT VOLTAGE SWING
vs
POWER SUPPLY VOLTAGE
(V+)
(V+)
(V+)-0.4
(V+)-0.4
Output Voltage Swing (V)
Output Voltage (V)
OUTPUT VOLTAGE SWING
vs
OUTPUT CURRENT
(V+)-0.8
(V+)-1.2
(V-)+1.2
(V-)+0.8
+25°C
(V+)-0.8
(V+)-1.2
-40 °C
RL = 10 k Ω
+25°C
(V-)+1.2
-40 °C
+85°C
(V-)+0.8
(V-)
(V-)
0
1
2
3
0
4
5
10
15
Figure 13.
Figure 14.
SHORT-CIRCUIT OUTPUT CURRENT
vs
TEMPERATURE
MAXIMUM OUTPUT VOLTAGE
vs
FREQUENCY
30
16
Peak-to-Peak Output Voltage (VPP)
18
-I SC
14
12
10
8
6
+ISC
4
20
Power Supply Voltage (V)
Output Current (mA)
Short-Circuit Current (mA)
+85°C
-40 °C
(V-)+0.4
(V-)+0.4
2
G =10, 100
25
G=1
G = 1000
20
15
10
5
0
0
-75
-50
-25
0
25
50
75
100
125
1k
10k
100k
1M
Frequency (Hz)
Temperature (°C)
Figure 15.
8
+85°C
Figure 16.
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TYPICAL CHARACTERISTICS (continued)
At TA = 25°C, VS = ±15 V, unless otherwise noted.
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
SMALL SIGNAL
(G = 1, 10)
1
TH D + N (% )
VO = 1 V r m s
500kHz Measurement
Bandwidth
0.1
G=1
RL = 10kW
G=1
G =100, RL = 100kW
20mV/div
0.01
G =10V/V
RL = 100kW
G =1, RL = 100kW
Dashed Portion
is noise limited.
0.001
100
10k
1k
G = 10
100k
5ms/div
Frequency (Hz)
Figure 17.
Figure 18.
SMALL SIGNAL
(G = 100, 1000)
LARGE SIGNAL
(G = 1, 10)
G = 10 0
G=1
20mV/div
5V/div
G = 10 0 0
G = 10
5ms/div
20ms/div
Figure 19.
Figure 20.
LARGE SIGNAL
(G = 100, 1000)
VOLTAGE NOISE 0.1 Hz TO 10 Hz
INPUT-REFERRED, G ≥ 100
G =100
5V/div
0.1mV/div
G =1000
20ms/div
1s/div
Figure 21.
Figure 22.
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APPLICATION INFORMATION
Figure 23 shows the basic connections required for operation of the INA129. Applications with noisy or high
impedance power supplies may require decoupling capacitors close to the device pins as shown.
The output is referred to the output reference (Ref) terminal which is normally grounded. This must be a
low-impedance connection to assure good common-mode rejection. A resistance of 8 Ω in series with the Ref pin
will cause a typical device to degrade to approximately 80 dB CMR (G = 1).
Setting the Gain
Gain is set by connecting a single external resistor, RG, between pins 1 and 8.
49.4 kW
G=1+ ¾
RG
(1)
Commonly used gains and resistor values are shown in Figure 23.
The 49.9-kΩ term in Equation 1 comes from the sum of the two internal feedback resistors of A1 and A2. These
on-chip metal film resistors are laser trimmed to accurate absolute values. The accuracy and temperature
coefficient of these internal resistors are included in the gain accuracy and drift specifications of the INA129.
The stability and temperature drift of the external gain setting resistor, RG, also affects gain. RG’s contribution to
gain accuracy and drift can be directly inferred from Equation 1. Low resistor values required for high gain can
make wiring resistance important. Sockets add to the wiring resistance which will contribute additional gain error
(possibly an unstable gain error) in gains of approximately 100 or greater.
V+
0.1mF
G=1+
DESIRED
GAIN (V/V)
1
2
5
10
20
50
100
200
500
1000
2000
5000
10000
49.4kW
RG
RG
(W)
NC
49.4K
12.35K
5489
2600
1008
499
248
99
49.5
24.7
9.88
4.94
7
VIN-
NEAREST
1% RG (W)
2
Over Voltage
Protection
A1
40kΩ
1
NC
49.9K
12.4K
5.49K
2.61K
1K
499
249
100
49.9
24.9
9.76
4.87
40kΩ
VO = G · (VIN+ - VIN-)
24.7kΩ
A3
RG
+
8
+
VIN
3
24.74kΩ
Over Voltage
Protection
A2
40kΩ
4
NC: No Connection
6
40kΩ
5
Ref
Load VO
-
0.1mF
V IN
V-
Also drawn in simplified form:
VO
RG
+
V IN
Ref
Figure 23. Basic Connections
Dynamic Performance
Figure 1 shows that, despite its low quiescent current, the INA129 achieves wide bandwidth, even at high gain.
This is due to the current-feedback topology of the input stage circuitry. Settling time also remains excellent at
high gain.
10
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Noise Performance
The INA129 provides very low noise in most applications. Low frequency noise is approximately 0.2 μVPP
measured from 0.1 Hz to 10 Hz (G ≥ 100). This provides dramatically improved noise when compared to
state-of-the-art chopper-stabilized amplifiers.
Offset Trimming
The INA129 is laser trimmed for low offset voltage and offset voltage drift. Most applications require no external
offset adjustment. Figure 24 shows an optional circuit for trimming the output offset voltage. The voltage applied
to Ref terminal is summed with the output. The operational amplifier buffer provides low impedance at the Ref
terminal to preserve good common-mode rejection.
VIN
V+
RG
+
VIN
INA129
VO
100mA
1/2 REF200
Ref
OPA177
±10mV
Adjustment Range
10kW
100W
100W
100mA
1/2 REF200
V-
Figure 24. Optional Trimming of Output Offset Voltage
Input Bias Current Return Path
The input impedance of the INA129 is extremely high (approximately 1010 Ω). However, a path must be provided
for the input bias current of both inputs. This input bias current is approximately ±2 nA. High input impedance
means that this input bias current changes very little with varying input voltage.
Input circuitry must provide a path for this input bias current for proper operation. Figure 25 shows various
provisions for an input bias current path. Without a bias current path, the inputs will float to a potential which
exceeds the common-mode range, and the input amplifiers will saturate.
If the differential source resistance is low, the bias current return path can be connected to one input (see the
thermocouple example in Figure 25). With higher source impedance, using two equal resistors provides a
balanced input with possible advantages of lower input offset voltage due to bias current and better
high-frequency common-mode rejection.
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Microphone,
Hydrophone
etc.
INA129
47kW
47kW
Thermocouple
INA129
10kW
INA129
Center-tap provides
bias current return.
Figure 25. Providing an Input Common-Mode Current Path
Input Common-Mode Range
The linear input voltage range of the input circuitry of the INA129 is from approximately 1.4 V below the positive
supply voltage to 1.7 V above the negative supply. As a differential input voltage causes the output voltage
increase, however, the linear input range will be limited by the output voltage swing of amplifiers A1 and A2. So
the linear common-mode input range is related to the output voltage of the complete amplifier. This behavior also
depends on supply voltage (see Figure 5 and Figure 6).
Input-overload can produce an output voltage that appears normal. For example, if an input overload condition
drives both input amplifiers to their positive output swing limit, the difference voltage measured by the output
amplifier will be near zero. The output of A3 will be near 0 V even though both inputs are overloaded.
Low Voltage Operation
The INA129 can be operated on power supplies as low as ±2.25 V. Performance remains excellent with power
supplies ranging from ±2.25 V to ±18 V. Most parameters vary only slightly throughout this supply voltage range.
Operation at very low supply voltage requires careful attention to assure that the input voltages remain within
their linear range. Voltage swing requirements of internal nodes limit the input common-mode range with low
power supply voltage. Figure 5 and Figure 6 show the range of linear operation for ±15 V, ±5 V, and ±2.5 V
supplies.
12
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+5V
2.5V - ∆V
RG
300W
VO
INA129
Ref
2.5V + ∆V
Figure 26. Bridge Amplifier
VIN
+
VO
RG
INA129
Ref
C1
0.1mF
OPA130
R1
1MW
1
f-3dB =
2pR1C1
= 1.59 Hz
Figure 27. AC-Coupled Instrumentation Amplifier
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V+
10.0V
6
REF102
R1
2
R2
4
Pt100
Cu
K
VO
Cu
RG
INA129
Ref
R3
100Ω = Pt100 at 0°C
ISA
TYPE
MATERIAL
+Chromel
-Constantan
+Iron
-Constantan
+Chromel
-Alumel
+Copper
-Constantan
E
J
K
T
SEEBECK
COEFFICIENT
(mV/°C)
R1, R2
58.5
66.5kW
50.2
76.8kW
39.4
97.6kW
38
102kW
Figure 28. Thermocouple Amplifier With RTD Cold-Junction Compensation
VIN
IO =
R1
RG
INA129
V IN
·G
R1
+
Ref
IB
A1
A1
IB ERROR
OPA177
± 1.5 nA
OPA131
± 50 pA
OPA602
± 1 pA
OPA128
± 75 fA
IO
Load
Figure 29. Differential Voltage to Current Converter
14
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Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): INA129-EP
INA129-EP
www.ti.com
SBOS508 – DECEMBER 2009
RG = 5.6kW
2.8kW
G = 10
LA
RA
RG/2
INA129
VO
Ref
2.8kW
390kW
1/2
OPA2131
RL
390kW
VG
10kW
VG
1/2
OPA2131
NOTE: Due to the INA129’s current-feedback
topology, VG is approximately 0.7 V less than
the common-mode input voltage. This DC offset
in this guard potential is satisfactory for many
guarding applications.
Figure 30. ECG Amplifier With Right-Leg Drive
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Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): INA129-EP
15
PACKAGE OPTION ADDENDUM
www.ti.com
23-Oct-2010
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
INA129MDREP
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
Request Free Samples
V62/10605-01XE
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
Request Free Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF INA129-EP :
• Catalog: INA129
NOTE: Qualified Version Definitions:
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
23-Oct-2010
• Catalog - TI's standard catalog product
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
INA129MDREP
Package Package Pins
Type Drawing
SOIC
D
8
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2500
330.0
12.4
Pack Materials-Page 1
6.4
B0
(mm)
K0
(mm)
P1
(mm)
5.2
2.1
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA129MDREP
SOIC
D
8
2500
367.0
367.0
35.0
Pack Materials-Page 2
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