BB SHC615

SHC
®
SHC615
615
SHC
615
Wide-Bandwidth,
DC RESTORATION CIRCUIT
FEATURES
APPLICATIONS
● PROPAGATION DELAY: 2.2ns
● BROADCAST/HDTV EQUIPMENT
● BANDWIDTH: OTA: 750MHz
Comparator: 280MHz
● TELECOMMUNICATIONS EQUIPMENT
● LOW INPUT BIAS CURRENT: –0.3µA
● CAD MONITORS/CCD IMAGE
PROCESSING
● HIGH-SPEED DATA ACQUISITION
● SAMPLE/HOLD
SWITCHING TRANSIENTS: +1/–7mV
● NANO SECOND PULSE INTEGRATOR/
PEAK DETECTORS
● SAMPLE/HOLD
FEEDTHROUGH REJECTION: 100dB
● PULSE CODE MODULATOR/
DEMODULATOR
● COMPLETE VIDEO DC LEVEL
RESTORATION
● CHARGE INJECTION: 40fC
● HOLD COMMAND DELAY TIME: 3.8ns
● TTL/CMOS HOLD CONTROL
● SAMPLE/HOLD AMPLIFIER
DESCRIPTION
The SHC615 is a complete subsystem for very fast
and precise DC restoration, offset clamping, and low
frequency hum suppression of wideband amplifiers or
buffers. Designed to stabilize the performance of
video signals, it can also be used as a sample/hold
amplifier, high-speed integrator, or peak detector for
nanosecond pulses. A wideband Operational
Transconductance Amplifier (OTA) with a high-impedance cascode current source output and fast sampling comparator set a new standard for high-speed
applications. Both can be used as stand-alone circuits
or combined to form a more complex signal processing stage. The self-biased, bipolar OTA can be viewed
as an ideal voltage-controlled current source and is
Ground
9
optimized for low input bias current. The sampling
comparator has two identical high-impedance inputs
and a current source output optimized for low output
bias current and offset voltage; it can be controlled by
a TTL-compatible switching stage within a few
nanoseconds. The transconductance of the OTA and
sampling comparator can be adjusted by an external
resistor, allowing bandwidth, quiescent current, and
gain tradeoffs to be optimized.
The SHC615 is available in SO-14 surface mount and
14-pin plastic DIPs, and is specified over the extended temperature range of –40°C to +85°C.
CHOLD
Base
4
3
2
Hold Control
7
S/H 10
In+
S/H 11
In–
Switching
Stage
Emitter
OTA
12
Sampling
Comparator (SC)
SOTA ∞
Biasing
1
Collector (IOUT)
IQ Adjust
SHC615
13
+VCC
5
–VCC
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1994 Burr-Brown Corporation
PDS-1214C
Printed in the U.S.A. May, 1995
DC SPECIFICATIONS
At VCC = ±5V, RLOAD = 100Ω, RQ = 300Ω, RIN = 150Ω and TA = +25°C, unless otherwise specified.
SHC615AP, AU
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
±40
50
8
40
55
mV
µV/°C
dB
–0.3
1
±0.9
µA
nA/°C
–77
+100
OTA
OFFSET VOLTAGE, VE at VB = 0
Initial
vs Temperature
vs Supply (tracking)
VCC = ±4.5V to ±5.5V
B-INPUT BIAS CURRENT
Initial
vs Temperature
C-OUTPUT BIAS CURRENT, IC at VB = 0
Initial
–200
B-INPUT IMPEDANCE
INPUT NOISE
Voltage Noise Density, B-to-E
Voltage Noise Density, B-to-C
fOUT = 100kHz to 100MHz
fOUT = 100kHz to 100MHz
INPUT VOLTAGE RANGE
OUTPUT
Output Voltage Compliance
C-Current Output
E-Current Output
C-Output Impedance
E-Output Impedance
Open-Loop Gain
TRANSCONDUCTANCE
±18
±18
Small Signal, <200mV
µA
4.4
MΩ
2.2
4.5
nV/√Hz
nV/√Hz
±3.4
V
±3.2
±20
±20
0.5
12
96
V
mA
mA
MΩ
Ω
dB
70
mA/V
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are
subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN
does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
®
SHC615
2
DC SPECIFICATIONS (CONT)
At VCC = ±5V, RLOAD = 1kΩ, RQ = 300Ω, and TA = +25°C, unless otherwise specified.
SHC615AP, AU
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
INPUT BIAS CURRENT
Initial
vs Temperature
1.0
–2.3
±5
µA
nA/°C
C-OUTPUT BIAS CURRENT
Initial
vs Temperature
±10
±13
±50
µA
nA/°C
INPUT IMPEDANCE
Input Impedance
0.2
MΩ
5
nV/√Hz
±3.0
±3.2
V
V
±3.5
±3.2
620 || 2
83
V
mA
kΩ || pF
dB
22
mA/V
COMPARATOR
INPUT NOISE
Voltage Noise Density
fOUT = 100kHz to 100MHz
INPUT VOLTAGE RANGE
Input Voltage Range
Common-Mode Input Range
OUTPUT
Output Voltage Compliance
C-Current Output
C-Output Impedance
Open-Loop Gain
±2.5
TRANSCONDUCTANCE
Transconductance
HOLD CONTROL
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
TRANSFER CHARACTERISTICS
Charge Injection
Feedthrough Rejection
+2
0
+VCC +0.6
0.8
V Hold Control = 5.0V
V Hold Control = 0.8V
1
0.05
V
V
µA
µA
Track-To-Hold
Hold Mode
40
–100
fC
dB
COMPLETE SHC615
POWER SUPPLY
Rated Voltage
Derated Performance
Quiescent Current
Quiescent Current Range
±4.5
±12
RQ = 300Ω
Programmable (Useful Range)
TEMPERATURE RANGE
Operating
Storage
–40
–40
±5
±15
±3 to ±36
±5.5
±18
V
V
mA
mA
+85
+125
°C
°C
®
3
SHC615
AC SPECIFICATIONS
At VCC = ±5V, RLOAD = 100Ω, RSOURCE = 50Ω, RQ = 300Ω, and TA = +25°C, unless otherwise specified.
SHC615AP, AU
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
FREQUENCY DOMAIN
OTA
LARGE-SIGNAL BANDWIDTH
(–3dB), (B-to-E)
SMALL-SIGNAL BANDWIDTH B-TO-E
DIFFERENTIAL GAIN (B-TO-E)
DIFFERENTIAL PHASE
(B-to-E)
HARMONIC DISTORTION (B-TO-E)
Second Harmonic
Third Harmonic
LARGE SIGNAL BANDWIDTH
(–3dB), (B-to-C)
SMALL SIGNAL BANDWIDTH
B-to-C
VOUT = 5.0Vp-p
VOUT = 2.8Vp-p
VOUT = 1.4Vp-p
430
540
620
MHz
MHz
MHz
VOUT = 0.2Vp-p
520
MHz
f = 4.43MHz, VOUT = 0.7Vp-p,
RL = 150Ω
RL = 500Ω
1.8
0.1
%
%
f = 4.43MHz, VOUT = 0.7Vp-p,
RL = 150Ω
RL = 500Ω
0.07
0.01
°
°
–50
–46
dBc
dBc
VOUT = 5.0Vp-p
VOUT = 2.8Vp-p
VOUT = 1.4Vp-p
250
580
750
MHz
MHz
MHz
VOUT = 0.2Vp-p
680
MHz
f = 30MHz, VOUT = 1.4Vp-p
COMPARATOR
Sample Mode
BANDWIDTH
(–3dB)
IOUT = 4mAp-p
IOUT = 2mAp-p
IOUT = 1mAp-p
240
270
280
MHz
MHz
MHz
2Vp-p Step, 10% to 90%
B-to-E
B-to-C
1.1
1.2
ns
ns
1800
1700
3300
3000
V/µs
V/µs
V/µs
V/µs
TIME DOMAIN
OTA
RISE TIME
SLEW RATE
2Vp-p,B-to-E
B-to-C
5Vp-p,B-to-E
B-to-C
COMPARATOR
RISE TIME
(Sample Mode)
10% to 90%, RL = 50Ω, IOUT = ±2mA
CLOAD = 1pF
2.5
ns
SLEW RATE
(Sample Mode)
10% to 90%, RL = 50Ω, IOUT = ±2mA
CLOAD = 1pF
0.95
mA/ns
tPDH, VOD = 200mV
tPDL, VOD = 200mV
Sample-to-Hold
Hold-to-Sample
2.2
2.15
3.8
3.0
ns
ns
ns
ns
DYNAMIC CHARACTERISTICS
Propagation Delay Time
Propagation Delay Time
Delay Time
®
SHC615
4
PIN CONFIGURATION
BLOCK DIAGRAM
Top View
DIP, SO-14
Ground
9
IQ Adjust
1
Emitter, E
2
Base, B
3
•
CHOLD
Base
4
3
2
14 NC
Hold
Control
13 +VCC
7
12 IOUT, Collector, C
SHC615
CHOLD
4
11 S/H In–
–VCC
5
10 S/H In+
NC
6
9
Ground
Hold Control
7
8
NC
S/H 10
In+
S/H 11
In–
OTA
Sampling
Comparator (SC)
SOTA ∞
5
–VCC
Any integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
NOTE: (1) Inputs are internally diode-clamped to ±VCC.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet published specifications.
PACKAGE/ORDERING INFORMATION
PACKAGE
DRAWING TEMPERATURE
NUMBER(1)
RANGE
010
235
IQ Adjust
ELECTROSTATIC
DISCHARGE SENSITIVITY
Power Supply Voltage (±VCC) .............................................................. ±6V
Input Voltage(1) ........................................................................ ±VCC ±0.7V
Operating Temperature .................................................... –40°C to +85°C
Storage Temperature ...................................................... –40°C to +125°C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
Hold Control .............................................................. –0.5V to +VCC +0.7V
SHC615AP
Plastic 14-Pin DIP
SHC615AU SO 14-Lead Surface-Mount
1
SHC615
13
ABSOLUTE MAXIMUM RATINGS
PACKAGE
12 Collector
(IOUT)
Biasing
+VCC
PRODUCT
Emitter
Switching
Stage
–40°C to +85°C
–40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
®
5
SHC615
TYPICAL PERFORMANCE CURVES
At RQ = 300Ω, TA = +25°C, VCC = ±5V, unless otherwise noted.
TOTAL QUIESCENT CURRENT vs TEMPERATURE
SHC615 TOTAL QUIESCENT CURRENT vs RQ
Total Quiescent Current, IQ (Normalized)
Total Quiescent Current, IQ (mA)
100
10
1
10
100
1000
1.50
1.40
1.30
1.20
1.10
1.00
0.90
0.80
0.70
0.60
0.50
–25
10000
0
25
50
75
100
Temperature (C°)
RQ (Ω)
OPERATIONAL TRANSCONDUCTANCE AMPLIFIER
OTA B-INPUT BIAS CURRENT vs TEMPERATURE
OTA-B INPUT OFFSET VOLTAGE vs TEMPERATURE
12
–0.1
OTA-B Input Offset Voltage (mV)
OTA-B Input Bias Current (µA)
0.0
–0.2
–0.3
–0.4
–0.5
–0.6
–0.7
–0.8
–0.9
25
50
75
6
4
2
100
25
50
75
Temperature (C°)
Temperature (C°)
OTA-B INPUT RESISTANCE vs
TOTAL QUIESCENT CURRENT
OTA-E OUTPUT RESISTANCE vs
TOTAL QUIESCENT CURRENT
18
45
16
40
OTA-E Output Resistance (Ω)
OTA-B Input Resistance (MΩ)
0
8
RE = 100Ω
0
–25
0
–1.0
–25
10
14
12
10
8
6
4
2
100
35
30
25
20
15
10
5
0
0
5
10
15
20
25
30
35
4
40
®
SHC615
9
14
19
24
29
Total Quiescent Current, IQ (mA)
Total Quiescent Current, IQ (mA)
6
34
39
TYPICAL PERFORMANCE CURVES (CONT)
At RQ = 300Ω, TA = +25°C, VCC = ±5V, unless otherwise noted.
OTA-C OUTPUT BIAS CURRENT vs TEMPERATURE
1.8
–60
1.6
–65
OTA-C Output Bias Current (µA)
OTA-C Output Resistance (MΩ)
OTA-C OUTPUT RESISTANCE vs
TOTAL QUIESCENT CURRENT
1.4
1.2
1
0.8
0.6
0.4
0.2
0
5
10
15
20
25
30
35
–70
–75
–80
–85
–90
–95
–100
–40
40
–20
0
OTA TRANSFER CHARACTERISTICS
vs INPUT VOLTAGE
OTA-C Output Current (mA)
20
IQ = ±14mA
15
OTA
VIN
5
100Ω
RC
–5
80
100
IQ = ±25mA
20
IQ = ±5mA
100Ω
RE
0
60
OTA TRANSFER CHARACTERISTIC vs INPUT VOLTAGE
VOUT
150Ω
10
40
25
IQ = ±25mA
OTA-C Output Current (mA)
25
20
Temperature (°C)
Total Quiescent Current, IQ (mA)
–10
–15
15
IQ = ±14mA
10
5
IQ = ±5mA
0
–5
–10
VOUT
150Ω
–15
OTA
VIN
–20
–20
–25
–3.5 –3 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5 2 2.5 3 3.5
–25
–0.2
–0.15
–0.1
OTA-B Input Voltage (V)
–0.05
0
0.05
100Ω
RC
0.1
0.15
0.2
OTA-B Input Voltage (V)
OTA TRANSCONDUCTANCE vs
TOTAL QUIESCENT CURRENT
OTA-TRANSCONDUCTANCE vs FREQUENCY
100
100
80
Transconductance (mA/V)
Transconductance (mA/V)
90
70
60
50
40
Small Signal
(<200mV)
30
20
80
IQ = ±25mA
IQ = ±5mA
60
IQ = ±14mA
40
20
Large Signal
(>200mV)
10
0
0
0
±5
±10
±15
±20
±25
±30
1.0
Total Quiescent Current, IQ (mA)
10k
100k
1M
10M
100M
1G
Frequency (Hz)
®
7
SHC615
TYPICAL PERFORMANCE CURVES (CONT)
At RQ = 300Ω, TA = +25°C, VCC = ±5V, unless otherwise noted.
OTA-E FREQUENCY RESPONSE
20
5Vp-p
2.8Vp-p
40
10
35
1.4Vp-p
30
Gain (dB)
OTA-E Voltage Noise Density (nV/√Hz)
OTA-E VOLTAGE NOISE SPECTRAL DENSITY
45
25
20
0.6Vp-p
0
0.2Vp-p
–10
15
12
10
VIN
–20
2.2nV/√Hz
150Ω
3
OTA
50Ω
5
–30
300k
0
100
1k
10k
100k
2
1M
10M
100
2
50
0
–50
RIN = 150Ω, RL = 100Ω, VIN = 200mVp-p,
tRISE = tFALL = 1.5ns (Generator)
0
20
40
60
1
0
–1
–2
RIN = 150Ω, RL = 100Ω, VIN = 4Vp-p,
tRISE = tFALL = 1.5ns (Generator)
–3
80
100
0
20
40
Time (ns)
60
80
100
Time (ns)
OTA-C FREQUENCY RESPONSE
OTA-C VOLTAGE NOISE SPECTRAL DENSITY
20
90
5Vp-p
2.8Vp-p
80
10
1.4Vp-p
70
0
60
Gain (dB)
OTA-C Voltage Noise Density (nV/√Hz)
1G
OTA-E LARGE SIGNAL PULSE RESPONSE
3
OTA-E Output Voltage (V)
OTA-E Output Voltage (mV)
OTA-E SMALL SIGNAL PULSE RESPONSE
150
–150
100M
Frequency (Hz)
Frequency (Hz)
–100
VOUT
50
40
20
4.5nV/√Hz
0.2Vp-p
–10
VOUT
12
–20
30
0.6Vp-p
–30
150Ω
VIN
50Ω
10
–40
300k
0
100
1k
10k
100k
OTA
2
100Ω
10M
Frequency (Hz)
Frequency (Hz)
®
SHC615
1M
100Ω
3
8
100M
1G
TYPICAL PERFORMANCE CURVES (CONT)
At RQ = 300Ω, TA = +25°C, VCC = ±5V, unless otherwise noted.
OTA-C LARGE SIGNAL PULSE RESPONSE
3
100
2
OTA-C Output Voltage (V)
OTA-C Output Voltage (mV)
OTA-C SMALL SIGNAL PULSE RESPONSE
150
50
0
–50
–100
RIN = 150Ω, RE = 100Ω, R C = 100Ω,
VIN = 200mVp-p, tRISE = tFALL = 1.5ns (Generator)
1
0
–1
–2
RIN = 150Ω, RE = 100Ω, R C = 100Ω,
VIN = 4Vp-p, tRISE = tFALL = 1.5ns (Generator)
–3
–150
0
20
40
60
80
100
0
20
40
80
100
OTA-C HARMONIC DISTORTION vs FREQUENCY
OTA-E HARMONIC DISTORTION vs FREQUENCY
–45
0
RE = 100Ω
OTA-C Harmonic Distortion (dBc)
OTA-E Harmonic Distortion (dBc)
60
Time (ns)
Time (ns)
–46
–47
–48
–49
2f
–50
–51
3f
–52
–53
VOUT = 1.4Vp
RE = RC = 100Ω
–5
–10
–15
–20
–25
–30
2f
–35
–40
3f
–45
–50
1M
10M
100M
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
SAMPLING COMPARATOR
OUTPUT BIAS CURRENT vs TEMPERATURE
INPUT BIAS CURRENT vs TEMPERATURE
20
1.4
S/H In+
15
Output Bias Current (µA)
Input Bias Current (µA)
1.2
1.0
0.8
S/H In–
0.6
0.4
0.2
0
–40
10
5
0
0
5
–10
–20
0
20
40
60
80
–40
100
–20
0
20
40
60
80
100
Temperature (°C)
Temperature (C°)
®
9
SHC615
TYPICAL PERFORMANCE CURVES (CONT)
At RQ = 300Ω, TA = +25°C, VCC = ±5V, unless otherwise noted.
TRANSCONDUCTANCE vs
TOTAL QUIESCENT CURRENT
INPUT RESISTANCE vs TOTAL QUIESCENT CURRENT
0.7
40
Transconductance (mA/V)
Input Resistance (MΩ)
0.6
0.5
0.4
0.3
0.2
30
20
10
0.1
0
5
10
15
20
25
30
35
0
40
0
5
10
Total Quiescent Current, IQ (mA)
Comparator Transconductance (mA/V)
Comparator Output Current (mA)
IQ = ±25mA
4
IQ = ±14mA
2
IQ = ±5mA
–2
–4
–6
–0.2
–0.15
–0.1
–0.05
0
0.05
0.1
25
0.15
50
IQ = ±25mA
40
30
IQ = ±14mA
20
10
IQ = ±5mA
0
–10
–0.2
0.2
–0.15
–0.1
–0.05
0
0.05
0.1
0.15
0.2
Input Voltage (V)
Input Voltage (V)
COMMON-MODE REJECTION vs FREQUENCY
PROPAGATION DELAY vs TOTAL QUIESCENT CURRENT
0
4
–20
3.5
3
–40
Delay (ns)
Common-Mode Rejection (dB)
20
TRANSCONDUCTANCE vs INPUT VOLTAGE
TRANSFER CHARACTERISTICS
6
0
15
Total Quiescent Current, IQ (mA)
–60
Pos
2.5
2
–80
1.5
–100
300k
Neg
1
1M
10M
100M
1G
3
Frequency (Hz)
13
18
21
28
Total Quiescent Current, IQ (mA)
®
SHC615
8
10
33
38
TYPICAL PERFORMANCE CURVES (CONT)
At RQ = 300Ω, TA = +25°C, VCC = ±5V, unless otherwise noted.
PROPAGATION DELAY TIME vs TEMPERATURE
3
2.5
2.8
Propagation Delay (ns)
Propogation Delay (ns)
PROPAGATION DELAY vs OVERDRIVE
3
Pos
2
1.5
Neg
1
VOD
0.5
100Ω 10
100Ω 11 SC
4
VOD
VOD
GND
2.6
2.4
Pos
2.2
Neg
2
1.8
0
0
200
400
600
800
100
1.6
–40
1200
–20
0
∆ Input Voltage (mV)
40
60
80
100
120
Temperature (°C)
PROPAGATION DELAY vs LOAD CAPACITANCE
PROPAGATION DELAY vs SLEW RATE
4
40
Pos
Pos
35
3.5
Propagation Delay (ns)
Propagation Delay (ns)
20
30
25
Neg
20
10
15
10
11
SC
4
CLOAD
5
VIN = 1.2Vpp
3
Neg
2.5
2
+0.6V
1.5
VREF
VOD = 1.2Vp-p
–0.6V
0
1
0
100 200 300 400 500 600 700 800 900 1000
(0)
Capacitive Load, CL (pF)
COMPARATOR RESPONSE TO A
2ns ANALOG INPUT PULSE
COMPARATOR RESPONSE TO A
10ns ANALOG INPUT PULSE
150
150
100
100
IOUT = 4mAp-p
RL = 50Ω
50
Output Voltage (mV)
Output Voltage (mV)
500 250 160 120 96
80
68
60
53
48
(2) (4) (6) (8) (10) (12) (14) (16) (18) (20)
Slew Rate (V/µs)
(Rise Time (ns))
0
–50
–100
IOUT = 4mAp-p
RL = 50Ω
50
0
–50
–100
–150
–150
0
20
40
60
80
100
0
Time (ns)
20
40
60
80
100
Time (ns)
®
11
SHC615
TYPICAL PERFORMANCE CURVES (CONT)
At RQ = 300Ω, TA = +25°C, VCC = ±5V, unless otherwise noted.
SWITCHING TRANSIENTS TEST CIRCUITS
SWITCHING TRANSIENTS
Switching Transients (mV)
5
CD74HCT
100Ω
150Ω
TTL
Off-On
On-Off
0
100Ω
Comparator
–5
200Ω
200Ω
–10
4 50Ω
10
SC
50Ω
7
11
TTL
–15
0
20
40
60
80
100
Time (ns)
FEEDTHROUGH REJECTION vs FREQUENCY
(Off-Isolation)
BANDWIDTH vs OUTPUT CURRENT SWING
0
0
±1mA
–10
–40
Gain (dB)
–60
±0.5mA
–20
100Ω
VIN
–80
7
10
50Ω
–30
SC
4
VOUT
11
–100
50Ω
100Ω
–120
300k
1M
10M
100M
–40
100k
1G
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
SLEW RATE vs TOTAL QUIESCENT CURRENT
HOLD COMMAND DELAY TIME
1G
4
2
3
0
2.5
Output Voltage (mV)
Slew Rate (mA/ns)
3.5
2
Pos
1.5
1
Neg
0.5
100
IOUT = 2mA
0
IOUT = –2mA
–100
0
0
5
10
15
20
25
30
35
0
40
®
SHC615
10
20
30
Time (ns)
Total Quiescent Current, IQ (mA)
12
40
50
Hold Command (V)
Feedthrough Rejection (dB)
±2mA
–20
DISCUSSION OF
PERFORMANCE
output (emitter), and the high-impedance current output
(collector).
The OTA consists of a complementary buffer amplifier and
a subsequent complementary current mirror. The buffer
amplifier features a Darlington output stage and the current
mirror has a cascoded output. The addition of this cascode
circuitry increases the current source output resistance to
1MΩ and the open-loop gain to typically 96dB. Both features improve the OTAs linearity and drive capabilities. Any
bipolar input voltage at the high impedance base has the
same polarity and signal level at the low impedance buffer
or emitter output. For the open-loop diagrams the emitter is
connected to GND and then the collector current is determined by the product voltage between base and emitter
times the transconductance. In application circuits (Figure
2b.), a resistor RE between emitter and GND is used to set
the OTA transfer characteristics. The following formulas
describe the most important relationships. rE is the output
impedance of the buffer amplifier (emitter) or the reciprocal
of the OTA transconductance. Above ±5mA, collector current, IC, will be slightly less than indicated by the formula.
The SHC615, which contains a wideband Operational
Transconductance Amplifier and a fast sampling comparator, represents a complete subsystem for very fast and
precise DC restoration, offset clamping and correction to
GND or to an adjustable reference voltage, and low frequency hum suppression of wideband operational or buffer
amplifiers.
Although the IC was designed to improve or stabilize the
performance of complex, wideband video signals, it can also
be used as a sample and hold amplifier, high-speed integrator, peak detector for nanosecond pulses, or demodulator or
modulator for pulse code transmission systems. A wideband
Operational Transconductance Amplifier (OTA) with a highimpedance cascode current source output and a fast and
precise sampling comparator set a new standard for highspeed sampling applications.
Both can be used as stand-alone circuits or combined to
create more complex signal processing stages like sample
and hold amplifiers. The SHC615 simplifies the design of
input amplifiers with high hum suppression, clamping or
DC-restoration stages in professional broadcast equipment,
high-resolution CAD monitors and information terminals,
signal processing stages for the energy and peak value of
small and fast nanoseconds pulses, and eases the design of
high-speed data acquisition systems behind a CCD sensor or
in front of an analog-to-digital converter.
IC =
V IN
rE + RE
RE =
V IN
– rE
IC
The RE resistor may be bypassed by a relatively large
capacitor to maintain high AC gain. The parallel combination of RE and this large capacitor form a high pass filter
enhancing the high frequency gain. Other cases may require
a RC compensation network parallel to RE to optimize the
high-frequency response. The full power bandwidth measured at the emitter achieves 620MHz. The frequency response of the collector is directly related to the resistor’s
value between collector and GND; it decreases with increasing resistor values, because it forms a low-pass network with
the OTA C-output capacitance.
An external resistor, RQ, allows the user to set the quiescent
current. RQ is connected from Pin 1 (IQ adjust) to –VCC. It
determines the operating currents of both the OTA and
comparator sections and controls the bandwidth and AC
behavior as well as the transconductance of both sections.
Besides the quiescent current setting feature, the Proportional-to-Absolute-Temperature (PTAT) supply increases the
quiescent current vs temperature and keeps it constant over
a wide range of input voltages. This variation holds the
transconductance gm of the OTA and comparator relatively
constant vs temperature. The circuit parameters listed in the
specification table are measured with RQ set to 300Ω, giving
a nominal quiescent current at ±15mA. The circuit can be
totally switched-off with a current flowing into Pin 1.
Figure 1 shows a simplified block and circuit diagram of
the SHC615 OTA. Both the emitter and the collector
outputs offer a drive capability of ±20mA for driving low
impedance lines or inputs. Connecting the collector to the
emitter in a direct-feedback buffer configuration increases
the drive capability to ±40mA. The emitter output is not
current-limited or protected. Momentary shorts to GND
should be avoided, but are unlikely to cause permanent
damage.
While the OTA’s function and labeling looks similar to
that of transistors, it offers essential distinctive differences
and improvements: 1) The collector current flows out of
the C terminal for a positive B-to-E input voltage and into
it for negative voltages; 2) A common emitter amplifier
operates in non-inverting mode while the common base
operates in inverting mode; 3) The OTA is far more linear
than a bipolar transistor; 4) The transconductance can be
adjusted with an external resistor; 5) Due to the PTAT
biasing characteristic the quiescent current increases as
shown in the typical performance curve vs temperature
and keeps the AC performance constant; 6) The OTA is
self-biased and bipolar; and, 7) The output current is zero
for zero differential input voltages. AC inputs centered at
zero produce an output current centered at zero.
OPERATIONAL
TRANSCONDUCTANCE
AMPLIFIER (OTA)
SECTION AND OVERVIEW
The symbol for the OTA section is similar to that of a
bipolar transistor, and the self-based OTA can be viewed as
a quasi-ideal transistor or as a voltage-controlled current
source. Application circuits for the OTA look and operate
much like transistor circuits—the bipolar transistor, also, is
a voltage-controlled current source. Like a transistor, it has
three terminals: a high-impedance input (base) optimized for
a low input bias current of 0.3µA, a low-impedance input/
®
13
SHC615
+VCC
(13)
+VCC
(13)
Biasing
Biasing
B
(3)
+1
E
(2)
C
(12)
E
(2)
C
(12)
B
(3)
Biasing
Biasing
+VCC
(5)
–VCC
(5)
(a)
(b)
FIGURE 1. a) Simplified Block; and, b) Circuit Diagram of the OTA Section.
V+
RB
RL
VO
Inverting Gain
VOS ≈ several volts
VI
RB
100Ω
VI
VO
12
C
3 B
OTA
RL
Non-InvertingGain
VOS ≈ 0
E
2
RE
RE
V–
(b) Common-E Amplifier
(a) Common Emitter Amplifier
Transconductance varies over temperature.
Transconductance remains constant over temperature.
FIGURE 2. a) Common Emitter Amplifier Using a Discrete Transistor; b) Common-E Amplifier Using the OTA Portion of the
SHC615.
BASIC APPLICATIONS CIRCUITS
a Common-E amplifier which is equivalent to a common
emitter transistor amplifier. Input and output can be ground
referenced without any biasing. Due to the sense of the
output current, the amplifier is non-inverting.
Most application circuits for the OTA section consist of a
few basic types which are best understood by analogy to
discrete transistor circuits. Just as the transistor has three
basic operating modes—common emitter, common base,
and common collector—the OTA has three equivalent operating modes common-E, common-B, and common-C (See
Figures 2, 3 and 4). Figure 2 shows the OTA connected as
Figure 4 shows the common-B amplifier. This configuration
produces an inverting gain, and the input is low-impedance.
When a high impedance input is needed, it can be created by
inserting a buffer amplifier like BUF600 in series.
®
SHC615
14
V+
12
C
V+
100Ω
VI
3 B
G=–
OTA
RL
G≈1
VOS ≈ 0
Non-Inverting Gain
VOS ≈ several volts
VO
VO
G≈1
VOS ≈ 0.7V
RE
V–
(a) Common Collector Amplifier
(Emitter Follower)
100Ω
(b) Common-C Amplifier
(Buffer)
1
1+
RO =
1
gm • R E
≈–
12
C
RE
G=
1
gm
RL
RE
VO
E
2
VI
RL
RE +
3 B
RE
E
2
VI
≈1
OTA
VO
Inverting Gain
VOS ≈ 0
RL
(a) Common-Base
Amplifier
1
gm
RE
VI
(b) Common-B Amplifier
FIGURE 3. a) Common Collector Amplifier Using a Discrete
Transistor; b) Common-C Amplifier Using the
OTA Portion of the SHC615.
FIGURE 4. a) Common Base Amplifier Using a Discrete
Transistor; b) Common-B Amplifier Using the
OTA Portion of the SHC615.
SAMPLING COMPARATOR
The SHC615 sampling comparator features a very short
2.2ns propagation delay and utilizes a new switching circuit
architecture to achieve excellent speed and precision.
The additional offset voltage or switching transient induced
on a capacitor at the current source output by the switching
charge can be determined by the following formula:
Offset(V) =
It provides high impedance inverting and non-inverting
inputs, a high-impedance current source output and a TTLCMOS-compatible Hold Control Input.
Charge(pC)
C H Total(pF)
The switching stage input is insensitive to the low slew rate
performance of the hold control command and compatible
with TTL/CMOS logic levels. With a TTL logic high, the
comparator is active, comparing the two input voltages and
varying the output current accordingly. With a TTL logic
low, the comparator output is switched off.
The sampling comparator consists of an operational transconductance amplifier (OTA), a buffer amplifier, and a subsequent switching circuit. The OTA and buffer amplifier are
directly tied together at the buffer outputs to provide the two
identical high-impedance inputs and high open-loop transconductance. Even a small differential input voltage multiplied
with the high transconductance results in an output current—positive or negative—depending upon the input polarity. This is similar to the low or high status of a conventional
comparator. The current source output features high output
impedance, output bias compensation, and is optimized for
charging a capacitor in DC restoration, nanosecond integrators, peak detectors and S/H circuits. The typical comparator
output current is ±3.2mA and the output bias current is
minimized to typically ±10µA in the sampling mode.
APPLICATION INFORMATION
The SHC615 operates from ±5V power supplies (±6V maximum). Do not attempt to operate with larger power supply
voltages or permanent damage may occur.
Inputs of the SHC615 are protected with internal diode
clamps as shown in Figure 1. These protection diodes can
safely conduct 10mA continuously (30mA peak). If input
voltages can exceed the power supply voltages by 0.7V, the
input signal current must be limited.
This innovative circuit achieves the slew rate representatives
of an open-loop design. In addition, the acquisition slew
current for a hold or storage capacitor is higher than standard
diode bridge and switch configurations, removing a main
contributor to the limits of maximum sampling rate and
input frequency.
BASIC CONNECTIONS
Figure 6 shows the basic connections required for operation.
These connections are not shown in subsequent circuit
diagrams. Power supply bypass capacitors should be located
as close as possible to the device pins. Solid tantalum
capacitors are generally best. See “Circuit Layout” at the end
of the applications discussion for further suggestions on
layout.
The switching circuits in the SHC615 use current steering
(versus voltage switching) to provide improved isolation
between the switch and analog sections. This results in low
aperture time sensitivity to the analog input signal, reduced
power supply and analog switching noise. Sample-to-hold
peak switching is 40fC.
®
15
SHC615
If the high speed TTL-hold command signal goes negative
due to reflections for AC-coupling, the hold control input
must be protected by an external reverse bias diode to
ground as shown in Figure 6.
plague high-speed components when they are used incorrectly.
• Bypass power supplies very close to the device pins.
Use tantalum chip capacitors (approximately 2.2µF);
parallel 470pF and/or 10nF ceramic chip capacitors
may be added if desired. Surface mount types are
recommended because of their low lead inductance.
Supply bypassing is extremely critical at high frequencies and when driving high current loads.
CIRCUIT LAYOUT
The high-frequency performance of the SHC615 can be
greatly affected by the physical layout of the printed circuit
board. The following tips are offered as suggestions, not as
absolute requirements. Oscillations, ringing, poor bandwidth,
poor settling, and peaking are all typical problems that
• PC board traces for power lines should be wide to reduce
impedance.
+VCC
(13)
OTA
Biasing
CHOLD
(4)
In+
(10)
Switching
Stage
Biasing
Hold Control
(7)
GND TTL
(9)
–VCC
(5)
+VCC
(13)
Biasing
Comparator
In+
Switching Stage
(10)
(11)
SOTA ∞
CHOLD
(4)
In–
In–
(11)
Hold Control
(7)
–VCC
(5)
(a)
BUFFER
AMPLIFIER
Biasing
(b)
FIGURE 5. a) Simplified Block Diagram; and, b) Circuit Diagram of the Sampling Comparator which Includes the Sampling
Operational Transconductance Amplifier (SOTA) and the Switching Stage.
®
SHC615
16
• Make short, low-inductance traces. The entire physical
circuit should be as small as possible.
• A resistor of 100 to 250Ω in series with the high-impedance inputs is recommended to reduce peaking.
• Use a low-impedance ground plane on the component side
to ensure that a low-impedance ground is available throughout the layout.
• Plug-in prototype boards and wire-wrap boards will not
function well. A clean layout using RF techniques is
essential—there are no shortcuts.
• Do not extend the ground plane under high-impedance
nodes sensitive to stray capacitances such as the amplifier’s
input terminals.
• Terminate transmission line loads. Unterminated lines,
such as box cables, can appear to the amplifier to be a
capacitive or inductive load. By terminating a transmission
line with its characteristic impedance, the amplifier’s load
then appears purely resistive.
• Sockets are not recommended since they add significant
inductance and parasitic capacitance. If sockets are required, use zero-profile sockets.
• Protect the hold control input with an external diode if
necessary.
• Use low-inductance, surface-mount components. Surfacemount components offer the best AC performance.
RB
(25Ω to 200Ω)
CHOLD
9 GND
4
3 Base
2
(20Ω
to
200Ω)
Hold 7
Control
Switching Stage
Emitter
OTA
12
Collector
Sampling Comparator
(SC)
S/H In+
10
Biasing
SOTA
1
IQ Adjust
S/H In–
11
RQ
13
+VCC
+5V(1)
+
2.2µF
10nF
470pF
5
RQ = 300Ω sets roughly
IQ = ±14mA
–VCC
–5V(1)
470pF
10nF
+
2.2µF
Solid Tanatlum
NOTE: (1) ±VCC = ±6V absolute max.
FIGURE 6. Basic Connections
®
17
SHC615
TYPICAL APPLICATIONS
HCL
HCL
100Ω
10
7
4
G=+
R1
11
12
CHOLD
100Ω
100Ω
3
SC
4
SHC615
100Ω
10
7
SC
R2
11
12
CHOLD
OTA
SHC615
100Ω
100Ω
OTA
3
VOUT
2
VIN
R1
VOUT
2
VIN
R2
FIGURE 7. Complete DC Restoration System.
FIGURE 8. DC Restoration of a Buffer Amplifier.
CHOLD
HCL
100Ω
RE
7
Hold /Track
2
11
4
OTA
3
SHC615
100Ω
VREF
100Ω
SC
10
150Ω
12
VIN
R1
R2
300Ω
300Ω
50Ω
10
11
SC
100Ω
4
3
CHOLD
100Ω
VOUT
OPA623
300Ω
• Current Control
VIN
• Non-Inverting
• DC Coupling
FIGURE 10. Sample/Hold Amplifier.
FIGURE 9. Clamped Video/RF Amplifier.
®
SHC615
OTA
2
50Ω
VOUT
300Ω
150Ω
IOUT
12
SHC615
7
18
Hold Control
Hold Control
150Ω
VIN
10
100Ω
4
150Ω
27pF
2
VIN
50Ω
VOUT
50Ω
BUF600
12
10
11
7
SC
100Ω
4
OTA
3
27pF
620Ω
820Ω
11
100Ω
• Black Level Control
OTA
4
3
–1V
4
75Ω
75Ω
OTA
3
CINT
75Ω
2
VOUT
+5V
SC
• Gain
12
11
Video
ADC
SC
7
RE
100Ω
12
SHC615
100Ω
10
fIN
HCL
• Level Shifting
+VOUT
FIGURE 12. Fast Pulse Peak Detector.
fREF
7
50Ω
300Ω
FIGURE 11. Integrator for ns-Pulses.
CHOLD
2
SHC615
1µF
2
–VOUT
8
27pF
100Ω
OTA
3
11
+1
4
12
7
SC
50Ω
50Ω
100Ω
IOUT
SHC615
10
R2
R1
100Ω
fIN
÷N
25Ω
CCD
Buffer
Sample
/Hold
OPA621
fOUT
VIN = 0 to –2V
fREF
fIN
IOUT
Timing
Control
VOUT
VCO
VOUT
Phase
fREF
fOUT = fREF x N
FIGURE 13. CCD Analog Front-End.
FIGURE 14. Phase Detector For Fast PLL-Systems.
®
19
SHC615