BB THS3115

THS3112
THS3115
SLOS385 – SEPTEMBER 2001
LOW-NOISE, HIGH-SPEED CURRENT FEEDBACK AMPLIFIERS
FEATURES
D Low Noise
D
D
D
D
D
D
D
D
D
– 2.9 pA/√Hz Noninverting Current Noise
– 10.8 pA/√Hz Inverting Current Noise
– 2.2 nV/√Hz Voltage Noise
Wide Supply Voltage Range ± 5 V to ± 15 V
Wide Output Swing
– 25 VPP Output Voltage, RL = 100 Ω, ± 15-V
Supply
High Output Current, 150 mA (Min)
High Speed
– 110 MHz (–3 dB, G=1, ± 15 V)
– 1550 V/µs Slew Rate (G = 2, ± 15 V)
Low Distortion, G = 2
– -78 dBc (1 MHz, 2 VPP, 100-Ω load)
Low Power Shutdown (THS3115)
– 300-µA Shutdown Quiescent Current Per
Channel
Thermal Shutdown and Short Circuit
Protection
Standard SOIC, SOIC PowerPAD, and
TSSOP PowerPAD Package
Evaluation Module Available
VOLTAGE NOISE AND CURRENT NOISE
vs
FREQUENCY
I n – Current Noise – pA/ Hz
100
V n – Voltage Noise – nV/ Hz
APPLICATIONS
D Communication Equipment
D Video Distribution
D Motor Drivers
D Piezo Drivers
VCC = ±5 V to ±15 V
TA = 25°C
In+
10
The THS3112/5 are low-noise, high-speed current
feedback amplifiers, ideal for any application requiring
high output current. The low noninverting current noise
of 2.9 pA/√Hz and the low inverting current noise of 10.8
pA/√Hz increase signal to noise ratios for enhanced
signal resolution. The THS3112/5 can operate from
±5-V to ±15-V supply voltages, while drawing as little as
4.5 mA of supply current per channel. It offers low
–78-dBc total harmonic distortion driving 2 VPP into a
100-Ω load. The THS3115 features a low power
shutdown mode, consuming only 300-µA shutdown
quiescent current per channel. The THS3112/5 is
packaged in a standard SOIC, SOIC PowerPAD, and
TSSOP PowerPAD packages.
THS3112
SOIC (D) AND
SOIC PowerPAD (DDA) PACKAGE
(TOP VIEW)
1 OUT
1 IN–
1 IN+
VCC–
In–
DESCRIPTION
1
8
2
7
3
6
4
5
Vn
VCC+
2 OUT
2 IN–
2 IN+
THS3115
SOIC (D) AND
TSSOP PowerPAD (PWP) PACKAGE
(TOP VIEW)
1 OUT
1 IN–
1 IN+
VCC–
N/C
GND
N/C
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC+
2 OUT
2 IN–
2 IN+
N/C
SHUTDOWN
N/C
1
10
100
1K
10 K
100 K
f – Frequency – Hz
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
THS3112
THS3115
SLOS385 – SEPTEMBER 2001
AVAILABLE OPTIONS
PACKAGED DEVICE
TA
SOIC-8
(D)
SOIC-8 PowerPAD
(DDA)
SOIC-14
(D)
TSSOP-14
(PWP)
0°C to 70°C
THS3112CD
THS3112CDDA
THS3115CD
THS3115CPWP
– 40°C to 85°C
THS3112ID
THS3112IDDA
THS3115ID
THS3115IPWP
EVALUATION
MODULES
THS3112EVM
THS3115EVM
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage, VCC+ to VCC– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VCC
Output current (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275 mA
Differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 4 V
Maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Total power dissipation at (or below) 25°C free-air temperature . . . . . . . . . . . See Dissipation Ratings Table
Operating free-air temperature, TA: Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
Storage temperature, Tstg : Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 125°C
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 125°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The THS3112 and THS3115 may incorporate a PowerPAD on the underside of the chip. This acts as a heatsink and must be connected
to a thermally dissipating plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature
which could permanently damage the device. See TI Technical Brief SLMA002 for more information about utilizing the PowerPAD
thermally enhanced package.
DISSIPATION RATING TABLE
PACKAGE
θJA
TA = 25°C
POWER RATING
D-8
95°C/W‡
1.32 W
DDA
67°C/W
66.6°C/W‡
1.87 W
D-14
1.88 W
PWP
37.5°C/W
3.3 W
‡ This data was taken using the JEDEC proposed high-K test PCB.
For the JEDEC low-K test PCB, the θJA is168°C/W for the D-8
package and 122.3°C/W for the D-14 package.
recommended operating conditions
MIN
Supply voltage
voltage, VCC+ to VCC–
±15
Single supply
10
30
0
70
–40
85
I-suffix
High level (device shutdown)
Shutdown pin input levels
levels, relative to the GND pin
2
MAX
±5
C-suffix
Operating free-air
free air temperature,
temperature TA
NOM
Dual supply
Low level (device active)
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UNIT
V
°C
2
0.8
V
THS3112
THS3115
SLOS385 – SEPTEMBER 2001
electrical characteristics over recommended operating free-air temperature range, TA = 25°C,
VCC = ±15 V, RF = 750 Ω, RL = 100 Ω (unless otherwise noted)
dynamic performance
PARAMETER
TEST CONDITIONS
BW
SR
ts
Slew rate (see Note 2), G
G=8
8
Settling time to 0.1%
0 1%
95
VCC = ±15 V
110
RF = 750 Ω,
G=2
VCC = ± 5 V
103
VCC = ±15 V
110
RF = 750 Ω,
G=2
VCC = ± 5 V
25
VCC = ±15 V
48
VO = 10 VPP
VCC = ±15 V
VCC = ±5 V
1550
VCC = ±15 V
VCC = ±5 V
1300
VCC = ±15 V
63
RF = 1 kΩ,
G=1
RL = 100 Ω
Bandwidth (0.1
(0 1 dB)
G=2
RF = 680 Ω
G = –1
TYP
VCC = ± 5 V
RL = 100 Ω
Small signal bandwidth (–
Small-signal
( 3 dB)
MIN
VO = 5 VPP
VO = 2 VPP
VO = 5 VPP
MAX
UNIT
MHz
820
V/µs
50
ns
NOTE 2: Slew rate is defined from the 25% to the 75% output levels.
noise/distortion performance
PARAMETER
THD
TEST CONDITIONS
G = 2,
RF = 680 Ω,
VCC = ±15 V, f = 1 MHz
VO(PP) = 8 V
– 75
RF = 680 Ω,
f = 1 MHz
VO(PP) = 2 V
– 76
VO(PP) = 6 V
– 74
f = 10 kHz
2.2
Total harmonic distortion
VCC = ±5 V, ±15 V
Input voltage noise
Noninverting Input
In
Input current noise
Crosstalk
Differential gain error
Differential phase error
Inverting Input
TYP
– 78
G = 2,
VCC = ±5 V,
Vn
MIN
VO(PP) = 2 V
2.9
VCC = ±5 V,
V ±15 V
f = 10 kHz
G = 2,
VO = 2 Vpp
VCC = ±5 V
VCC = ±15 V
– 67
VCC = ±5 V
VCC = ±15 V
0.01%
VCC = ±5 V
VCC = ±15 V
0.011°
f = 1 MHz,
G = 2,
2
RL = 150 Ω
40 IRE modulation
±100 IRE Ramp
NTSC and
d PAL
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10.8
– 67
MAX
UNIT
dBc
nV/√Hz
pA/√Hz
dBc
0.01%
0.011°
3
THS3112
THS3115
SLOS385 – SEPTEMBER 2001
electrical characteristics over recommended operating free-air temperature range, TA = 25°C,
VCC = ±15 V, RF = 750 Ω, RL = 100 Ω (unless otherwise noted) (continued)
dc performance
PARAMETER
TEST CONDITIONS
Input offset voltage
VIO
VCC = ±5 V,
V
VCC = ±15 V
Channel offset voltage matching
Offset drift
– Input bias current
IIB
VCC = ±5 V,
VCC = ±15 V
+ Input bias current
Input offset current
ZOL
MIN
TYP
TA = 25°C
TA = full range
3
TA = 25°C
TA = full range
1
TA = full range
TA = 25°C
10
VCC = ±5 V,
VCC = ±15 V
UNIT
8
13
3
mV
4
µV/°C
23
TA = full range
TA = 25°C
30
0.33
TA = full range
TA = 25°C
2
3
4
TA = full range
Open loop transimpedance
MAX
A
µA
22
30
RL = 1 kΩ,
1
MΩ
input characteristics
PARAMETER
VICR
CMRR
TEST CONDITIONS
Input common-mode
common mode voltage range
Common mode rejection ratio
Common-mode
RI
Input resistance
Ci
Input capacitance
MIN
TYP
VCC = ±5 V
VCC = ± 15 V
TA = full range
±2.5
±2.7
± 12.5
±12.7
VCC = ±5 V,
VI = –2.5 V to 2.5 V
TA = 25°C
TA = full range
56
62
VCC = ±15 V,
VI = –12.5 V to 12.5 V
TA = 25°C
TA = full range
63
MAX
UNIT
V
54
dB
67
60
+ Input
1.5
MΩ
– Input
15
Ω
2
pF
output characteristics
PARAMETER
TEST CONDITIONS
RL = 1 kΩ,
G = 4,
4 VI = 1 V,
V
VCC = ±5 V
VO
RL = 100 Ω
Ω,
Output voltage swing
G = 4,
4 VI = 3
3.4
4 V,
V
VCC = ±15 V
IO
ro
4
Output current drive
Output resistance
RL = 1 kΩ,
RL = 100 Ω
Ω,
G = 4, VI = 1.025 V,
VCC = ±5 V
RL = 25 Ω,
G = 4, VI = 3.4 V,
VCC = ±15 V
RL = 25 Ω,
open loop
MIN
TA = 25°C
TA = 25°C
TYP
UNIT
3.9
3.6
TA = full range
TA = 25°C
3.4
TA = 25°C
TA = full range
12.2
3.8
13.5
V
13.3
12
100
130
175
270
TA = 25°C
mA
14
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MAX
Ω
THS3112
THS3115
SLOS385 – SEPTEMBER 2001
electrical characteristics over recommended operating free-air temperature range, TA = 25°C,
VCC = ±15 V, RF = 750 Ω, RL = 100 Ω, GND = 0 V (unless otherwise noted) (continued)
power supply
PARAMETER
TEST CONDITIONS
TYP
MAX
VCC = ±5 V
TA = 25°C
TA = full range
4.4
5.5
VCC = ±15 V
TA = 25°C
TA = full range
4.9
VCC = ±5 V
TA = 25°C
TA = full range
53
VCC = ±15 V
TA = 25°C
TA = full range
68
Quiescent current (per amplifier)
ICC
PSRR
Power supply rejection ratio
MIN
UNIT
6
mA
6.5
7.5
60
50
dB
74
66
shutdown characteristics (THS3115 only)
PARAMETER
TEST CONDITIONS
ICC(SHDN)
tDIS
Shutdown quiescent current (per channel)
tEN
IIL(SHDN)
Enable time (see Note 3)
Disable time (see Note 3)
Shutdown pin input bias current for power up
TYP
MAX
UNIT
VGND = 0 V, VCC = ±5 V, ±15 V
VCC = ±15 V
MIN
0.3
0.45
mA
0.1
µs
VCC = ±15 V
VCC = ±5 V, ±15 V, V(SHDN) = 0 V
0.4
µs
18
µA
25
IIH(SHDN)
Shutdown pin input bias current for power down
VCC = ±5 V, ±15 V, V(SHDN) = 3.3 V
110
130
µA
NOTE 3: Disable/enable time is defined as the time from when the shutdown signal is applied to the SHDN pin to when the supply current has
reached half of its final value.
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Small signal closed loop gain
vs Frequency
Gain and phase
vs Frequency
12
Small signal closed loop noninverting gain
vs Frequency
15, 16
Small signal closed loop inverting gain
vs Frequency
17, 18
Small and large signal output
vs Frequency
19, 20
vs Frequency
21, 22
vs Peak–to–peak output voltage
23, 24
Harmonic distortion
1 – 11, 13, 14
Vn, In
Voltage noise and current noise
vs Frequency
25
CMRR
Common-mode rejection ratio
vs Frequency
26
PSRR
Power supply rejection ratio
vs Frequency
27
Crosstalk
vs Frequency
28
Output impedance
vs Frequency
29
Slew rate
vs Output voltage step
30
vs Free-air temperature
31
vs Common-mode input voltage
32
Zo
SR
VIO
Input offset voltage
IB
VO
Input bias current
vs Free-air temperature
Output voltage
vs Output current
34, 35
Output voltage headroom
vs Output current
36
Supply current (per channel)
vs Supply voltage
37
ICC
Shutdown response
33
38
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5
THS3112
THS3115
SLOS385 – SEPTEMBER 2001
TYPICAL CHARACTERISTICS
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
3
0
–3
RF = 750 Ω
–6
RF = 1.2 kΩ
–9
G = –1,
VCC = ±5 V,
RL = 100 Ω
–12
–15
0.1
1
10
100
0
RF = 750 Ω
–6
RF = 1.2 kΩ
–9
G = –1,
VCC = ±15 V,
RL = 100 Ω
–12
0.1
1
10
RF = 560 Ω
RF = 750 Ω
6
3
G = –4,
VCC = ±5 V,
RL = 100 Ω
100
18
RF = 430 Ω
15
RF = 750 Ω
12
9
6
G = –8,
VCC = ±5 V,
RL = 100 Ω
3
1
10
100
Small Signal Closed Loop Gain – dB
0
RF = 1.1 kΩ
RF = 1 kΩ
–2
–3
G = 1,
VCC = ±5 V,
RL = 100 Ω
10
100
f – Frequency – MHz
Figure 7
6
G = –8,
VCC = ±15 V,
RL = 100 Ω
3
0.1
1
1000
10
100
1000
f – Frequency – MHz
Figure 6
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
8
RF = 750 Ω
0
RF = 910 Ω
–3
RF = 1.1 kΩ
–6
G = 1,
VCC = ±15 V,
RL = 100 Ω
–9
RF = 560 Ω
7
6
RF = 1 kΩ
5
RF = 750 Ω
4
3
2
G = 2,
VCC = ±5 V,
RL = 100 Ω
1
0
–12
–6
1
9
1000
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
3
0.1
RF = 430 Ω
12
Figure 5
RF = 750 Ω
–5
RF = 750 Ω
15
f – Frequency – MHz
2
–4
RF = 200 Ω
18
0
0.1
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
1000
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
0
1000
100
21
Figure 4
–1
10
Figure 3
RF = 200 Ω
f – Frequency – MHz
1
1
f – Frequency – MHz
Small Signal Closed Loop Gain – dB
10
G = –4,
VCC = ±15 V,
RL = 100 Ω
0
0.1
Small Signal Closed Loop Gain – dB
Small Signal Closed Loop Gain – dB
Small Signal Closed Loop Gain – dB
12
1
3
1000
21
RF = 430 Ω
–3
Small Signal Closed Loop Gain – dB
100
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
15
0.1
RF = 750 Ω
6
Figure 2
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
0
RF = 560 Ω
9
f – Frequency – MHz
Figure 1
9
RF = 430 Ω
12
–3
–15
1000
f – Frequency – MHz
6
15
RF = 560 Ω
–3
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
Small Signal Closed Loop Gain – dB
RF = 560 Ω
Small Signal Closed Loop Gain – dB
Small Signal Closed Loop Gain – dB
3
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
0.1
1
10
100
f – Frequency – MHz
Figure 8
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1000
0.1
1
10
100
f – Frequency – MHz
Figure 9
1000
THS3112
THS3115
SLOS385 – SEPTEMBER 2001
TYPICAL CHARACTERISTICS
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
6
RF = 1 kΩ
RF = 750 Ω
0
–3
G = 2,
VCC = ±15 V,
RL = 100 Ω
–9
0.1
10
1
100
RF = 560 Ω
RF = 750 Ω
9
RF = 1 kΩ
6
3
0
0.1
1
Figure 10
Small Signal Closed Loop Gain – dB
Small Signal Closed Loop Gain – dB
100
18
RF = 430 Ω
RF = 750 Ω
9
G = 8,
VCC = ±5 V,
RL = 100 Ω
3
0.1
18
RF = 750 Ω
RF = 430 Ω
12
9
6
G = 8,
VCC = ±15 V,
RL = 100 Ω
3
100
1000
0.1
f – Frequency – MHz
RF = 430 Ω
RF = 200 Ω
12
RF = 750 Ω
9
6
RF = 1 kΩ
3
0
–3
–6
–9
VCC = ±5 V,
RL = 100 Ω
–12
–15
10
100
f – Frequency – MHz
Figure 16
100
1000
RF = 560 Ω
15
5
RF = 1 kΩ
0
–5
VCC = ±5 V,
RL = 100 Ω
–10
–15
10
1000
15
12
RF = 560 Ω
6
3
0
–3
RF = 750 Ω
–6
–9
VCC = ±5 V,
RL = 100 Ω
–12
–15
10
100
100
1000
SMALL SIGNAL CLOSED LOOP
INVERTING GAIN
vs
FREQUENCY
21
18
RF = 430 Ω
15
12
RF = 560 Ω
9
6
RF = 750 Ω
3
0
–3
–6
–9
–12
VCC = ±15 V,
RL = 100 Ω
–15
10
100
f – Frequency – MHz
f – Frequency – MHz
Figure 17
Figure 18
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1000
Figure 15
RF = 430 Ω
9
RF = 250 Ω
f – Frequency – MHz
21
18
1000
RF = 750 Ω
10
SMALL SIGNAL CLOSED LOOP
INVERTING GAIN
vs
FREQUENCY
Small Signal Closed Loop Inverting Gain – dB
21
15
10
20
Figure 14
SMALL SIGNAL CLOSED LOOP
NONINVERTING GAIN
vs
FREQUENCY
100
SMALL SIGNAL CLOSED LOOP
NONINVERTING GAIN
vs
FREQUENCY
f – Frequency – MHz
Figure 13
18
1
10
Figure 12
RF = 200 Ω
15
1
f – Frequency – MHz
0
10
1
G = 4,
VCC = ±15 V,
RL = 100 Ω
–3
0.1
1000
21
RF = 200 Ω
0
10
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
21
6
3
Figure 11
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
12
RF = 1 kΩ
6
f – Frequency – MHz
f – Frequency – MHz
15
RF = 750 Ω
0
–3
1000
RF = 560 Ω
9
G = 4,
VCC = ±15 V,
RL = 100 Ω
Small Signal Closed Loop Non Inverting Gain – dB
–6
RF = 430 Ω
12
12
Small Signal Closed Loop Inverting Gain – dB
3
RF = 430 Ω
Gain and Phase – dB
RF = 560 Ω
Small Signal Closed Loop Gain – dB
Small Signal Closed Loop Gain – dB
15
15
9
Small Signal Closed Loop Non Inverting Gain – dB
GAIN AND PHASE
vs
FREQUENCY
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
1000
7
THS3112
THS3115
SLOS385 – SEPTEMBER 2001
TYPICAL CHARACTERISTICS
SMALL AND LARGE SIGNAL OUTPUT
vs
FREQUENCY
2 VPP
6
1.125 VPP
0
0.711 VPP
0.4 VPP
–12
–18
0.125 VPP
–24
0.1
1
10
100
12
2 VPP
6
1.125 VPP
0
0.711 VPP
–6
0.4 VPP
–12
0.125 VPP
–18
1
f – Frequency – MHz
–80
4th Harmonic
–90
10
100
CMRR – Common-Mode Rejection Ratio – dB
I n – Current Noise – pA/ Hz
Hz
V n – Voltage Noise – nV/
In+
Vn
1
1K
f – Frequency – Hz
Figure 25
8
10 K
100 K
100
1
2
3
3rd Harmonic
–80
5th Harmonic
–90
4th Harmonic
G = 2,
RF = 680 Ω,
RL 100 Ω,
VCC = ±15 V,
f = 1MHz
–100
–110
4
5
6
7
8
0
1
2
3
4
5
6
7
8
9
VPP – Peak-to-Peak Output Voltage – V
Figure 23
In–
10
HARMONIC DISTORTION
vs
PEAK-TO-PEAK OUTPUT VOLTAGE
VPP – Peak-to-Peak Output Voltage – V
VCC = ±5 V to ±15 V
TA = 25°C
100
1
5th Harmonic
4th Harmonic
0
VOLTAGE NOISE AND CURRENT NOISE
vs
FREQUENCY
10
0.1
2nd Harmonic
2nd
Harmonic
3rd Harmonic
2nd Harmonic
–70
Figure 22
10
4th Harmonic
f – Frequency – MHz
–50
f – Frequency – MHz
100
–100
–70
–110
1
–80
Figure 21
5th Harmonic
–120
0.1
1000
G = 2,
RF = 680 Ω,
RL 100 Ω,
VCC = ±5 V,
f = 1MHz
–30
Harmonic Distortion – dB
Harmonic Distortion – dB
100
–10
–60
–100
10
HARMONIC DISTORTION
vs
PEAK-TO-PEAK OUTPUT VOLTAGE
G = 2,
2nd Harmonic
RF = 680 Ω,
RL 100 Ω,
VCC = ±15 V,
VO(PP) = 2 V
3rd Harmonic
2nd Harmonic
3rd Harmonic
Figure 20
HARMONIC DISTORTION
vs
FREQUENCY
–40
–60
f – Frequency – MHz
Figure 19
–20
–40
–120
–24
0.1
1000
G = 2,
RF = 680 Ω,
RL 100 Ω,
VCC = ±5 V,
VO = 2 VPP
5th Harmonic
Harmonic Distortion – dB
–6
–20
VCC = ±15 V, G = 2
RF = 680 Ω, RL = 100 Ω
4 VPP
Figure 24
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
80
70
PSRR – Power Supply Rejection Ratio – dB
12
18
Harmonic Distortion – dB
VCC = ±5 V, G = 2
RF = 680 Ω, RL = 100 Ω
4 VPP
Small and Large Signal Output – dB (VPP )
Small and Large Signal Output – dB (VPP )
18
HARMONIC DISTORTION
vs
FREQUENCY
SMALL AND LARGE SIGNAL OUTPUT
vs
FREQUENCY
G = 2,
RL 100 Ω,
RF = 1 kΩ
70
60
VCC = ±15 V
50
VCC = ±5 V
40
30
20
10
0
0.1
1
10
f – Frequency – MHz
Figure 26
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100
PSRR – ±15 V
60
G = 2,
RL = 100 Ω,
RF = 680 Ω
50
PSRR – ±5 V
40
30
20
10
0
0.1
1
10
f – Frequency – MHz
Figure 27
100
THS3112
THS3115
SLOS385 – SEPTEMBER 2001
TYPICAL CHARACTERISTICS
CROSSTALK
vs
FREQUENCY
OUTPUT IMPEDANCE
vs
FREQUENCY
100
0
–40
–50
–60
–70
–80
10
1
0.1
1400
VCC = ±15 V
1200
1000
800
VCC = ±5 V
600
400
200
–90
0.01
–100
0.1
1
10
100
1000
0
0.1
1
10
100
1000
0
f – Frequency – MHz
f – Frequency – MHz
Figure 28
4
–3
–4
–5
5
8
0
–5
–10
–15
–40
–20
0
20
40
60
–15
80 85
12
9
VCC = ±15 V,
TA = 25°C,
RL= 100 Ω
VCC = ±15 V, IIB–
7
6
5
4
VCC = ±5 V, IIB–
3
VCC = ±5 V, IIB+
2
1
–6
10
INPUT BIAS CURRENT
vs
FREE-AIR TEMPERATURE
I IB– Input Bias Current – µ A
V IO – Input Offset Voltage – mV
–2
8
Figure 30
10
VCC = ±15 V,
VCM = 0 V,
RL = 100 Ω
6
VO – Output Voltage Step – V
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
0
–1
2
Figure 29
INPUT OFFSET VOLTAGE
vs
FREE-AIR TEMPERATURE
V IO – Input Offset Voltage – mV
G=2
RF = 680 Ω,
RL = 100 Ω,
TA = 25°C
1600
SR – Slew Rate – V/ µ s
–30
Z O – Output Impedance – Ω
–20
1800
VCC = ±5 V to ±15 V,
RF = 1 kΩ
G = 2,
VCC = ±5 V to ±15 V,
RL = 100 Ω,
RF = 680 Ω
–10
Crosstalk – dBc
SLEW RATE
vs
OUTPUT VOLTAGE STEP
TA – Free-Air Temperature – °C
–10
–5
0
5
10
VCC = ±15 V, IIB+
0
–40
15
Figure 31
–20
0
20
40
60
80 85
TA – Free-Air Temperature – °C
VCM – Common-Mode Input Voltage – V
Figure 32
F
Figure 33
9
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE HEADROOM
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
5
5
15
Output Voltage Headroom – |V|
VO – Output Voltage – V
4
VO – Output Voltage – V
|VCC| – |VO|
VCC = ±15 V and ±5 V
TA = 25°C
G = 4,
RF = 750 Ω
4.5
4.5
3.5
3
2.5
2
1.5
VCC = ±5 V,
RF = 750 Ω
TA = 25°C
1
0.5
13.5
12
10.5
VCC = ±15 V,
RF = 750 Ω
TA = 25°C
0
50
100
150
IO – Output Current – mA
Figure 34
200
250
0
50
3
2.5
2
1.5
1
0.5
9
0
4
3.5
100
150
IO – Output Current – mA
Figure 35
www.ti.com
200
250
0
0
50
100
150
200
250
IO – Output Current – |mA|
Figure 36
9
THS3112
THS3115
SLOS385 – SEPTEMBER 2001
TYPICAL CHARACTERISTICS
SHUTDOWN RESPONSE
14
TA = 85°C
12
TA = 25°C
10
8
VCC = ±15 V
G=8
RF = 330 Ω
RF = 100 Ω
VI = 0.5 VDC
4
3
2
1
0
TA = –40°C
6
2
1.5
4
1
2
0.5
0
0
0
2.5
5
7.5
10
12.5
15
0
VCC – Supply Voltage – ±V
1
2
3
4
5
6
t – Time – ns
Figure 38
Figure 37
10
5
www.ti.com
7
8
9
10
Shutdown Pulse – V
16
V O – Output Voltage – V
I CC – Supply Current (Per Channel) – mA
SUPPLY CURRENT (PER CHANNEL)
vs
SUPPLY VOLTAGE
THS3112
THS3115
SLOS385 – SEPTEMBER 2001
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
14
0.010 (0,25) M
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°–ā8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.069 (1,75) MAX
0.010 (0,25)
0.004 (0,10)
PINS **
0.004 (0,10)
8
14
16
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MIN
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
DIM
4040047 / D 10/96
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
Falls within JEDEC MS-012
www.ti.com
11
THS3112
THS3115
SLOS385 – SEPTEMBER 2001
MECHANICAL INFORMATION
DDA (S–PDSO–G8)
Power PADt PLASTIC SMALL-OUTLINE
0,49
0,35
1,27
8
0,10 M
5
Thermal Pad
(See Note D)
0,20 NOM
3,99
3,81
6,20
5,84
Gage Plane
1
0,25
4
4,98
4,80
0°–8°
0,89
0,41
1,68 MAX
Seating Plane
1,55
1,40
0,13
0,03
0,10
4202561/A 02/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane.
This pad is electrically and thermally connected to the backside of the die and possibly selected leads.
PowerPAD is a trademark of Texas Instruments.
12
www.ti.com
THS3112
THS3115
SLOS385 – SEPTEMBER 2001
MECHANICAL DATA
PWP (R-PDSO-G**)
PowerPAD PLASTIC SMALL-OUTLINE
20 PINS SHOWN
0,30
0,19
0,65
20
0,10 M
11
Thermal Pad
(See Note D)
4,50
4,30
0,15 NOM
6,60
6,20
Gage Plane
1
10
0,25
A
0°–ā8°
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
14
16
20
24
28
A MAX
5,10
5,10
6,60
7,90
9,80
A MIN
4,90
4,90
6,40
7,70
9,60
DIM
4073225/F 10/98
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusions.
The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane.
This pad is electrically and thermally connected to the backside of the die and possibly selected leads.
E. Falls within JEDEC MO-153
PowerPAD is a trademark of Texas Instruments Incorporated.
www.ti.com
13
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