MOTOROLA MRFIC0913

Order this document
by MRFIC0913/D
SEMICONDUCTOR TECHNICAL DATA
The MRFIC Line
# !!
" This integrated circuit is intended for GSM class IV handsets. The device is
specified for 2.8 watts output power and 48% minimum power added efficiency
under GSM signal conditions at 4.8 Volt supply voltage. To achieve this superior
performance, Motorola’s planar GaAs MESFET process is employed. The
device is packaged in the PFP–16 Power Flat Package which gives excellent
thermal performance through a solderable backside contact.
900 MHz
GSM CELLULAR
INTEGRATED POWER AMPLIFIER
GaAs MONOLITHIC
INTEGRATED CIRCUIT
• Usable Frequency Range 800 to 1000 MHz
• Typical Output Power:
36.0 dBm @ 5.8 Volts
35.0 dBm @ 4.8 Volts
31.5 dBm @ 3.6 Volts
• 48% Minimum Power Added Efficiency
• Low Parasitic, High Thermal Dissipation Package
• Order MRFIC0913R2 for Tape and Reel Option.
R2 Suffix = 1,500 Units per 16 mm, 13 inch Reel.
CASE 978–02
(PFP–16)
• Device Marking = M0913
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Symbol
Rating
Value
Unit
Supply Voltage
VD1, VD2
9
Vdc
RF Input Power
Pin
15
dBm
Gate Voltage
VSS
–6
Vdc
TA
–40 to + 85
°C
Tstg
– 65 to +150
°C
RθJC
10
°C/W
Ambient Operating Temperature
Storage Temperature
Thermal Resistance, Junction to Case
GND 9
8
N/C
VD1 10
7
VD2
GND 11
6
GND
VG2 12
5
RF OUT
VG1 13
4
RF OUT
GND 14
3
GND
RF IN 15
2
VSS
N/C 16
1
GND
Pin Connections and Functional Block Diagram
 Motorola, Inc. 1996
MOTOROLA RF DEVICE DATA
MRFIC0913
1
RECOMMENDED OPERATING RANGES
Parameter
Symbol
Value
Unit
VD1, VD2
2.7 to 7.5
Vdc
Gate Voltage
VSS
–5 to –3
Vdc
RF Frequency Range
fRF
800 to 1000
MHz
RF Input Power
PRF
6 to 13
dBm
Supply Voltage
ELECTRICAL CHARACTERISTICS (VD1, VD2 = 4.8 V, VSS = –4 V, Pin = 10 dBm, Peak Measurement at 12.5% Duty Cycle, 4.6 ms
Period, TA = 25°C unless otherwise noted. Measured in Reference Circuit Shown in Figure 1.)
Min
Characteristic
Typ
Max
Unit
Frequency Range
880
—
915
MHz
Output Power
34.5
35
—
dBm
Power Added Efficiency
48
—
—
%
Input VSWR
—
2:1
—
VSWR
Harmonic Output
2nd
3rd
—
—
—
—
–30
–35
33.3
33.5
—
dBm
Output Power, Isolation (VD1, VD2 = 0 V)
—
–20
–15
dBm
Noise Power in 100 kHz, 925 to 960 MHz
—
—
–90
dBm
Stability – Spurious Output (Pin = 10 to 13 dBm, Pout = 5 to 35 dBm, Load
VSWR = 6:1 at any Phase Angle, Source VSWR = 3:1, at any Phase Angle,
VD1, VD2 adjusted for Specified Pout)
—
—
–60
dBc
dBc
Output Power at Low voltage (VD1, VD2 = 4.0 V)
Load Mismatch stress (Pin = 10 to 13 dBm, Pout = 5 to 35 dBm, Load VSWR = 10:1
at any Phase Angle, VD1, VD2 Adjusted for Specified Pout)
No Degradation in Output Power after Returning to
Standard Conditions
3 dB VDD Bandwidth (VD1, VD2 = 0 to 6 V)
1
—
—
MHz
Negative Supply Current
—
—
1.25
mA
VD1
VD2
9
8
10
7
11
6
12
5
13
4
14
3
15
2
L2
C9 C10
C1
R4
R3
C2
C3
T1
C5
RF OUT
L1
RF IN
C6
C8
VSS
1
16
C1, C3, C10 47 pF, ATC
C2, C9 47 nF, Vitramon
C5
10 pF, ATC
C6
22 nF, Vitramon
C8
6.8 pF, ATC
R1
L1
L2
R1
8.2 nH, 0805 Toko
10 Turn MicroSpring,
Coilcraft 1606–10
330 Ω
R3
1.8 kΩ
R4
2.7 kΩ
T1
5 mm 30 Ω Microstrip Line
BOARD MATERIAL Glass/Epoxy, εr = 4.45
Figure 1. 900 MHz Reference Circuit
MRFIC0913
2
MOTOROLA RF DEVICE DATA
0V
0V
4.8 V BATTERY
3V
VRAMP
3V
STANDBY
C13
1
14
2
13
3
12
C9 C10
11
CR1
C16
G 4
6 D
S 3
7 D
S 2
8 D
1
R5
C14
C12
4
5 D
Q1
C15
5
10
6
9
R4
7
8
R3
U2
L1
RF IN
9
8
10
7
11
6
12
5
13
4
14
3
15
2
16
1
C8
U1
L2
C1
C2
C3
T1
C5
C4
RF
OUT
C6
R1
R2
C7
C1
33 pF, 0603 NPO/COG
C2, C9 33 nF
C3
47 pF, 0603 NPO/COG
C4, C5, C8 6.8 pF, 0603 NPO/COG
C6
33 nF
C7
220 nF
C10
33 pF, 0603 NPO/COG
C12 – C16 1 µF
CR1
L1
L2
Q1
R1
MMBD701LT1
8.2 nH, 0805 Toko
10 Turn MicroSpring,
Coilcraft 1606–10 (for
improved harmonic rejection
only)
MMSF4N01HD
330 Ω
R2
100 Ω
R3
1.8 kΩ
R4
2.7 kΩ
R5
470 Ω
T1
5 mm 30 Ω Microstrip Line
U1
MRFIC0913
U2
MC33169 (–4 V Version)
BOARD MATERIAL Glass/Epoxy, εr = 4.45
Note: Use of a Schottky diode such as MMBD701LT1 for CR1 is mandatory below 3.6 V.
A general purpose silicon diode can be used above 3.6 V.
Figure 2. GSM Application Circuit Configuration with Drain Switch
and MC33169 GaAs Power Amplifier Support IC
MOTOROLA RF DEVICE DATA
MRFIC0913
3
TYPICAL CHARACTERISTICS
58
33.8
TA = – 40°C
PAE, POWER ADDED EFFICIENCY (%)
P out , OUTPUT POWER (dBm)
34.0
25°C
33.6
85°C
33.4
Pin = 10 dBm
VD1 = VD2 = 4 V
VSS = – 4 V
33.2
33.0
880
885
890
895
900
905
f, FREQUENCY (MHz)
910
56
TA = – 40°C
54
25°C
52
85°C
50
Pin = 10 dBm
VD1 = VD2 = 4.8 V
VSS = – 4 V
48
46
880
915
885
Figure 3. Output Power versus Frequency
PAE, POWER ADDED EFFICIENCY (%)
P out , OUTPUT POWER (dBm)
TA = – 40°C
35.2
25°C
35.0
85°C
34.8
Pin = 10 dBm
VD1 = VD2 = 4.8 V
VSS = – 4 V
34.6
34.4
880
915
885
890
895
900
905
f, FREQUENCY (MHz)
910
4V
55
54
4.8 V
53
4V
52
VD1 = VD2 = 5.6 V
50
880
915
Pin = 10 dBm
TA = 25°C
VSS = – 4 V
51
885
Figure 5. Output Power versus Frequency
890
895
900
905
f, FREQUENCY (MHz)
910
915
Figure 6. Power Added Efficiency
versus Frequency
40
36.8
TA = – 40°C
36.6
85°C
35
36.4
RL, RETURN LOSS (dB)
P out , OUTPUT POWER (dBm)
910
56
35.4
25°C
36.2
36.0
85°C
35.8
35.4
895
900
905
f, FREQUENCY (MHz)
Figure 4. Power Added Efficiency
versus Frequency
35.6
35.6
890
Pin = 10 dBm
VD1 = VD2 = 5.6 V
VSS = – 4 V
35.2
880
885
890
30
TA = – 40°C
25
Pin = 10 dBm
VD1 = VD2 = 4.8 V
VSS = – 4 V
20
895
900
905
f, FREQUENCY (MHz)
910
Figure 7. Output Power versus Frequency
MRFIC0913
4
25°C
915
15
880
885
890
895
900
905
f, FREQNENCY (MHz)
910
915
Figure 8. Input Return Loss versus Frequency
MOTOROLA RF DEVICE DATA
TYPICAL CHARACTERISTICS
60
PAE, POWER ADDED EFFICIENCY (%)
P out , OUTPUT POWER (dBm)
40
30
20
10
– 40°C
0
TA = 85° and 25°C
–10
f = 900 MHz
Pin = 10 dBm
VSS = – 4 V
– 20
– 30
TA = – 40°C
50
25°C
30
20
f = 900 MHz
Pin = 10 dBm
VSS = – 4 V
10
0
0
2
3
4
VD1, VD2, DRAIN VOLTAGE (VOLTS)
1
6
5
0
Figure 9. Output Power versus Drain Voltage
2
3
4
VD1, VD2, DRAIN VOLTAGE (VOLTS)
6
5
PAE, POWER ADDED EFFICIENCY (%)
60
34
TA = – 40°C
32
85°C
30
28
25°C
26
f = 900 MHz
VD1 = VD2 = 4.8 V
VSS = – 4 V
24
22
20
–7
1
Figure 10. Power Added Efficiency versus
Drain Voltage
36
P out , OUTPUT POWER (dBm)
85°C
40
–5
–3
3
5
7
–1
1
Pin, INPUT POWER (dBm)
9
40
20
25°C
10
Figure 11. Output Power versus Input Power
–5
–3
f = 900 MHz
VD1 = VD2 = 4.8 V
VSS = – 4 V
1
3
5
7
–1
Pin, INPUT POWER (WATTS)
9
11
Figure 12. Power Added Efficiency versus
Input Power
ZOL*
Ohms
Zin
Ohms
f
85°C
TA = – 40°C
30
0
–7
13
11
50
(MHz)
R
jX
R
jX
880
13.65
–44.05
3.15
5.06
885
13.64
–44.74
3.13
4.97
890
13.65
–45.44
3.10
4.89
895
13.64
–46.14
3.08
4.80
900
13.64
–46.84
3.06
4.71
905
13.65
–47.55
3.04
4.63
910
13.66
–48.27
3.02
4.54
915
13.66
–49.00
3.00
4.45
Table 1. Device Impedances Derived from Circuit Characterization
MOTOROLA RF DEVICE DATA
MRFIC0913
5
13
APPLICATIONS INFORMATION
Design Philosophy
The MRFIC0913 is a two–stage Integrated Power Amplifier
designed for use in cellular phones, especially for those used
in GSM Class IV, 4.8 V operation. With matching circuit modifications, it is also applicable for use in GSM Class IV 6 V and
Class V 3.6 V equipment. Due to the fact that the input, output
and some of the interstage matching is accomplished off chip,
the device can be tuned to operate anywhere within the 800 to
1000 MHz frequency range. Typical performance at different
battery voltages is:
S
36.0 dBm @ 5.8 V
S
35.0 dBm @ 4.8 V
S
31.5 dBm @ 3.6 V
This capability makes the MRFIC0913 suitable for portable
cellular applications such as:
S
6 and 4.8 V GSM Class IV
S
3.6 V GSM Class V
S
3.6 V, 1.2 W Analog Cellular
RF Circuit Considerations
The MRFIC0913 can be tuned by changing the values and/
or positions of the appropriate external components. Refer to
Figure 2, a typical GSM Class IV applications circuit.
The input match is a shunt–C, series–L, low–pass structure
and can be retuned as desired with the only limitation being
the on–chip 12 pF blocking capacitor. For saturated applications such as GSM and analog cellular, the input match should
be optimized at the rated RF input power.
Interstage matching can be optimized by changing the value and/or position of the decoupling capacitor on the VD1 supply line. Moving the capacitor closer to the device or reducing
the value increases the frequency of resonance with the inductance of the device’s wirebonds and leadframe pin.
Output matching is accomplished with a one–stage low–
pass network as a compromise between bandwidth and harmonic rejection. Implementation is through chip capacitors
mounted along a 30 or 50Ω microstrip transmission line. Values and positions are chosen to present a 3Ω loadline to the
device while conjugating the device output parasitics. The network must also properly terminate the second and third harmonics to optimize efficiency and reduce harmonic output.
When low–Q commercial chip capacitors are used for the
shunt capacitors, loss can be reduced by mounting two capacitors in parallel, as shown in Figure 2, to achieve the total
value needed.
Loss in circuit traces must also be considered. The output
transmission line and the bias supply lines should be at least
0.6 mm in width to accommodate the peak circulating currents
which can be as high as 2 amperes. The bias supply line
which supplies the output should include an RF choke of at
least 8 nH, surface mount solenoid inductors or equivalent
length of microstrip lines. Discrete inductors will usually give
better efficiency and conserve board space.
The DC blocking capacitor required at the output of the device is best mounted at the 50Ω impedance point in the circuit
where the RF current is at a minimum and the capacitor loss
will have less effect.
Biasing Considerations
Gate bias is supplied to each stage separately through resistive division of the VSS voltage. The top of each divider is brought
out through pins 12 and 13 (VG2 and VG1 respectively) allowing
MRFIC0913
6
gate biasing through use of external resistors or positive voltages. This allows setting the quiescent current of each stage
separately.
For applications where the amplifier is operated close to
saturation, such as GSM and analog cellular, the gate bias
can be set with resistors. Variations in process and temperature will not affect amplifier performance significantly in these
applications. The values shown in the Figure 1 will set quiescent currents of 80 to 160 mA for the first stage and 400 to 800
mA for the second stage.
For linear modes of operation which are required for PDC,
DAMPS and CDMA, the quiescent current must be more
carefully controlled. For these applications, the VG pins can be
referenced to some tunable voltage which is set at the time of
radio manufacturing. Less than 1.25 mA is required in the divider network so a DAC can be used as the voltage source.
Typical settings for 6 V linear operation are 100 mA ±5% for
the first stage, and 500 mA ±5% for the second stage.
Power Control Using the MC33169
The MC33169 is a dedicated GaAs power amplifier support
IC which provides the –4 V required for VSS, an N–MOS drain
switch interface and driver and power supply sequencing. The
MC33169 can be used for power control in applications where
the amplifier is operated in saturation since the output power
in non–linear operation is proportional to VD2. This provides a
very linear and repeatable power control transfer function.
This technique can be used open–loop to achieve 20–25 dB
dynamic range over process and temperature variation. With
careful design and selection of calibration points, this technique can be used for GSM phase II control where 29 dB dynamic range is required, eliminating the need for the
complexity and cost of closed–loop control.
The transmit waveform ramping function required for systems such as GSM can be implemented with a simple Sallen
and Key filter on the MC33169 control loop. The amplifier is
then ramped on as the VRAMP pin is taken from 0 V to 3 V. To
implement the different power steps required for GSM, the
VRAMP pin is ramped between 0 V and the appropriate voltage
between 0 V and 3 V for the desired output power.
For closed–loop configurations using the MC33169,
MMSF4N01HD N–MOS switch and the MRFIC0913 provide a
typical 1 MHz 3 dB loop bandwidth. The STANDBY pin must
be enabled (3 V) at least 300 µs before the VRAMP pin goes
high and disabled (0 V) at least 20 µs before the VRAMP pin
goes low. This STANDBY function allows for the enabling of
the MC33169 one burst before the active burst thus reducing
power consumption.
Conclusion
The MRFIC0913 offers the flexibility in matching circuitry and
gate biasing required for portable cellular applications. Together
with the MC33169 support IC, the device offers an efficient system solution for TDMA applications such as GSM where saturated amplifier operation is used.
Evaluation Boards
Evaluation boards are available for RF Monolithic Integrated Circuits by adding a “TF” suffix to the device type.
For a complete list of currently available boards and ones
in development for newly introduced product, please contact your local Motorola Distributor or Sales Office.
MOTOROLA RF DEVICE DATA
PACKAGE DIMENSIONS
h X 45 _
A
E2
1
14 x e
16
D
e/2
D1
8
9
E1
8X
bbb
M
B
BOTTOM VIEW
E
C B
ÉÉ
ÇÇÇ
ÇÇÇ
ÉÉ
S
H
b1
DATUM
PLANE
c
A A2
c1
b
aaa
DETAIL Y
SEATING
PLANE
ccc C
q
W
GAUGE
PLANE
C A
S
DIM
A
A1
A2
D
D1
E
E1
E2
L
L1
b
b1
c
c1
e
h
q
W
L
M
SECT W–W
L1
C
NOTES:
1. CONTROLLING DIMENSION: MILLIMETER.
2. DIMENSIONS AND TOLERANCES PER ASME
Y14.5M, 1994.
3. DATUM PLANE –H– IS LOCATED AT BOTTOM
OF LEAD AND IS COINCIDENT WITH THE LEAD
WHERE THE LEAD EXITS THE PLASTIC BODY AT
THE BOTTOM OF THE PARTING LINE.
4. DIMENSIONS D AND E1 DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE PROTRUSION
IS 0.250 PER SIDE. DIMENSIONS D AND E1 DO
INCLUDE MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE –H–.
5. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION IS 0.127 TOTAL IN EXCESS OF THE
b DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. DATUMS –A– AND –B– TO BE DETERMINED AT
DATUM PLANE –H–.
aaa
bbb
ccc
A1
MILLIMETERS
MIN
MAX
2.000
2.350
0.025
0.152
1.950
2.100
6.950
7.100
4.372
5.180
8.850
9.150
6.950
7.100
4.372
5.180
0.466
0.720
0.250 BSC
0.300
0.432
0.300
0.375
0.180
0.279
0.180
0.230
0.800 BSC
–––
0.600
0_
7_
0.200
0.200
0.100
1.000
0.039
DETAIL Y
CASE 978–02
ISSUE A
MOTOROLA RF DEVICE DATA
MRFIC0913
7
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
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applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
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arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
Mfax is a trademark of Motorola, Inc.
How to reach us:
USA / EUROPE / Locations Not Listed: Motorola Literature Distribution;
P.O. Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315
Mfax: [email protected] – TOUCHTONE 602–244–6609
INTERNET: http://Design–NET.com
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51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
MRFIC0913
8
◊
MRFIC0913/D
MOTOROLA RF DEVICE DATA