Quad DMOS Analog Switch Driver "Improved Performance Over SD5000N and SD5400CY" CORPORATION SD5300 FEATURES DESCRIPTION • Low Propagation Time . . . . . . . . . . . . . . . . . . . . . . . • Low On Resistance Insertion Loss • Low • Low Capacitance • • 1ns – Input (Gate). . . . . . . . . . . . . . . . . . . . . . . . . . 3.6pF typ. – Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6pF typ. – Feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6pF typ. Low Crosstalk . . . . . . . . . . . . . . . . . . . . -107dB @ 4kHz Input Transient Protection The Calogic SD5300 is a monolithic array of 20V enhancement-mode DMOS FET analog switch drivers. The SD5300 is manufactured with implanted high-speed, high-voltage and low resistance double-diffused MOS (DMOS) process, and was designed to drive DMOS and other analog switches. The devices are available in 16-pin plastic DIP package and in a die form for hybrid applications. Custom devices based on SD5300 can also be ordered. ORDERING INFORMATION APPLICATION • Analog Switch Driver • Wide Band Dual Differential Amplifiers FUNCTIONAL BLOCK DIAGRAM S1 D1 1 SUBSTRATE 2 S2 G3 D3 SOIC Plastic DIP Sorted Chips in Carriers S4 TOP VIEW 16 D4 15 N/C S2 1 1 4 S1 Bo dy 2 13 NC G2 3 12 G 1 D2 4 11 D 1 10 N/C D3 5 10 D 4 9 D3 G3 6 9 G4 S3 7 8 14 G4 S1 4 13 S4 S2 5 12 S3 G2 6 11 G 3 8 -55oC to +125oC -55oC to +125oC -55oC to +125oC SO PIN CONFIGURATION 3 D2 S3 SUBSTRATE CD9 SD5300Y SD5300N XSD5300 G1 N/C 7 G4 D4 Temperature Range TOP VIEW G2 D2 Package DUAL IN LINE PACKAGE PIN CONFIGURATION G1 D1 Part S4 SD5300 CORPORATION ABSOLUTE MAXIMUM RATINGS PARAMETER Breakdown Voltage Drain-Source Source-Drain Drain-Substrate Source-Substrate Gate-Source Gate-Substrate Gate-Drain Continuous Drain Current ABSOLUTE MAXIMUM SYMBOL MAX. VALUE VDS VSD VDB VSB VGS VGB VGD 20 20 25 25 25 25/-.3 25 ID 50 UNITS PARAMETER V mA SYMBOL MAX. VALUE UNITS Drain Current ID 50 mA Temperature Range Operating Storage TJ TS -55 to +85 -55 to +150 Power Dissipation Package Each Device PD PD 640 (Note 1) 300 (Note 2) o C mW Notes: 1. Linear Derating Factor – 10.7mW/oC above 25oC 2. Linear Derating Factor – 5.0mW/oC above 25 oC ELECTRICAL CHARACTERISTICS (TA = 25oC, unless otherwise noted) SYMBOL BVDS PARAMETER Drain-Source Breakdown Voltage BVSB Source-Substrate Breakdown Voltage IGBS Gate-Body Leakage Current VGS(th) Gate-Source Threshold Voltage r DS(on) MIN TYP 20 25 MAX UNITS CONDITIONS ID = 10µA, VGS = VBS = 0 V 20 25 0.5 Drain-Source ON Resistance IS = 10µA, VGS = 0, Drain Open 1.0 µA VGB = 25V, VDB = VSB = 0 2.0 V VDS = VGS, I D = 1.0µA, VSB = 0 45 22 25 17 20 VGS = 15V, ID = 1mA, VSB = 0 15 17 VGS = 20V, ID = 1mA, VSB = 0 g fs Common-Source Forward Transconductance c (ga+gd+gb) Gate Node Capacitance 2.4 3.7 c (gd+db) Drain Node Capacitance 1.3 1.7 c (gs+sb) Source Node Capacitance 3.5 4.5 c (dg) Reverse Transfer Capacitance 0.3 .7 CT Cross Talk 10 VGS = 5V, I D = 1mA, VSB = 0 40 12 -107 ohms VGS = 10V, ID = 1mA, VSB = 0 mmhos VDS = 10V, ID = 20mA, f = 1KHz, VSB = 0 pF f = 1MHz, VDS = 10V, VGS = VBS = -15V dB SD5300 CORPORATION SWITCHING CHARACTERISTICS SYMBOL td(on) PARAMETER MIN Turn-on Time TYP MAX 0.7 1.5 tr Rise Time 0.8 toff * Turn-off Time 10.0 1.5 UNITS CONDITIONS RL = 680Ω, RG = 51 ns VDD = 5V V G(on) = 10V * t off is dependent on RL and C and does not depend on the device characteristics. TEST CIRCUIT SWITCHING WAVEFORM TO SCOPE +V DD 51Ω RL +5V VIN VOUT OV 90% 50% 10% TO SCOPE VIN Td (ON) +V DD VOUT 90% 90% 50% 10% 10% OV Input Pulse t r , t p <1nec Rep rate = 1MHz Sampling Scope t r <350psec RIN = 1MΩ CIN = 2pF tr t OFF