TPS5511 3-CHANNEL POWER SUPPLY SUPERVISOR SLVS170 – AUGUST 1998 D D D D D D D D D OR P PACKAGE (TOP VIEW) Over Voltage Protection and Lock Out for 5 V, 3.3 V, and 12 V Fault Protection Output with Open Drain Output Stage Open Drain Power Good Output Signal for Power Good Input, 5 V and 3.3 V 300 ms Power Good Delay 2.3 ms PSON Control to FPO Turn-Off Delay 38 ms PSON Control Debounce 73 µs Width Noise Deglitches Wide Power Supply Voltage Range from 4 V to 15 V PGI GND FPO PSON 1 8 2 7 3 6 4 5 PGO VCC VS5 VS33 description The TPS5511 is designed to minimize the external components of personal-computer switching power supply systems. It provides protection circuits, power good indicator, fault protection output (FPO), and PSON control. OVP (over voltage protection) monitors 5 V, 3.3 V, and 12 V (12 V OV detects via VCC terminal). When an OV condition is detected, the PGO (power good output) is asserted low and FPO is latched high. PSON from low to high resets the protection latch. There is a 2.3-ms turn-off delay from PSON to FPO. There is no delay during turn on. Power good feature monitors PGI, 5 V and 3.3 V under voltages and issues a power good signal when they are ready. The TPS5511 is characterized for operation from TJ = –40°C to 125°C junction temperature. PGI 5 VSB PGO TPS5511 1 2 3 4 PSON 12 V PGI PGO GND VCC FPO VS5 PSON VS33 8 0.5 V Drop 7 6 5 VSB 5V 3.3 V Figure 1. TPS5511 Typical Application Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TPS5511 3-CHANNEL POWER SUPPLY SUPERVISOR SLVS170 – AUGUST 1998 functional block diagram VCC POR 12 OV – Vref + Reset RST VCCI = 3.6 V RI = 200 kΩ R R VS5 Vref 1.192 V RTT S Q – Reset Dominent Latch + RI = 100 kΩ 2.3 ms Delay VS33 VCC 150 µA EN Reset Reset VCCI RTT OSC 3.3 OV Vref FPO R 73 µs Debounce 5 OV Vref Bandgap Reference Vreg – 38 ms Debounce RST + PSON RI = 100 kΩ Vref – VCC 3.3 UV + Pull-High Resistor R Vref – 73 µs Debounce 5 UV + PGO EN RST Vref PGI 2 – + POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 300 ms Delay Counter TPS5511 3-CHANNEL POWER SUPPLY SUPERVISOR SLVS170 – AUGUST 1998 Terminal Functions TERMINAL NAME I/O NO. DESCRIPTION VS33 5 I 3.3 V over/under voltage protection input pin VS5 6 I 5 V over/under voltage protection input pin GND 2 FPO 3 PGI PGO Ground O Inverted fault protection output, open drain output stage 1 I Power good input signal pin 8 O Power good output signal pin, open drain output stage PSON 4 I ON/OFF control input pin VCC 7 I Supply voltage/12 V over voltage protection input pin DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING OPERATING FACTOR ABOVE TA = 25°C TA = 125°C POWER RATING P 1092 mW 8.74 mW/°C 218 mW D 730 mW 5.84 mW/°C 146 mW absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage, VCC, (see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V Output voltage, VO (FPO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V Output voltage, VO (PGO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V Supply current, ICC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see Dissipation Rating Table Operating junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Lead temperature, 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltages are with respect to the device GND terminal. recommended operating conditions TEST CONDITIONS Supply voltage, VCC Input voltage, VI voltage VO Output voltage, 4 PSON, VS5, VS33, PGI TYP MAX UNIT 15 V 7 V FPO 15 V PGO 7 V Operating junction temperature, TJ Output sink current current, IO( O(sink) i k) MIN –40 FPO PGO Supply voltage rising time, tr See Note 2 1 125 °C 30 mA 10 mA ms NOTE 2: VCC rising and falling slew rate must be less then 14 V/ms. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TPS5511 3-CHANNEL POWER SUPPLY SUPERVISOR SLVS170 – AUGUST 1998 electrical characteristics, VCC = 5 V, TJ = full range. (unless otherwise specified) over voltage protection PARAMETER TEST CONDITIONS Over-voltage threshold MIN TYP MAX VS33 3.9 4.1 4.3 VS5 5.7 6.1 6.5 13.3 13.8 14.3 VCC ILKG VOL Leakage current (FPO) V(FPO) = 5 V 5 Low level output voltage (FPO) Isink = 10 mA Isink = 30 mA 0.3 0.7 UNIT V µA V PGI and PGO PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 1.141 1.192 1.242 V VS33 2.71 2.83 2.95 VS5 4.1 4.3 4.47 Input threshold voltage (PGI) Under voltage threshold Under-voltage ILKG VOL Leakage current (PGO) PGO = 5 V Low level output voltage (PGO) Sink current = 10 mA V 5 µA 0.4 V PSON control PARAMETER TEST CONDITIONS Input pull-up current MIN PSON = 0 V TYP MAX µA 150 High-level input voltage UNIT 2.4 V Low-level input voltage 1.2 V total device PARAMETER ICC TEST CONDITIONS Supply current MIN TYP PSON = 5 V MAX 1 UNIT mA switching characteristics, VCC = 5 V, TJ = full range PARAMETER td1 tb td2 4 TEST CONDITIONS MIN TYP MAX UNIT Delay time (PGI to PGO) 200 300 450 ms De-bounce time (PSON) 24 38 57 ms Noise deglitch time 47 73 110 µs tb + 1.1 tb + 2.3 tb + 4 ms PSON to FPO delay time POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS5511 3-CHANNEL POWER SUPPLY SUPERVISOR SLVS170 – AUGUST 1998 timing chart VCC Reset R PSON S Q FPO PGI 3.3 V 5V 12 V PGO td1 td1 td1 PG Off Delay td2 tb Protect Occur tb AC OFF PSON OFF POST OFFICE BOX 655303 PSON ON • DALLAS, TEXAS 75265 5 TPS5511 3-CHANNEL POWER SUPPLY SUPERVISOR SLVS170 – AUGUST 1998 MECHANICAL DATA D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN 0.050 (1,27) 0.020 (0,51) 0.014 (0,35) 14 0.010 (0,25) M 8 0.008 (0,20) NOM 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) Gage Plane 0.010 (0,25) 1 7 0°– 8° A 0.044 (1,12) 0.016 (0,40) Seating Plane 0.069 (1,75) MAX 0.010 (0,25) 0.004 (0,10) PINS ** 0.004 (0,10) 8 14 16 A MAX 0.197 (5,00) 0.344 (8,75) 0.394 (10,00) A MIN 0.189 (4,80) 0.337 (8,55) 0.386 (9,80) DIM 4040047 / D 10/96 NOTES: A. B. C. D. 6 All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). Falls within JEDEC MS-012 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS5511 3-CHANNEL POWER SUPPLY SUPERVISOR SLVS170 – AUGUST 1998 MECHANICAL DATA P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0°– 15° 0.010 (0,25) M 0.010 (0,25) NOM 4040082 / B 03/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1998, Texas Instruments Incorporated