SN54ACT16245, 74ACT16245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS097B – DECEMBER 1989 – REVISED APRIL 1996
D
D
D
D
D
D
D
D
SN54ACT16245 . . . WD PACKAGE
74ACT16245 . . . DGG OR DL PACKAGE
(TOP VIEW)
Members of the Texas Instruments
Widebus Family
Inputs Are TTL-Voltage Compatible
3-State Outputs Drive Bus Lines Directly
Flow-Through Architecture Optimizes PCB
Layout
Distributed VCC and GND Configuration to
Minimize High-Speed Switching Noise
EPIC (Enhanced-Performance Implanted
CMOS) 1-mm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Packages Using
25-mil Center-to-Center Pin Spacings, Thin
Shrink Small-Outline (DGG) Packages, and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Pin Spacings
1DIR
1B1
1B2
GND
1B3
1B4
VCC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCC
2B5
2B6
GND
2B7
2B8
2DIR
description
The SN54ACT16245 and 74ACT16245 are 16-bit
bus transceivers organized as dual-octal
noninverting 3-state transceivers and designed
for asynchronous two-way communication
between data buses. The control-function
implementation minimizes external timing
requirements.
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
1G
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCC
2A5
2A6
GND
2A7
2A8
2G
The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on
the logic level at the direction-control (DIR) input. The enable (G) input can be used to disable the devices so
that the buses are effectively isolated.
The SN54ACT16245 is characterized for operation over the full military temperature range of –55°C to 125°C.
The 74ACT16245 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
CONTROL
INPUTS
OPERATION
G
DIR
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN54ACT16245, 74ACT16245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS097B – DECEMBER 1989 – REVISED APRIL 1996
logic symbol†
1G
1DIR
48
G3
1
3 EN1 [BA]
3 EN2 [AB]
25
2G
2DIR
G6
24
6 EN4 [BA]
6 EN5 [AB]
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
47
1
1
46
2
1
3
44
5
43
6
41
8
40
9
38
11
37
12
36
13
4
1
1
35
1B1
2
5
14
33
16
32
17
30
19
29
20
27
22
26
23
1B2
1B3
1B4
1B5
1B6
1B7
1B8
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1DIR
1
2DIR
48
1A1
25
1G
47
2A1
2
24
36
13
1B1
To Seven Other Transceivers
2
POST OFFICE BOX 655303
2G
To Seven Other Transceivers
• DALLAS, TEXAS 75265
2B1
SN54ACT16245, 74ACT16245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS097B – DECEMBER 1989 – REVISED APRIL 1996
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±400 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DGG package . . . . . . . . . . . . . . . . 0.85 W
DL package . . . . . . . . . . . . . . . . . . . 1.2 W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils.
recommended operating conditions (see Note 3)
SN54ACT16245
MAX
MIN
MAX
4.5
5.5
4.5
5.5
VCC
VIH
Supply voltage (see Note 4)
VIL
VI
Low-level input voltage
Input voltage
0
VO
IOH
Output voltage
0
High-level output current
IOL
∆t/∆v
Low-level output current
High-level input voltage
74ACT16245
MIN
2
2
0.8
Input transition rise or fall rate
0
UNIT
V
V
0.8
V
VCC
VCC
V
–24
–24
mA
24
24
mA
10
ns/V
VCC
VCC
10
0
0
0
V
TA
Operating free-air temperature
–55
125
–40
85
°C
NOTES: 3. Unused inputs should be tied to VCC through a pullup resistor of approximately 5 kW or greater to keep them from floating.
4. All VCC and GND pins must be connected to the proper voltage power supply.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN54ACT16245, 74ACT16245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS097B – DECEMBER 1989 – REVISED APRIL 1996
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
4.5 V
IOH = –50
50 mA
VOH
24 mA
IOH = –24
IOH = –50 mA{
IOH = –75 mA{
IOL = 24 mA
Control inputs
A or B ports}
ICC
∆ICCw
Ci
Control inputs
Cio
A or B ports
4.4
SN54ACT16245
MIN
MAX
74ACT16245
MIN
4.4
4.4
5.5 V
5.4
5.4
5.4
4.5 V
3.94
3.94
3.8
5.5 V
4.94
4.94
4.8
MAX
UNIT
V
3.85
5.5 V
IOL = 50 mA{
IOL = 75 mA{
II
IOZ
TA = 25°C
TYP
MAX
5.5 V
IOL = 50 mA
VOL
MIN
3.85
4.5 V
0.1
0.1
5.5 V
0.1
0.1
0.1
4.5 V
0.36
0.5
0.44
5.5 V
0.36
0.5
0.44
5.5 V
0.1
V
1.65
5.5 V
1.65
VI = VCC or GND
VO = VCC or GND
5.5 V
±0.1
±1
±1
mA
5.5 V
±0.5
±10
±5
mA
VI = VCC or GND, IO = 0
One input at 3.4 V,
Other inputs at GND or VCC
5.5 V
8
160
80
mA
5.5 V
0.9
1
1
mA
VI = VCC or GND
VO = VCC or GND
5V
4.5
pF
5V
16
pF
† Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
‡ For I/O ports, the parameter IOZ includes the input leakage current II.
§ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
B or A
tPZH
tPZL
G
B or A
tPHZ
tPLZ
G
B or A
MIN
TA = 25°C
TYP
MAX
SN54ACT16245
74ACT16245
MIN
MAX
MIN
MAX
3.2
6.9
9.3
3.2
11.5
3.2
10.5
2.6
6.4
9.2
2.6
11.1
2.6
10.2
2.7
6.4
9.1
2.7
10.9
2.7
10
3.4
7.4
10.5
3.4
12.6
3.4
11.6
5.8
9.2
11.6
5.8
13.4
5.8
12.6
5.5
8.5
10.8
5.5
12.7
5.5
11.8
UNIT
ns
ns
ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd
d
4
Power dissipation capacitance per transceiver
POST OFFICE BOX 655303
TEST CONDITIONS
Outputs enabled
Outputs disabled
• DALLAS, TEXAS 75265
CL = 50 pF,
pF
f = 1 MHz
TYP
52
10
UNIT
pF
SN54ACT16245, 74ACT16245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS097B – DECEMBER 1989 – REVISED APRIL 1996
PARAMETER MEASUREMENT INFORMATION
2 × VCC
S1
500 Ω
From Output
Under Test
Open
GND
LOAD CIRCUIT
Output
Control
(low-level
enabling)
3V
1.5 V
1.5 V
0V
tPLH
tPHL
VOH
Output
S1
Open
2 × VCC
GND
500 Ω
CL = 50 pF
(see Note A)
Input
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
50% VCC
50% VCC
VOL
3V
0V
tPZL
[ VCC
tPLZ
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
1.5 V
1.5 V
50% VCC
VOL
tPHZ
tPZH
VOLTAGE WAVEFORMS
20% VCC
50% VCC
80% VCC
VOH
[0V
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
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