TI SN74ABT863DBR

SN54ABT863, SN74ABT863
9-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998
D
D
D
D
D
D
State-of-the-Art EPIC-ΙΙB  BiCMOS Design
Significantly Reduces Power Dissipation
Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
High-Impedance State During Power Up
and Power Down
High-Drive Outputs (–32-mA IOH, 64-mA IOL)
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB) Packages, and Thin Shrink
Small-Outline (PW), Ceramic Chip Carriers
(FK), Plastic (NT), and Ceramic (JT) DIPs
SN54ABT863 . . . JT PACKAGE
SN74ABT863 . . . DB, DW, NT, OR PW PACKAGE
(TOP VIEW)
OEBA1
A1
A2
A3
A4
A5
A6
A7
A8
A9
OEBA2
GND
The outputs are in the high-impedance state
during power up and power down. The outputs
remain in the high-impedance state while the
device is powered down.
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
VCC
B1
B2
B3
B4
B5
B6
B7
B8
B9
OEAB2
OEAB1
A2
A1
A3
A4
A5
NC
A6
A7
A8
4
5
3 2 1 28 27 26
25
6
24
7
21
8
22
9
21
10
20
11
19
12 13 14 15 16 17 18
B3
B4
B5
NC
B6
B7
B8
A9
OEBA2
GND
NC
OEAB1
OEAB2
B9
These devices allow noninverted data
transmission from the A bus to the B bus or from
the B bus to the A bus, depending on the logic
levels at the output-enable (OEAB and OEBA)
inputs.
24
2
SN54ABT863 . . . FK PACKAGE
(TOP VIEW)
description
The ’ABT863 devices are 9-bit transceivers
designed for asynchronous communication
between data buses. The control-function
implementation allows for maximum flexibility in
timing.
1
OEBA1
NC
VCC
B1
B2
D
NC – No internal connection
When VCC is between 0 and 2.1 V, the device is
in the high-impedance state during power up or
power down. However, to ensure the
high-impedance state above 2.1 V, OE should be
tied to VCC through a pullup resistor; the minimum
value of the resistor is determined by the
current-sinking capability of the driver.
The SN54ABT863 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT863 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
Copyright  1998, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN54ABT863, SN74ABT863
9-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998
FUNCTION TABLE
INPUTS
OEAB1
OEAB2
OEBA1
OEBA2
L
L
L
L
L
L
H
X
L
L
X
H
H
X
L
L
X
H
L
L
H
X
H
X
H
X
X
H
X
H
X
H
X
H
H
X
OPERATION
Latch A and B
A to B
B to A
Isolation
logic symbol†
OEBA1
OEBA2
OEAB1
OEAB2
A1
1
&
EN1
11
13
&
EN2
14
2
1
1
A2
A3
A4
A5
A6
2
23
1
2
3
22
4
21
5
20
6
19
7
18
8
17
POST OFFICE BOX 655303
B1
• DALLAS, TEXAS 75265
B2
B3
B4
B5
B6
SN54ABT863, SN74ABT863
9-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998
logic diagram (positive logic)
OEBA1
OEBA2
OEAB1
OEAB2
A1
1
11
13
14
2
23
B1
To Eight Other Channels
Pin numbers shown are for the DB, DW, JT, NT, and PW packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
Current into any output in the low state, IO: SN54ABT863 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74ABT863 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W
NT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
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3
SN54ABT863, SN74ABT863
9-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998
recommended operating conditions (see Note 3)
SN54ABT863
MAX
MIN
MAX
4.5
5.5
4.5
5.5
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
IOH
IOL
High-level output current
∆t/∆v
Input transition rise or fall rate
∆t/∆VCC
TA
Power-up ramp rate
200
Operating free-air temperature
–55
High-level input voltage
SN74ABT863
MIN
2
2
0.8
Input voltage
0
Low-level output current
Outputs enabled
VCC
–24
V
V
0.8
0
UNIT
VCC
–32
V
V
mA
48
64
mA
5
5
ns/V
µs/V
200
125
–40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN54ABT863, SN74ABT863
9-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V,
II = –18 mA
IOH = –3 mA
VCC = 5 V,
VCC = 4
4.5
5V
VOL
VCC = 4
4.5
5V
MIN
SN54ABT863
MIN
–1.2
MAX
SN74ABT863
MIN
–1.2
MAX
–1.2
2.5
2.5
2.5
IOH = –3 mA
IOH = –24 mA
3
3
3
2
2
IOH = –32 mA
IOL = 48 mA
2*
A or B ports
VCC = 0 to 5.5 V,
VCC = 2.1 V to 5.5 V,
V
V
IOL = 64 mA
0.55
0.55*
0.55
100
Control inputs
UNIT
2
0.55
Vhys
II
TA = 25°C
TYP†
MAX
VI = VCC or GND
VI = VCC or GND
V
mV
±1
±1
±1
±20
±20
±20
µA
IOZPU
VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V,
OE = * don’t care
±50
±50**
±50
µA
IOZPD
VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V,
OE = * don’t care
±50
±50**
±50
µA
IOZH‡
VCC = 2.1 V to 5.5 V, VO = 2.7 V,
OE ≥ 2 V
10
10
10
µA
IOZL‡
VCC = 2.1 V to 5.5 V, VO = 0.5 V,
OE ≥ 2 V
–10
–10
–10
µA
Ioff
VCC = 0,
VCC = 5.5 V,
VO = 5.5 V
VI or VO ≤ 4.5 V
±100
µA
50
µA
VCC = 5.5 V,
VO = 2.5 V
Outputs high
–225
mA
ICEX
IO§
ICC
A or B ports
VCC = 5.5 V,
IO = 0,
VI = VCC or GND
inp ts
Data inputs
VCC = 5.5 V,
One input at 3.4 V,,
Other inputs at
VCC or GND
∆ICC¶
Control inputs
Ci
Control inputs
±100*
Outputs high
50
–50
50
–100
–225
1
250
250
250
µA
Outputs low
24
30
38
38
mA
Outputs disabled
0.5
250
250
250
µA
Outputs enabled
1.5
1.5
1.5
Outputs disabled
0.05
0.05
0.05
1.5
1.5
1.5
VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND
VI = 2.5 V or 0.5 V
VO = 2.5 V or 0.5 V
–50
–225
–50
4
Cio
A or B ports
7
* On products compliant to MIL-PRF-38535, this parameter does not apply.
** On products compliant to MIL-PRF-38535, this parameter is not production tested.
† All typical values are at VCC = 5 V.
‡ The parameters IOZH and IOZL include the input leakage current.
§ Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
¶ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
mA
pF
pF
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SN54ABT863, SN74ABT863
9-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
B or A
tPZH
tPZL
OEAB or OEBA
B or A
tPHZ
tPLZ
OEAB or OEBA
B or A
PARAMETER
VCC = 5 V,
TA = 25°C
POST OFFICE BOX 655303
SN74ABT863
MIN
TYP
MAX
MIN
MAX
MIN
MAX
1
2.6
4.1
1
7
1
5.7
1
2.3
3.3
1
3.9
1
3.9
1
3.2
4.3
1
5.4
1
5.5
1
3.3
4.4
1
5.5
1
5.4
2.5
4.8
6
2.5
6.8
2.5
6.7
1.5
4.4
5.9
1.5
7.8
1.5
6.9
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
6
SN54ABT863
• DALLAS, TEXAS 75265
UNIT
ns
ns
ns
SN54ABT863, SN74ABT863
9-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998
PARAMETER MEASUREMENT INFORMATION
7V
500 Ω
From Output
Under Test
S1
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
LOAD CIRCUIT
3V
Timing Input
1.5 V
0V
tw
tsu
3V
Input
1.5 V
1.5 V
th
3V
Data Input
1.5 V
1.5 V
Figure 1. Load Circuit and Voltage Waveforms
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7
PACKAGE OPTION ADDENDUM
www.ti.com
28-May-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74ABT863DBLE
OBSOLETE
SSOP
DB
24
SN74ABT863DBR
ACTIVE
SSOP
DB
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT863DBRE4
ACTIVE
SSOP
DB
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT863DBRG4
ACTIVE
SSOP
DB
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT863DW
ACTIVE
SOIC
DW
24
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT863DWE4
ACTIVE
SOIC
DW
24
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT863DWG4
ACTIVE
SOIC
DW
24
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT863DWR
ACTIVE
SOIC
DW
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT863DWRE4
ACTIVE
SOIC
DW
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT863DWRG4
ACTIVE
SOIC
DW
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT863NT
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74ABT863NTE4
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TBD
Lead/Ball Finish
Call TI
MSL Peak Temp (3)
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
28-May-2007
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MPDI004 – OCTOBER 1994
NT (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
24 PINS SHOWN
PINS **
A
24
28
A MAX
1.260
(32,04)
1.425
(36,20)
A MIN
1.230
(31,24)
1.385
(35,18)
B MAX
0.310
(7,87)
0.315
(8,00)
B MIN
0.290
(7,37)
0.295
(7,49)
DIM
24
13
0.280 (7,11)
0.250 (6,35)
1
12
0.070 (1,78) MAX
B
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0°– 15°
0.010 (0,25) M
0.010 (0,25) NOM
4040050 / B 04/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
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MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
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