February 1999 PBL 3776/1 Dual Controller IC for High Current Stepper Motor Applications Description Key Features The PBL 3776/1 is a switch-mode (chopper), constant-current controller IC intended for controlling external transistors in a high current stepper motor application.The IC has two channels one for each winding of a two-phase stepper motor. The circuit is similar to Ericsson´s PBL 3775/1. PBL 3776/1 is equipped with a Disable input to simplify half-stepping operation. The PBL 3776/1 contains a clock oscillator, which is common for both driver channels, a set of comparators and flip-flops implementing the switching control, and two output sections each containing four outputs, two source and two sink, intended to drive an external H-bridge. Voltage supply requirements are +5 V for logic and +10 to +45 V for the outputs. The close match between the two driver channels guarantees consistent output current ratios and motor positioning accuracy. • Suitable to drive any external Mos Fet or bipolar power transistor. • 0°C to +85°C operation. • Few external components. • Crossconduction prevented by time delay. • Close matching between channels for high positioning accuracy. • Digital filter on chip eliminates external filtering components. • Plastic 24-pin "narrow" DIP package. Phase 1 Dis 1 V R1 C1 Pwr GND 1 SGND 1 1 PBL 3776/1 T1BL – CC R S Q T1AL T1AU T1BU B P VBB1 L 37 Logic /1 + V 76 VCC + V BB2 – T2BU Logic RC + – S R T2AU T 2AL Q T2BL 24-pin plastic DIP package, narrow Phase 2 Dis 2 V R2 C2 SGND 2 Pwr GND 2 Figure 1. Block diagram. 1 PBL 3776/1 Maximum Ratings Parameter Pin no.* Symbol Min Max Unit Voltage Logic supply Output supply Logic inputs Analog inputs 13 6, 19 10, 11, 14, 15 8, 9, 16, 17 VCC VBB VI VA 0 0 -0.3 -0.3 7 45 6 VCC V V V V 2, 3, 4, 5, 20, 21, 22, 23 10, 11, 14, 15 8, 9, 16, 17 IO II IA -500 -10 -10 +500 mA mA mA TJ TS -55 +150 +150 °C °C Current Output current Logic inputs Analog inputs t=1mS Temperature Junction temperature Storage temperature Recommended Operating Conditions Parameter Symbol Min Typ Max Unit Logic supply voltage VCC 4.75 5 5.25 V Supply voltage VBB 10 Output emitter voltage VE Output current continuous (see text) IM Operating ambient temperature TA Rise and fall time logic inputs tr,, tf Oscillator timing resistor RT 40 V 1.0 V -200 +200 mA 0 +85 °C 2 µs 20 kohm 2 12 VOA - VOB Phase 1 10 Dis 1 V R1 C1 11 9 8 SGND 1 Pwr GND 1 1 7 PBL 3776/1 t on – V I CC CC CC 13 R S + V Q Logic 2 T1BL 4 T1AL 5 T1AU 3 T1BU 6 VBB1 19 V BB2 IBB 22 T2BU I OU t VC td 12 kΩ + RT – Logic I RC RC 12 S R + – Q t off 50 % 20 T2AU I OU 21 T 2AL 23 T2BL IOL V CH * IOL 4 700 pF VCC t CT 15 14 Phase 2 II IIH IR 17 Dis 2 V R2 16 18 C2 SGND 2 V 24 tb RC Pwr GND 2 IIL V OA V OB V BB IA VI V IH V VA VRC V IL R V CH * Rs VC t VA 1 fs = t + t on off D= * For test purposes only Figure 2. Definition of symbols and test circuit. 2 Figure 3. Definition of terms. ton ton + t off PBL 3776/1 Electrical Characteristics Electrical characteristics over recommended operating conditions, unless otherwise noted. 0°C ≤ Tj ≤ +125°C. Parameter Ref. Symbol fig. Conditions Min Typ Max Unit Note 3. 65 70 mA Dis1= Dis2= HIGH. 7 10 mA VBB= 24 V, IBB1= IBB2= 200 mA. 0.2 0.3 W General Supply current ICC 2 Supply current ICC 2 Total power dissipation PD Notes 2, 3. Thermal shutdown junction temperature Turn-off delay td 3 Note 2 160 TA = +25°C, dVC/dt ≥ 50 mV/µs, 1.1 °C 2.0 µs IBB= 100 mA. Note 2. Logic Inputs Logic HIGH input voltage VIH 2 Logic LOW input voltage VIL 2 Logic HIGH input current IIH 2 VI = 2.4 V Logic LOW input current IIL 2 VI = 0.4 V Analog Inputs Input current IA 2 Vr= 5 V 0.5 |VC1—VC2| mismatch VCdiff 2 TA = 25°C Note 3 5 8 IM = 200 mA 0.2 Motor Outputs Lower transistor saturation voltage 2.0 -0.2 V 0.6 V 20 µA -0.1 Lower transistor leakage current 2 Dis1 = Dis2 = High, TA = 25°C 50 Upper transistor saturation voltage 9 IM = 200 mA 0.9 Upper transistor leakage current 2 Dis1 = Dis2 = High, TA = 25°C 50 mA 0.8 mA mV 0.4 V µA 1.2 V µA Chopper Oscillator Chopping frequency fs 3 CT = 4 700 pF, RT = 12 kohm 23.0 kHz Digital filter blanking time tb 3 CT = 4 700 pF. Note 3. 1.0 µs Thermal Characteristics Parameter Ref. Symbol fig. Conditions TJ-A TJ-A RthJ-C RthJ-A Note 2 Note 2 Min Typ 28 45 Max Unit °C/W °C/W Notes 1. All voltages are with respect to ground. Currents are positive into, negative out of specified terminal. 2. Not covered by final test program. 3. Switching duty cycle D = 30%, fs = 23.0 kHz. 3 PBL 3776/1 PWR GND 1 1 24 PWR GND T1BL 2 23 T2BL T1BU 3 22 T2BU T1AL 4 21 T2AL T1AU 5 20 T2AU VBB1 6 SGND 1 7 VR1 8 C1 9 Phase 1 10 PBL 3776/1 2 19 VBB 2 18 SGND 17 VR 2 2 16 C 2 15 Phase Dis 1 11 14 Dis RC 12 13 Vcc 2 2 Figure 4. Pin configuration. Pin Description DIP Symbol Description 1 2 3 4 5 6 7 PWR GND 1 T1BL T1BU T1AL T1AU VBB1 SGND 1 8 VR1 9 C1 10 11 Phase1 Dis1 12 RC 13 14 Vcc Dis2 15 16 Phase2 C2 17 VR2 18 SGND 2 19 20 21 22 23 24 VBB2 T2AU T2AL T2BU T2BL PWR GND 2 "Power Ground" from output channel 1. Connected to the ground path (see application examples). Output, channel 1, B side lower transistor. The pin will sink current when phase is high. Output, channel 1, B side upper transistor. The pin will source current when phase is low. Output, channel 1, A side lower transistor. The pin will sink current when phase is low. Output, channel 1, A side upper transistor. The pin will source current when phase is high. Supply voltage for driving channel 1 outputs. Sense ground channel 1. Logic ground reference and sense ground for the current control feedbackloop. Reference voltage, channel 1. Controls the comparator threshold voltage and hence the output current. Comparator input channel 1. This input senses the instantaneous voltage across the sensing resistor, filtered by the internal digital filter or an optional external RC network. Controls the direction of channel 1 outputs T1AL, T1AU, T1BL and T1BU. Disable input for channel 1. When HIGH, all four output transistors are turned off, which results in a rapidly decreasing output current to zero. Clock oscillator RC pin. Connect a 12 kohm resistor to VCC and a 4 700 pF capacitor to ground to obtain the nominal switching frequency of 23.0 kHz and a digital filter blanking time of 1.0 µs. Logic voltage supply, nominally +5 V. Disable input for channel 2. When HIGH, all four output transistors are turned off, which results in a rapidly decreasing output current to zero. Controls the direction of channel 2 outputs T2AL, T2AU, T2BL and T2BU. Comparator input channel 2. This input senses the instantaneous voltage across the sensing resistor, filtered by the internal digital filter or an optional external RC network. Reference voltage, channel 2. Controls the comparator threshold voltage and hence the output current. Sense ground channel 1. Logic ground reference and sense ground for the current control feedbackloop. Supply voltage for driving channel 2 outputs. Output, channel 2, A side upper transistor. The pin will source current when phase is high. Output, channel 2, A side lower transistor. The pin will sink current when phase is low. Output, channel 2, B side upper transistor. The pin will source current when phase is low. Output, channel 2, B side lower transistor. The pin will sink current when phase is high. "Power Ground" from output channel 2. Connected to the ground path (see application examples). 4 PBL 3776/1 Functional Description correspond-ing lower external transistor, in the H-bridge, is turned off. The turn-off of one channel is independent of the other channel. The current decreases until the clock oscillator triggers the flipflops of both channels simultaneously, which turns on the output transistors again, and the cycle is repeated. To prevent erroneous switching due to switching transients at turn-on, the PBL 3776/1 includes a digital filter. The clock oscillator provides a blanking pulse which is used for digital filtering of the voltage transient across the current sensing resistor during turn-on. Due to the high output drive capability, this transient might exceed the max. allowed voltage on the C inputs and damage the circuit. A resistor is placed in the feedback loop in order to prevent this transient from damaging the circuit. The current paths during turn-on, turnoff and phase shift are shown in figure 6. Each channel of the PBL 3776/1 consists of the following sections: • An output section with four output transistors, two sourcing and two sinking, intended to drive the four transistors in an external H-bridge. Each transistor is capable of driving up to 200 mA continuous current. • A logic section that controls the output transistors. • An S-R flip-flop, and a comparator. The clock-oscillator is common to both channels. Constant current control is achieved by switching the output current to the windings. This is done by sensing the peak current through the winding via a current-sensing resistor RS, effectively connected in series with the motor winding. As the current increases, a voltage develops across the sensing resistor, which is fed back to the comparator. At the predetermined level, defined by the voltage at the reference input VR, the comparator resets the flipflop, which turns off the sourcing output transistor in the circuit. Consequently the Applications Information Output current The maximum peak output, sink/source, current is 500 mA. But due to the power handling capacity of the package this current can only be used for a short period of time (1mS). Recommended max continuous output current is 200 mA/output transistor. This is practical when driving MOS FET power transistors, since a high peak output current capability will rapidly charge/ discharge the gate capacitance, while the continuous current usage is very small. Current control The regulated output current level to the motor winding is determined by the voltage at the reference input and the value of the sensing resistor, RS. The peak current through the sensing resistor (and the motor winding) can be expressed as: IM,peak = 0.1·VR / RS [A] With a recommended value of 0.1 ohm for the sense resistor RS, a 5 V reference voltage will produce an output current of approximately 5 A. RS should be selected for maximum motor current. Chopping frequency, winding inductance and supply voltage also affect the current, but to much less extent. Vmm Dis 1 V R1 10 11 8 PBL 3776/1 VCC 13 Rt 7 – + V CC Pwr GND 1 1 SGND 1 9 R Q S + – 12 kΩ RC 12 S Q R + – Ct R1 270Ω T1BL T1AL 2 4 5 3 T1BU 6 V BB1 19 V BB2 R2 390Ω R3 270Ω Q1 IRF9Z34 R4 390Ω Q2 IRF9Z34 T1AU 22 T2BU 20 T2AU 21 T2AL 23 T2BL Logic +5 V C1 Logic Phase 1 + 4700 pF 15 Phase 2 14 17 Dis 2 V R2 16 18 24 C2 SGND 2 Pwr GND 2 R5 390Ω Q3 IRFZ34 R7 390Ω Q4 IRFZ34 R6 270Ω R8 270Ω R8 1kΩ PHASE CH 2 DISABLE CH 2 1000pF Rs 0.11Ω REFERENCE VOLTAGE CH 2 Figure 5. Typical 5 A stepper motor driver application with PBL 3776/1. One channel shown. 5 PBL 3776/1 For accurate current regulation, the sensing resistor should be a 0.5 - 1.5 W precision resistor, i. e. less than 1% tolerance and low temperature coefficient. Recirculating diodes Care must be taken to assure that the recirculating current from the motor winding has a free path at all times, when designing the external H-bridge otherwise may the voltage reach dangerous levels at the outputs. See figure 6. Make sure that there are recirculating diodes included in the transistors, or if not design in external diodes. Also make sure that these diodes are sufficient for the application i.e. regarding recovery time, voltage drop etc. Current sense filtering At turn-on a current transient occurs, due to the recovery of the recirculation diodes and the capacitance of the motor winding. To prevent this transient from reseting the flip-flops through the current sensing comparators, the clock oscillator generates a blanking pulse at turn-on. The blanking pulse disables the comparators for a short time. Thereby preventing any voltage transient across the sensing resistor from reseting the flip-flop during the time blanking. Vmm 1 2 Select the blanking pulse time to be longer than the duration of the switching transients by selecting a proper CT value. The time is calculated as: tb = 210 • CT [s] As the CT value may vary from approximately 2 200 pF to 33 000 pF, a blanking time ranging from 0.5 µs to 7 µs is possible. Nominal value is 4 700 pF, which gives a blanking time of 1.0 µs. As the filtering action introduces a small delay, the peak value across the sensing resistor, and hence the peak motor current, will reach a slightly higher level than what is defined by the reference voltage. The filtering delay also limits the minimum possible output current. As the output will be on for a short time each cycle, equal to the digital filtering blanking time plus additional internal delays, a small amount of current will flow through the winding. Typically this current is 1-10 % of the maximum output current set by RS. When optimizing low current performance, the filtering may be done by adding an external low pass filter in series with the comparator C input, see figure 5. In this case the digital blanking time should be as short as possible. The recommended filter component values are 1 kohm and 1000 pF. The transient may be reduced by adding external recircula-ting diodes. These diodes should be of the fast switching type. By doing this the filter delay will be minimized. Lowering the switching frequency also helps reduce the minimum output current. It is recommended to add the resistor R8 in the feedback loop in order to prevent the switching transient from damaging the C inputs. See figure 5. 3 Disable 0 Rs 0 Motor Current Phase 1 2 Fast Current Decay 3 1 TxBU = 1 TxBL = x TxAU = x TxAU = 0 TxBU = x TxBL = 0 TxAU = 1 TxAU = x Time Slow Current Decay Figure 6. Output stage with current paths during turn-on, turn-off and phase shift. 6 Figure 7. Truth table. 1 To create an absolute zero current, the Dis input should be HIGH. Switching frequency The frequency of the clock oscillator is set by the timing components RT and CT at the RC-pin. Since CT sets the digital filter blanking time, the clock oscillator frequency is adjusted by RT. The value of RT is limited to 2 - 20 kohm. The frequency is approximately calculated as: fs = 1 / ( 0.77 • RT • CT) Nominal component values of 12 kohm and 4 700 pF results in a clock frequency of 23.0 kHz. A lower frequency will result in higher current ripple, but may improve low level linearity. A higher clock frequency reduces current ripple, but increases the switching losses in the IC and possibly the iron losses in the motor. Phase inputs A logic HIGH on a Phase input causes the TxBL pin to sink current, low voltage, and the TxAU pin to source current, high voltage. A logic LOW causes the TxAL to sink current, low voltage, and the TxBU to source current, high voltage. A time delay prevents cross conduction in the H-bridge when changing the Phase input. See truth table fig. 7. Dis (Disable) inputs A logic HIGH on the Dis inputs will turn off all four transistors of the outputs, which results in a rapidly decreasing output current to zero. See truth table fig 7. VR (Reference) inputs The Vref inputs of the PBL 3776/1 have a voltage divider with a ratio of 1 to 10 to reduce the external reference voltage to an adequate level. The divider consists of closely matched resistors . Nominal input reference voltage is 5 V. Interference All four off All four off Due to the switching operation of PBL 3776/1, noise and transients are generated and coupled into adjacent circuitry. To reduce potential interference there are a few basic rules to follow: • Use separate ground leads for power ground (the ground connection of RS), the ground leads of PBL 3776/1, and the ground of external analog and digital circuitry. The grounds should be PBL 3776/1 connected together close to the main filtering capacitor at the power supply. • Decouple the supply voltages close to the PBL 3776/1 circuit. Use a ceramic capacitor in parallel with an electrolytic type for both VCC and VBB. Route the power supply lines close together. • Do not place sensitive circuits close to the driver. Avoid physical current loops, and place the driver close to both the motor and the power supply connector. The motor leads could preferably be twisted or shielded. half step or modes with better resolution an external sequence generator must be used. See the testboard manual for TB 313i testboard for more information. If the required stepping rate is high or if low cost is more important than low noise use full step mode. Motor selection 3. Decrease the current, by decreasing the Vref voltage, until the motor phases out, then raise the current with the The PBL 3776/1 is designed for twophase bipolar stepper motors, i.e. motors that have only one winding per phase. The chopping principle of the PBL 3776/1 is based on a constant frequency and a varying duty cycle. This scheme imposes certain restrictions on motor selection. Unstable chopping can occur if the chopping duty cycle exceeds approximately 50%. See figure 3 for definitions. To avoid this, it is necessary to select a motor with a low winding resistance and inductance, i.e. windings with fewer turns. It is not possible to use a motor that is rated for the same voltage as the actual supply voltage. Only rated current needs to be considered. Typical motors to be used together with the PBL 3776/1 in a high current application, have a voltage rating of 0.5 to 6 V, while the supply voltage usually ranges from 12 to 40 V. Low inductance, especially in combination with a high supply voltage, enables high stepping rates. However, to give the same torque capability at low speed, the reduced number of turns in the winding in the low resistive, low inductive motor must be compensated To achieve the best utilization of the motor driver combination it is important to find the correct operation conditions in terms of motor voltage, winding current and stepping mode to fit the motor type and the motor winding. To find the correct operation conditions for a certain application the following procedure can be used. 1. If low noise and low resonance’s or high resolution is required, use half step or even better modified half step, quarter step, etc. In order to implement modified 2. Set the motor supply voltage and the winding currents to their maximum values (limited by the motor or the driver). Run the motor in the application at the lowest frequency with maximum load. VCE Sat (V) 0.6 0.4 0.2 0 0 0.20 0.40 I M (A) selected torque margin, 25 to 50% as a guideline. This sets a first approximation of the suitable current level. 4. Run the motor at the highest frequency with maximum load. Decrease the motor voltage until the motor phases out. Increase the motor voltage with 15 to 30% as a guideline to find a first estimation of the required motor voltage. To get an even better estimation continue to adjust the current in the low frequency range and the voltage in the high frequency range. This is a very simplified method for finding the correct operating conditions for the motor but it will be helpful in most cases. If the motor fails to run in the high frequency range at maximum voltage a motor with lower winding resistance should be selected. If the problems occur in the low frequency range a larger motor or a gearbox will have to be used. by a higher current. A compromise has to be made. Select a motor with the lowest possible winding resistance and inductance, that still gives the required torque, and use as high supply voltage as possible, without exceeding the maximum recommended 40 V. Check that the chopping duty cycle does not exceed 50% at maximum current. Thermal shutdown Figure 8. Typical lower transistor saturation voltage vs. output current. VCE Sat (V) 1.2 The circuit is equipped with a thermal shutdown function that turns the outputs off at a chip (junction) temperature above 160°C. Normal operation is resumed when the temperature has decreased about 20°C. Programming 1.0 0.8 0.6 0.4 0.2 0 0 0.20 0.40 I M (A) Figure 9. Typical upper transistor saturation voltage vs. output current. Figure 10 shows the different input and output sequences for full-step, half-step and modified halfstep operations. Full-step mode. Both windings are energized at all the time with the same current, IM1 = IM2. To make the motor take one step, the current direction (and the magnetic field direction) in one phase is reversed. The next step is then taken when the other phase current reverses. The current changes go through a sequence of four different states which equal four full steps until the initial state is reached again. Half-step mode. In the half-step mode, the current in one winding is brought to zero before a complete current reversal 7 PBL 3776/1 Phase 1 Dis 1 Phase 2 Dis 2 V R1 140% 100% V R2 140% 100% I MA1 140% 100% –100% –140% I MA2 140% 100% –100% –140% Full step mode Half step mode Figure 10. Stepping modes. for more information on implementing modified half step. Ordering Information Package Plastic DIP Tube Part No. PBL 3776/1NS Information given in this data sheet is believed to be accurate and reliable. However no responsibility is assumed for the consequences of its use nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Ericsson Components. These products are sold only according to Ericsson Components' general conditions of sale, unless otherwise confirmed in writing. Specifications subject to change without notice. 1522-PBL 3776/1 Uen Rev. D © Ericsson Components AB 1999 Ericsson Components AB SE-164 81 Kista-Stockholm, Sweden Telephone: +46 8 757 50 00 8 Modified half step mode is made. The motor will then have taken two half steps equalling one full step in rotary movement. The cycle is repeated, but on the other phase. A total of eight states are sequenced until the initial state is reached again. Half-step mode can overcome potential resonance problems. Resonances appear as a sudden loss of torque at one or more distinct stepping rates and must be avoided so as not to loose control of the motor´s shaft position. One disadvantage with the half-step mode is the reduced torque in the half step positions, in which current flows through one winding only. The torque in this position is approximately 70 % of the full step position torque. Modified half-step mode.The torque variations in half step mode will be eliminated if the current is increased about 1.4 times in the halfstep position. A constant torque will further reduce resonances and mechanical noise, resulting in better performance, life expectancy and reliability of the mechanical system. Modifying the current levels must be done by bringing the reference voltage up (or down) from its nominal value correspondingly. This can be done by using DACs or simple resistor divider networks. See SMD and application handbook