FUJITSU MB86342B

FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-26903-3E
ASSP
CMOS
Dolby Digital (AC-3) Decoder LSI
MB86342B
■ DESCRIPTION
Dolby Digital (AC-3) is a perceptual digital audio coding technique of unprecedented efficiency, quality and
versatility.
Fujitsu has developed Dolby Digital (AC-3) 5.1-ch full decodable LSI.
This LSI is certificated as “ Dolby Digital (AC-3) Decoder LSI ” by Dolby Laboratories Licensing Corporation.
■ FEATURES
• Dolby Digital (AC-3) 5.1ch Full Decode
– All bit-rate and All sampling frequency
– Down Mix
– Dialog Normalization
– Dynamic-range Compression
– Noise sequencer (Test tone)
– Each channel can be independently set
– Output Bass Management (config-1, 2, 3)
• Dolby Pro Logic Decode
• Dolby Digital (AC-3) + Dolby Pro Logic Decode
• 16/18/20bit Audio Data Input/Output
(Continued)
■ PACKAGE
100-pin Plastic QFP
(FPT-100P-M06)
Note: Dolby, AC-3, Pro Logic and double-D are trademarks of Dolby Laboratories Licensing Corporation.
MB86342B
(Continued)
• Operat with only audio system clock (384fs) by built-in PLL
• Correct with ADC,DAC,DIR and DIT with type audio I/F three lines
• Control by Host I/F
• 3.0V to 3.6V operation
• QFP-100 pin package
■ PIN ASSIGNMENT
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
D09
V SS
V DD
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
A00
A01
V SS
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
V SS
V DD
A12
A13
(Top view)
81
50
A14
D07
82
49
A15
V DD
83
48
WE
V SS
84
47
CS
D06
85
46
MOD
D05
86
45
BST
D04
87
44
HDOUT
D03
88
43
HDIN
D02
89
42
HCS
V SS
90
41
HCLK
D01
91
40
V SS
D00
92
39
GP0
ICCLK
93
38
GP1
ICBRK
94
37
GP2
ICD1
95
36
GP3
ICD0
96
35
GP4
ICS2
97
34
V SS
ICS1
98
33
V DD
ICS0
99
32
GP5
V SS
100
31
GP6
XRST
EXTIN
V DD
V SS
MCLK1
MCLK2
KFSIO
SCKO
PM
PSTOP
EXLOCK
MS
FS1
FS2
V SS
SYNC
LRCKI1
BCKI1
SDI1
LRCKI2
BCKI2
SDI2
LRCKO
BCKO
SDO1
SDO2
SDO3
V DD
V SS
GP7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
D08
(FPT-100P- M06)
2
MB86342B
■ PIN DESCRIPTION
Pin No.
Pin name
I/O
Function
5
MCLK1
I
6
MCLK2
I/O
Clock input/output
1
XRST
I
Reset signal input
8
SCKO
O
System clock output
12
MS
I
Master/Slave select input
L: Master (X’tal) H:Slave (external clock)
16
SYNC
I
Synchronous/Asynchronous select input
2
EXTIN
I
System clock input (384fs)
FS1, FS2
I
Sampling frequency switching signal input
13, 14
7
KFSIO
9
Clock input
I/O
Audio input/output clock (384fs)
PM
I
Test pin (usually clipped to GND)
10
PSTOP
I
PLL and crystal oscillator control signal
11
EXLOCK
I
Lock signal input of EXTIN
41
HCLK
I
Clock input for serial input-data of host interface
43
HDIN
I
Serial data input of host interface
44
HDOUT
O
Serial data output of host interface
42
HCS
I
Chip-select signal input of host interface
45
BST
I
Usually clipped to GND
30 to 32, 35 to 39
GP0 to GP7
I/O
Input/output of 8-bit general port data
17
LRCKI1
I/O
Sampling clock input/output for audio interface serial data
18
BCKI1
I/O
Bit clock input/output for audio interface serial data
20
LRCKI2
I
Sampling clock input for audio interface serial data
21
BCKI2
I
Bit clock input for audio interface serial data
SD1, SD2
I
Serial data input of audio interface
23
LRCKO
O
Sampling clock output for audio interface serial data
24
BCKO
O
Bit clock output for audio interface serial data
SDO1 to SDO3
O
Serial data output of audio interface
46
MOD
I
Bus-mode control signal input
47
CS
O
Chip-select signal output for external SRAM interface
48
WE
O
Write enable signal output for external SRAM interface
O
Address data output of external SRAM interface
D00 to D19
I/O
Data input/output of external SRAM interface
93
ICCLK
O
Clock output for emulator
94
ICBRK
I
External break control signal input for emulator
ICD0, ICD1
I/O
Input/output signal for data/address of emulator
ICS0 to ICS2
O
Status signal output for emulator
19, 22
25 to 27
49 to 52, 55 to 64, 66, 67 A00 to A15
68 to 77,80 to 82
85 to 89, 91, 92
95, 96
97 to 99
3
MB86342B
■ BLOCK DIAGRAM
B-bus
A-bus
P-bus
MCLK1
XRST
MS
CLKGM
KFSIO
PSTOP
MCORE
SYNC
ADIF
SCKO
EXTLN
PM
FS2,FS1
EXLOCK
LRCKI2,LRCKI1
BCKI2,BCKI1
SDI2,SDI1
LRCKO
BCKO
SDO3 to 0
HCLK
HISF
MCLK2
HDOUT
HDIN
HCS
BST
GP
MEM
GP7 to 0
MOD
EXMIF
WE
CS
A15 to 00
D19 to 00
ICBRK
EMUIF
LOG
4
ICS2 to 0
ICCLK
ICD1,ICD0
MB86342B
■ FUNCTION OF EACH BLOCK
MCORE : MUCAP Core
MUCAP Core is a 20-bit fixed point DSP core. This core operates MOVE, BRANCH,
INTERRUPT, ADDRESSING and ARITHMETIC operations.
CLKGM : Clock Generation Module
This module generates internal and external clock. two type of clocks are generated external
clocks and clock from external crystal oscillator.
ADIF
: Audio Interface Module
This module is an interface of input/output serial audio data to external.
• 2-channels of input port, and 3-channel of output port.
• 2-audio data input registers and 6-output registers ( 20-bit ).
HSTIF
: Host Interface Module
This module transfers asynchronous serial data to host CPU, which has input data register and
output data register(20-bit).
GP
: General Port Module
This module has a 8-bit direction register and 8-bit data register. Each port is independent as
a 1pin input/output general port(total 8pins).
EXMIF
: External Memory Interface Module
This module reads and writes data to external memory(SRAM), which has 3-byte data read/
write mode and 1word(20bit) data read/write mode.
This module uses in-service-register in order to read and write 3-byte data.
EMUIF
: Emulator Interface Module
This module is used for in circuit emulation.
LOG
: LOG Module
This module has registers to refer to table data for the operation of logarithmic functions.
MEM
: Memory Module
This module restores data and programs.
5
MB86342B
■ ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Condition
Rating
Unit
Vss–0.5 to +4.0
V
Power supply voltage
VDD
Input voltage
VIN
—
Vss–0.5 to VDD+0.5
V
Output voltage
VOUT
—
Vss–0.5 to VDD+0.5
V
Output current
IOUT
±14
mA
Storage temperature
Tstg
–40 to +125
°C
Vss = 0V
IOL = 4.0mA
IOL = 8.0mA
—
Overshoot
—
50ns (Max.)
VDD+1.0
V
Undershoot
—
50ns (Max.)
VDD+1.0
V
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings..
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Value
Min.
Typ.
Max.
Unit
Power supply voltage
VDD
3.00
3.30
3.60
V
“H”-level input voltage
VIH
VDD × 0.7
—
VDD
V
“L”-level input voltage
VIL
VSS
—
VDD × 0.2
V
Operating temperature
Ta
0
—
+70
°C
WARNING: Recommended operating conditions are normal operating ranges for the semiconductor device. All
the device’s electrical characteristics are warranted when operated within these ranges.
Always use semiconductor devices within the recommended operating conditions. Operation outside
these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representative beforehand.
■ ELECTRICAL CHARACTERISTICS
1. Input/Output Pin Capacitance
Parameter
Input pin
6
Symbol
(Ta = +25°C, frequency = 1MHz)
Requirements
Unit
CIN
Max.16
Output pin
IOL = 4mA 8mA
COUT
Max.16
I/O pin
IOL = 4mA 8mA
CI/O
Max.16
pF
MB86342B
2. DC Characteristics
Parameter
Power supply current
Symbol
Condition
( VDD = 3.0 to 3.6V, Vss = 0V, Ta = 0 to +70°C)
Value
Unit
Min.
Typ.
Max.
IDDS
Standby mode *1
—
—
100
µA
IDD
Operating mode
—
160
240
mA
“H”-level input voltage
VIH
—
VDD × 0.7
—
VDD
V
“L”-level input voltage
VIL
—
Vss
—
VSS × 0.2
V
“H”-level output voltage
VOH
VDD–0.5
—
VDD
V
“L”-level output voltage
VOL
VSS
—
0.4
V
Input leakage current *2
(Tri-state pin Input)
ILI
–10
—
10
ILZ
–10
—
10
Pull up/down resistance
RP
10
25
50
IOH = –4mA
IOH = –8mA
IOL = 4mA
IOL = 8mA
VI = 0–VDD
—
Type/condition
Output short-circuit current
IO*3
VO = VDD
VO = 0V
Normal/IOL = 4mA
+40
–40
Normal/IOL = 8mA
+80
–80
µA
kΩ
mA
*1: VIH = VDD, VIL = VSS The memory is in the standby mode.
*2: If an Input buffer with pull-up/-down resistor is used, the input leakage current may exceed the above value.
*3: Maximum supply current at the short circuit of output VDD or VSS. For 1 second per LSI pin.
7
MB86342B
3. AC Characteristics
(1) EXTIN, SCKO, XRST
EXTIN
KFSIO(lnput)
(2)
(3)
(1) Tcyc
(5)
(6)
(7)
XRST
(4)
SCKO
KFSIO(Output)
Note: Dotied line represents:
0.7 V DD
0.2 V DD
No.
Characteristics
(1)
EXTIN cycle
—
Tcyc
—
ns
(2)
EXTIN “H” pulse width
0.4×Tcyc
—
—
ns
(3)
EXTIN “L” pulse width
0.4×Tcyc
—
—
ns
(4)
SCKO delay time
—
—
11
ns
(5)
XRST setup time
6
—
—
ns
(6)
XRST hold time
3
—
—
ns
(7)
XRST “L” pulse width
*
—
—
ns
(8)
PLL lock-up time
100
—
—
µs
* : EXTIN frequency
EXTIN
frequency
Tcyc(ns)
(MHz)
18.432
8
( VDD = 3.0 to 3.6V, VSS = 0V, Ta = 0 to +70°C)
Min.
Typ.
Max.
Unit
54.253
Clock mode
Fast mode
Slow mode
Sampling
frequency
48
16.9344
59.0514
—
44.1
12.288
81.380
—
32
PLL
select
CORE
master Clock
(MHz)
XRST “L” pulse
width(ns)
16/3
98.304
9/8Tcyc=61.035
110.592
1Tcyc=54.253
101.6064
1Tcyc=59.0514
98.304
3/4Tcyc=61.035
6
8
MB86342B
(2) Crystal Oscillator
1 kΩ
X'tal
C1
C2
9
MB86342B
(3) GP0 to 7, D08 to 19, MS, SYSNC, FS1, FS2, PM, PSTOP
EXTIN
(1)
GP7 to GP0
(lnput)
Valid
(2)
GP7 to GP0
(Output)
Valid
(4)
(3)
Valid
D19 to D08
(5)
MS
SYNC
FS1, FS2
PM
PSTOP
BST
MOD
EXLOCK
No.
10
Valid
Characteristics
( VDD = 3.0 to 3.6V, VSS = 0V, Ta = 0 to +70°C)
Min.
Typ.
Max.
Unit
(1)
GP0 to 7 setup time
6
—
—
ns
(2)
GP0 to 7 delay time
—
—
17
ns
(3)
D08 to 19 delay time
—
—
17
ns
(4)
D08 to 19 hold time
2
—
—
ns
(5)
Setup time
4
—
—
ns
MB86342B
(4) HCS, HCLK, HDIN, HDOUT
HCS
(3)
(1)
(2)
HCLK
(5)
(4)
(6)
HDIN
(7)
Valid
(8)
Valid
HDOUT
No.
(9)
Characteristics
( VDD = 3.0 to 3.6V, VSS = 0V, Ta = 0 to +70°C)
Min.
Typ.
Max.
Unit
(1)
HCS clock active setup time
16
—
—
ns
(2)
HCS clock active hold time
16
—
—
ns
(3)
HCLK pulse cycle
36
—
—
ns
(4)
HCLK “H” pulse width
16
—
—
ns
(5)
HCLK ”L” pulse width
16
—
—
ns
(6)
HDIN setup time
4
—
—
ns
(7)
HDIN hold time
6
—
—
ns
(8)
HDOUT delay time
—
—
10
ns
(9)
HDOUT hold time
1
—
—
ns
11
MB86342B
(5) LRCKI1, LRCKI2, BCKI2, SDI1, SDI2 (Input Mode)
(1)
Tbck
BCKI1, BCKI2
(lnput)
(2)
(3)
LRCKI1, LRCKI2
(lnput)
(5)
(4)
Vallid
SDI1, SDI2
No.
Characteristics
(1)
BCKI1,BCKI2 cycle (Tbck)
—
*
—
ns
(2)
LRCKI1,LRCKI2 setup time
—
—
1/4 Tbck
ns
(3)
LRCKI1,LRCKI2 hold time
—
—
1/4 Tbck
ns
(4)
SDI1,SDI2 setup time
3
—
—
ns
(5)
SDI1,SDI2 hold time
6
—
—
ns
* : BCKI1, BCKI2 frequency
BCKI1, BCKI2
Tbck (ns)
12
( VDD = 3.0 to 3.6V, VSS = 0V, Ta = 0 to +70°C)
Min.
Typ.
Max.
Unit
Audio mode
setting
651.036
32fs
325.518
64fs
708.6168
32fs
354.3084
64fs
976.560
32fs
488.280
64fs
EXTIN
(MHz)
18.432
16.9344
12.288
MB86342B
(6) LRCKI1, BCKI1, LRCKO, BCKO, SDO1 to 3 (Output Mode)
EXTIN
(2)
(1)
BCKI1(Outpput)
BCKO
(4)
(3)
LRCKI1(Output)
LRCKO
(6)
(5)
Vallid
SDOI toSDO3
No.
Characteristics
( VDD = 3.0 to 3.6V, VSS = 0V, Ta = 0 to +70°C)
Min.
Typ.
Max.
Unit
(1)
BCKI1, BCKO fall delay time
—
—
11
ns
(2)
BCKI1, BCKO rise delay time
—
—
11
ns
(3)
LRCKI1, LRCKO fall delay time
—
—
5
ns
(4)
LRCKI1, LRCKO rise delay time
—
—
5
ns
(5)
SDO1 to 3 delay time
—
—
7
ns
(6)
SDO1 to 3 hold time
0.5
—
—
ns
13
MB86342B
(7) CS, WE, A00 to 15, D00 to 07 (Data Write)
EXTIN
(2)
(1)
CS
(3)
(5)
WE
(6)
(7)
(8)
(4)
Valid
A15 to A00
(9)
(10)
Valid
D07 to D00
No.
14
Characteristics
( VDD = 3.0 to 3.6V, VSS = 0V, Ta = 0 to +70°C)
Min.
Typ.
Max.
Unit
(1)
CS delay time
—
—
20
ns
(2)
CS hold time
2
—
—
ns
(3)
WE delay time
—
—
22
ns
(4)
WE “H” pulse width
8
—
—
ns
(5)
WE hold time
2
—
—
ns
(6)
WE setup time
0.7
—
—
ns
(7)
A00 to 15 delay time
—
—
20
ns
(8)
A00 to 15 hold time
2
—
—
ns
(9)
D00 to 07 delay time
—
—
22
ns
(10)
D00 to 07 hold time
2
—
5
ns
MB86342B
(8) CS, WE, A00 to 15, D00 to 07 (Data Read)
EXTIN
(2)
(1)
CS
WE
(4)
(3)
Valid
A15 to A00
(5)
D07 to D00
No.
(6)
Valid
Characteristics
( VDD = 3.0 to 3.6V, VSS = 0V, Ta = 0 to +70°C)
Min.
Typ.
Max.
Unit
(1)
CS delay time
—
—
20
ns
(2)
CS hold time
2
—
—
ns
(3)
A00 to 15 delay time
—
—
22
ns
(4)
A00 to 15 hold time
3
—
—
ns
(5)
D00 to 07 setup time
3
—
—
ns
(6)
D00 to 07 hold time
7
—
—
ns
15
MB86342B
■ SYSTEM CONSTRUCTION
1. Dolby Digital Decoder (5.1 ch)
SRAM(Delay)
D07 to 00 CS
Digital-in
Dolby Digital
Bit-stream
LRCK
BCK
DOUT
FSOUT
CLK
WE
A15 to 00
BCKO
LRCKO
SDO1
LRCKI2
BCK
SDI2
FS1 to 2
SDO2
KFSIO
SDO3
KFSIO
BCK
LRCK
DIN
MCK
BCK
LRCK
DIN
MCK
AOUT
L
AOUT
R
AOUT
LS
AOUT
RS
AOUT
C
AOUT
LFE
MB86342B
MB86342
DIR
HCS
HCLK
HDIN
HDOUT
BCK
LRCK
DIN
MCK
Host CPU
2. Dolby Pro Logic Decoder (4 ch)
SRAM(Delay)
D07 to 00 CS
Digital-in
Dolby Digital
Bit-stream
LRCK
BCK
DOUT
FSOUT
CLK
WE
A15 to 00
BCKO
LRCKO
SDO1
LRCKI2
BCKI2
SDI2
FS1 to 2
SDO2
KFSIO
SDO3
KFSIO
ADC
BCK
LRCK
DIN
MCK
AOUT
L
AOUT
R
AOUT
SR
AOUT
SR
AOUT
C
MB86342B
HCS
HCLK
HDIN
Host CPU
16
BCK
LRCK
DIN
MCK
HDOUT
BCK
LRCK
DIN
MCK
AOUT
MB86342B
3. Dolby Digital + Dolby Pro Logic Decoder
SRAM(Delay)
D07 to 00 CS
Digital-in
Dolby surround
Bit-stream
LRCK
BCK
DOUT
FSOUT
CLK
WE
A15 to 00
BCKO
LRCKO
SDO1
LRCKI2
BCK
SDI2
FS1~2
SDO2
KFSIO
SDO3
KFSIO
DIR
BCK
LRCK
DIN
MCK
BCK
LRCK
DIN
MCK
AOUT
L
AOUT
R
AOUT
SR
AOUT
SR
AOUT
C
MB86342B
MB86342
HCS
HCLK
HDIN
HDOUT
BCK
LRCK
DIN
MCK
AOUT
Host CPU
17
MB86342B
■ PACKAGE DIMENSION
100-pin Plastic QFP
(FPT-100P-M06)
23.90±0.40(.941±.016)
80
3.35(.132)MAX
20.00±0.20(.787±.008)
0.05(.002)MIN
(STAND OFF)
51
81
50
14.00±0.20
(.551±.008)
17.90±0.40
(.705±.016)
12.35(.486)
REF
16.30±0.40
(.642±.016)
INDEX
31
100
"A"
LEAD No.
1
30
0.65(.0256)TYP
0.30±0.10
(.012±.004)
0.13(.005)
0.15±0.05(.006±.002)
M
Details of "A" part
0.25(.010)
Details of "B" part
"B"
0.10(.004)
18.85(.742)REF
22.30±0.40(.878±.016)
C
0.30(.012)
0.18(.007)MAX
0.53(.021)MAX
0 10°
0.80±0.20
(.031±.008)
1994 FUJITSU LIMITED F100008-3C-2
Dimensions in mm (inch).
18
MB86342B
FUJITSU LIMITED
For further information please contact:
Japan
FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
KAWASAKI PLANT, 4-1-1, Kamikodanaka
Nakahara-ku, Kawasaki-shi
Kanagawa 211-8588, Japan
Tel: (044) 754-3763
Fax: (044) 754-3329
http://www.fujitsu.co.jp/
North and South America
FUJITSU MICROELECTRONICS, INC.
Semiconductor Division
3545 North First Street
San Jose, CA 95134-1804, USA
Tel: (408) 922-9000
Fax: (408) 922-9179
Customer Response Center
Mon. - Fri.: 7 am - 5 pm (PST)
Tel: (800) 866-8608
Fax: (408) 922-9179
http://www.fujitsumicro.com/
Europe
FUJITSU MIKROELEKTRONIK GmbH
Am Siebenstein 6-10
D-63303 Dreieich-Buchschlag
Germany
Tel: (06103) 690-0
Fax: (06103) 690-122
http://www.fujitsu-ede.com/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE LTD
#05-08, 151 Lorong Chuan
New Tech Park
Singapore 556741
Tel: (65) 281-0770
Fax: (65) 281-0220
http://www.fmap.com.sg/
F9802
 FUJITSU LIMITED Printed in Japan
20
All Rights Reserved.
The contents of this document are subject to change without
notice. Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document presented
as examples of semiconductor device applications, and are not
intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the
use of this information or circuit diagrams.
FUJITSU semiconductor devices are intended for use in
standard applications (computers, office automation and other
office equipment, industrial, communications, and measurement
equipment, personal or household devices, etc.).
CAUTION:
Customers considering the use of our products in special
applications where failure or abnormal operation may directly
affect human lives or cause physical injury or property damage,
or where extremely high levels of reliability are demanded (such
as aerospace systems, atomic energy controls, sea floor
repeaters, vehicle operating controls, medical devices for life
support, etc.) are requested to consult with FUJITSU sales
representatives before such use. The company will not be
responsible for damages arising from such use without prior
approval.
Any semiconductor devices have inherently a certain rate of
failure. You must protect against injury, damage or loss from
such failures by incorporating safety design measures into your
facility and equipment such as redundancy, fire protection, and
prevention of over-current levels and other abnormal operating
conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Control Law of Japan, the
prior authorization by Japanese government should be required
for export of those products from Japan.