SN65ELT21 www.ti.com....................................................................................................................................................................................................... SLLS923 – JUNE 2009 5-V PECL-to-TTL Translator FEATURES 1 • • • • • • 3ns (TYP) Propagation Delay Operating Range: VCC = 4.2 V to 5.7 V with GND = 0 V 24-mA TTL Output Deterministic Output Value for Open Input Conditions or When Inputs < 1.3 V Built-In Temperature Compensation Drop-In Compatible to the MC10ELT21, MC100ELT21 PIN ASSIGNMENT D or DGK PACKAGE (TOP VIEW) APPLICATIONS • • Data and Clock Transmission Over Backplane Signaling Level Conversion for Clock or Data NC 1 8 VCC D 2 7 Q D 3 6 NC VBB 4 5 GND DESCRIPTION The SN65ELT21 is a differential PECL-to-TTL translator. It operates on +5-V supply and ground only. The device includes circuitry to maintain Q to a low logic level when inputs are in an open condition or < 1.3 V. The VBB pin is a reference voltage output for the device. When the device is used in single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01µF decoupling capacitor between VCC and VBB. Also limit the sink/source current to < 0.5 mA to VBB. Leave VBB open when it is not used. Table 1. Pin Descriptions PIN FUNCTION D, D PECL data inputs Q TTL output VCC Positive supply VEE Negative supply VBB Reference voltage output The SN65ELT21 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package. ORDERING INFORMATION (1) (2) (1) (2) PART NUMBER PART MARKING PACKAGE LEAD FINISH SN65ELT21D ELT21 SOIC NiPdAu SN65ELT21DGK SIII SOIC-TSSOP NiPdAu For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Leaded device options are not initially available; contact a sales representative for further details. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009, Texas Instruments Incorporated SN65ELT21 SLLS923 – JUNE 2009....................................................................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) PARAMETER CONDITIONS Absolute PECL mode supply voltage VALUE VCC (GND = 0 V) Sink/source current, VBB GND = 0 V, VI ≤ VCC PECL input voltage UNIT 6 V ±0.5 mA 6 V Operating temperature range –40 to 85 °C Storage temperature range –65 to 150 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATINGS PACKAGE CIRCUIT BOARD MODEL POWER RATING TA < 25°C (mW) THERMAL RESISTANCE, JUNCTION-TO-AMBIENT NO AIRFLOW DERATING FACTOR TA > 25°C (mW/°C) POWER RATING TA = 85°C (mW) SOIC SOIC-TSSOP Low-K 719 139 7 288 High-K 840 119 8 336 Low-K 469 213 5 188 High-K 527 189 5 211 THERMAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER θJB Junction-to-board thermal resistance SOIC SOIC-TSSOP θJC Junction-to-case thermal resistance MIN TYP MAX 79 UNIT °C/W 120 SOIC 98 SOIC-TSSOP 74 °C/W KEY ATTRIBUTES CHARACTERISTICS VALUE Internal input pull-down resistor 50 kΩ Moisture sensitivity level Level 1 Flame ability rating (oxygen index: 28 to 34) Electrostatic discharge UL 94 V-0 at 0.125 in Human body model Charged-device model 2 kV 1.5 kV Meets or exceeds JEDEC Spec EIA/JESD78 latchup test 2 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN65ELT21 SN65ELT21 www.ti.com....................................................................................................................................................................................................... SLLS923 – JUNE 2009 PECL DC CHARACTERISTICS At VCC = 5.0 V, GND = 0.0 V (unless otherwise noted) (1) (2) PARAMETER TEST CONDITIONS TA = –40°C MIN TA = 25°C TYP MAX MIN TA = 85°C TYP MAX MIN TYP MAX UNIT VIH High-level input voltage, single-ended 3835 4120 3835 4120 3835 4120 mV VIL Low-leveI input voltage, single-ended 3190 3525 3190 3525 3190 3525 mV VBB Output reference voltage 3.74 V VIHCMR High-level input voltage, common-mode range, differential 5.0 V IIH High-level input current 150 µA IIL Low-level input current (1) (2) (3) 3.62 See (3) 3.69 2.2 3.74 3.62 5.0 2.2 3.69 150 0.5 3.74 3.62 5.0 2.2 3.69 150 0.5 µA 0.5 The device will meet the specifications after thermal balance has been established when mounted in a socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Input parameters vary 1:1 with VCC. VCC can vary +0.7 V / –0.8 V. VIHCMR(min) varies 1:1 with GND, VIHCMR(max) varies 1:1 with VCC. TTL DC CHARACTERISTICS At VCC = 4.2 V to 5.7 V, TA = –40°C to 85°C (unless otherwise noted) (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ICCH Power supply current 20 mA ICCL Power supply current 20 mA VOH High-level output voltage IOH = –3.0 mA (2) V VOL Low-level output voltage IOL = 24 mA IOS Output short circuit current (1) (2) 2.4 See –150 0.5 V –60 mA The device will meet the specifications after thermal balance has been established when mounted in a socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. VOH(max) level is VCC – 0.7. AC CHARACTERISTICS At VCC = 4.2 V to 5.7 V, GND = 0.0 V (unless otherwise noted) (1) (2) TEST CONDITIONS PARAMETER fMAX Maximum switching frequency At Vol < 0.5V (See Figure 4) tPLH/tPHL Propagation delay times At 1.5 V tJITTER Random clock jitter (RMS) Input swing See tr/tf Output rise/fall times Q (10%–90%) (2) (3) MIN 200 200 TA = 85°C TYP MAX MIN 200 4.5 5 (3) TA = 25°C TYP MAX 2 VPP (1) TA = –40°C MIN 2 20 1000 750 200 4.5 5 200 2 20 1000 780 TYP MAX 5 200 UNIT MHz 4.5 ns 20 ps 1000 mV 910 ps The device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. RL = 500 Ω to GND and CL = 20 pF to GND. See Figure 1. VPP(min) is minimum input swing for which ac parameters are assured. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN65ELT21 3 SN65ELT21 SLLS923 – JUNE 2009....................................................................................................................................................................................................... www.ti.com TTL Output CL Includes Test Fixture Capacitance CL RL AC Test Load GND Figure 1. TTL Output AC Test Loading Condition IN IN 1.5 V 1.5 V OUT tPLH tPHL Figure 2. Output Propagation Delay 90% 10% tr tf Figure 3. Output Rise and Fall Times 4 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN65ELT21 SN65ELT21 www.ti.com....................................................................................................................................................................................................... SLLS923 – JUNE 2009 OUTPUT VOLTAGE vs FREQUENCY 5 VOH 85 Output Voltage - V 4 VOH 25 VOH -40 3 VOL 85 VOL 25 2 VOL -40 1 VCC = 5.0V 0 0 50 100 150 200 250 300 350 400 450 500 Frequency - MHz Figure 4. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN65ELT21 5 PACKAGE OPTION ADDENDUM www.ti.com 2-Jul-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN65ELT21D ACTIVE SOIC D 8 Lead/Ball Finish 75 Green (RoHS & no Sb/Br) CU NIPDAU MSL Peak Temp (3) Level-1-260C-UNLIM SN65ELT21DGK PREVIEW MSOP DGK 8 80 TBD Call TI Call TI SN65ELT21DGKR PREVIEW MSOP DGK 8 2500 TBD Call TI Call TI SN65ELT21DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 7-Aug-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN65ELT21DGKR MSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 SN65ELT21DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 7-Aug-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65ELT21DGKR MSOP DGK 8 2500 346.0 346.0 29.0 SN65ELT21DR SOIC D 8 2500 346.0 346.0 29.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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