HD74HC259 8-bit Addressable Latch Description The HD74HC259 has a single data input (D), 8 latch outputs (Q0-Q7), 3 address inputs (A, B, and C), a common enable input (E), and a common clear input. To operate this device as an addressable latch, data is held on the D input, and the address of the latch into which the data is to be entered is held on the A, B and C inputs. When enable is taken low the data flows through to the addressed output. The data is stored when enable transitions from low to high. All unaddressed latches will remain unaffected. With enable in the high state the device is deselected, and all latches remain in their previous state, unaffected by changes on the data or address inputs. To eliminate the possibility of entering erroneous data into the latches, the enable should be held high (inactive) while the address lines are changing. If enable is held high and clear is taken low all eight latches are cleared to a low state. If enable is low all latches except the addressed latch will be cleared. The addressed latch will instead follow the D input, effectively implementing a 3-to-8 line decoder. Features • • • • • High Speed Operation: tpd (Data to Output) = 16 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Inputs Clear G Output of Addressed Latch Each Other Output Function H L D Qio Addressable latch H H Qio Qio Memory L L D L 8-line demultiplexer L H L L Clear HD74HC259 Select Inputs C B A Latch Addressed L L L 0 L L H 1 L H L 2 L H H 3 H L L 4 H L H 5 H H L 6 H H H 7 Notes: 1. D: the level at the data input 2. Qio: the level of Qi (i = 0, 1, ···7, as apropriate) before the indicated steady-state input conditions were established. Pin Arrangement Latch select A 1 B 2 B C 3 C G 14 Enable Q0 4 Q0 D 13 Q1 5 Q1 Q7 12 Q7 Q2 6 Q2 Q6 11 Q6 Q3 7 Q3 Q5 10 Q5 GND 8 16 VCC A CLR 15 Clear Data input Outputs Outputs Q4 9 Q4 (Top view) 2 HD74HC259 DC Characteristics Ta = –40 to +85°C Ta = 25°C Item Symbol VCC (V) Min Typ Max Min Max Unit Input voltage VIH 2.0 1.5 — — 1.5 — V 4.5 3.15 — — 3.15 — 6.0 4.2 — — 4.2 — 2.0 — — 0.5 — 0.5 4.5 — — 1.35 — 1.35 6.0 — — 1.8 — 1.8 2.0 1.9 2.0 — 1.9 — 4.5 4.4 4.5 — 4.4 — 6.0 5.9 6.0 — 5.9 — 4.5 4.18 — — 4.13 — I OH = –4 mA 6.0 5.68 — — 5.63 — I OH = –5.2 mA 2.0 — 0.0 0.1 — 0.1 4.5 — 0.0 0.1 — 0.1 6.0 — 0.0 0.1 — 0.1 4.5 — — 0.26 — 0.33 I OL = 4 mA 6.0 — — 0.26 — 0.33 I OL = 5.2 mA VIL Output voltage VOH VOL Test Conditions V V V Vin = VIH or VIL I OH = –20 µA Vin = VIH or VIL I OL = 20 µA Input current Iin 6.0 — — ±0.1 — ±1.0 µA Vin = VCC or GND Quiescent supply current I CC 6.0 — — 4.0 40 µA Vin = VCC or GND, Iout = 0 µA — 3 HD74HC259 AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = –40 to +85°C Ta = 25°C VCC (V) Min Typ Max Min Max Unit Test Conditions Propagation delay t PHL 2.0 — — 185 — 230 ns Data to output time 4.5 — 16 37 — 46 6.0 — — 31 — 39 2.0 — — 215 — 270 4.5 — 20 43 — 54 6.0 — — 37 — 46 2.0 — — 200 — 250 4.5 — 17 40 — 50 6.0 — — 34 — 43 2.0 — — 155 — 195 4.5 — 15 31 — 39 6.0 — — 26 — 33 2.0 80 — — 100 — 4.5 16 6 — 20 — 6.0 14 — — 17 — 2.0 100 — — 125 — 4.5 20 5 — 25 — 6.0 17 — — 21 — 2.0 5 — — 5 — 4.5 5 –1 — 5 — 6.0 5 — — 5 — Item Symbol t PLH t PHL Pulse width Setup time Hold time tw t su th Output rise/fall t TLH 2.0 — — 75 — 95 time t THL 4.5 — 5 15 — 19 6.0 — — 13 — 16 — — 5 10 — 10 Input capacitance 4 Cin Latch select to output Enable to output ns Clear to output ns Clear, Enable ns Latch select or data to enable ns Latch select or data to enable ns pF Unit: mm 19.20 20.00 Max 1 7.40 Max 9 6.30 16 8 1.3 0.48 ± 0.10 2.54 Min 5.06 Max 2.54 ± 0.25 0.51 Min 1.11 Max 7.62 + 0.13 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 9 1 8 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0.80 Max *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 5.5 16 0.20 7.80 +– 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DA — Conforms 0.24 g Unit: mm 9.9 10.3 Max 9 1 8 0.635 Max *0.42 ± 0.08 0.40 ± 0.06 0.15 *0.22 ± 0.03 0.20 ± 0.03 1.27 0.11 0.14 +– 0.04 1.75 Max 3.95 16 0.10 6.10 +– 0.30 1.08 0° – 8° 0.67 0.60 +– 0.20 0.25 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DN Conforms Conforms 0.15 g Cautions 1. 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