ETC HD74HCT373/HD74HCT533

HD74HCT373/HD74HCT533
Octal D-type Transparent Latches (with 3-state outputs)/
Octal D-type Transparent Latches (with inverted 3-state outputs)
ADE-205-555 (Z)
1st. Edition
Sep. 2000
Description
When the latch enable input is high, the Q outputs of HD74HCT373 will follow the D inputs and the Q
outputs of HD74HCT533 will follow the inversion of the D inputs. When the latch enable goes low, data at
the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is
applied to the output control input, all outputs go to a high impedance state, regardless of what signals
present at the other inputs and the state of the storage elements.
Features
•
•
•
•
•
•
LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
High Speed Operation: tpd (Data to Q) = 14 ns typ (CL = 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: VCC = 4.5 to 5.5 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Output Control
Enable
G
D
HD74HCT373
Q
HD74HCT533
Q
L
H
H
H
L
L
H
L
L
H
L
L
X
No change
No change
H
X
X
Z
Z
X :
Z :
Irrelevant
Off (high-impedance) state of a 3-state output.
HD74HCT373/HD74HCT533
Pin Arrangement
HD74HCT373
Output
Control 1
20 VCC
1Q
2
19 8Q
1D
3
18 8D
2D
4
17 7D
2Q
5
16 7Q
3Q
6
15 6Q
3D
7
14 6D
4D
8
13 5D
4Q
9
12 5Q
GND 10
11 Enable G
(Top view)
HD74HCT533
Output
Control 1
20 VCC
1Q
2
19 8Q
1D
3
18 8D
2D
4
17 7D
2Q
5
16 7Q
3Q
6
15 6Q
3D
7
14 6D
4D
8
13 5D
4Q
9
12 5Q
GND 10
11 Enable G
(Top view)
2
HD74HCT373/HD74HCT533
Block Diagram
HD74HCT373
2D
1D
3D
6D
7D
D
D
8D
D
GQ
GQ
GQ
GQ
GQ
GQ
5D
D
D
D
D
4D
D
GQ
GQ
Enable G
Output
Control
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
7D
8D
HD74HCT533
2D
1D
3D
GQ
6D
D
D
D
GQ
GQ
GQ
GQ
GQ
5D
D
D
D
D
4D
D
GQ
GQ
Enable G
Output
Control
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
3
HD74HCT373/HD74HCT533
Absolute Maximum Ratings
Item
Symbol
Rating
Unit
Supply voltage range
VCC
–0.5 to +7.0
V
Input voltage
VIN
–0.5 to VCC + 0.5
V
Output voltage
VOUT
–0.5 to VCC + 0.5
V
DC current drain per pin
I OUT
±35
mA
DC current drain per VCC, GND
I CC, I GND
±75
mA
DC input diode current
I IK
±20
mA
DC output diode current
I OK
±20
mA
Power dissipation per package
PT
500
mW
Storage temperature
Tstg
–65 to +150
°C
DC Characteristics
Ta = –40 to
+85°C
Ta = 25°C
Test Conditions
Item
Symbol
Min Typ Max Min
Max
Unit
VCC (V)
Input voltage
VIH
2.0
—
—
—
V
4.5 to
5.5
VIL
—
—
0.8 —
0.8
V
4.5 to
5.5
VOH
4.4
—
—
4.4
—
V
4.5
Vin = VIH or VIL I OH = –20 µA
4.18 —
—
4.13
—
4.5
I OH = –6 mA
—
—
0.1 —
0.1
—
—
0.26 —
0.33
Output voltage
VOL
2.0
V
4.5
Vin = VIH or VIL I OL = 20 µA
4.5
I OL = 6 mA
Off-state output
current
I OZ
—
—
±0.5 —
±5.0
µA
5.5
Vin = VIH or VIL,
Vout = VCC or GND
Input current
Iin
—
—
±0.1 —
±1.0
µA
5.5
Vin = VCC or GND
Quiescent current I CC
—
—
4.0 —
40
µA
5.5
Vin = VCC or GND, Iout = 0 µA
4
HD74HCT373/HD74HCT533
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = –40 to
+85°C
Ta = 25°C
Test Conditions
Min Typ Max Min
Max
Unit
VCC (V)
Propagation delay t PLH
—
13
30
—
38
ns
4.5
time
t PHL
—
16
30
—
38
t PLH
—
14
25
—
31
t PHL
—
12
25
—
31
Output enable
t ZL
—
16
30
—
38
time
t ZH
—
15
30
—
38
Output disable
t LZ
—
14
30
—
38
time
t HZ
—
16
30
—
38
Setup time
t su
20
—
—
25
—
ns
4.5
Data to latch control
Hold time
th
10
—
—
13
—
ns
4.5
Latch control to data
Pulse width
tw
16
—
—
20
—
ns
4.5
Latch control, output control
Output rise/fall
time
t TLH
t THL
—
4
12
—
15
ns
4.5
Input capacitance
Cin
—
5
10
—
10
pF
—
Item
Symbol
Latch control to Q
4.5
ns
4.5
Data to Q
4.5
ns
4.5
4.5
ns
4.5
4.5
5
HD74HCT373/HD74HCT533
Package Dimensions
Unit: mm
24.50
25.40 Max
1
7.00 Max
11
6.30
20
10
1.30
2.54 ± 0.25
0.48 ± 0.10
0.51 Min
1.27 Max
7.62
2.54 Min 5.08 Max
0.89
+ 0.11
0.25 – 0.05
0° – 15°
Hitachi Code
JEDEC
EIAJ
Mass (reference value)
DP-20N
—
Conforms
1.26 g
Unit: mm
12.6
13 Max
11
1
10
1.27
*0.42 ± 0.08
0.40 ± 0.06
0.10 ± 0.10
0.80 Max
*0.22 ± 0.05
0.20 ± 0.04
2.20 Max
5.5
20
0.20
7.80 +– 0.30
1.15
0° – 8°
0.70 ± 0.20
0.15
0.12 M
*Dimension including the plating thickness
Base material dimension
6
Hitachi Code
JEDEC
EIAJ
Mass (reference value)
FP-20DA
—
Conforms
0.31 g
HD74HCT373/HD74HCT533
Unit: mm
12.8
13.2 Max
11
1
10
0.20 ± 0.10
0.935 Max
*0.27 ± 0.05
0.25 ± 0.04
2.65 Max
7.50
20
1.27
*0.42 ± 0.08
0.40 ± 0.06
0.25
10.40 +– 0.40
1.45
0° – 8°
0.57
0.70 +– 0.30
0.15
0.12 M
Hitachi Code
JEDEC
EIAJ
Mass (reference value)
*Dimension including the plating thickness
Base material dimension
FP-20DB
Conforms
—
0.52 g
Unit: mm
6.50
6.80 Max
11
1
10
4.40
20
0.65
*0.22+0.08
–0.07
0.20 ± 0.06
1.0
0.13 M
6.40 ± 0.20
*Dimension including the plating thickness
Base material dimension
0.07 +0.03
–0.04
0.10
*0.17 ± 0.05
0.15 ± 0.04
1.10 Max
0.65 Max
0° – 8°
0.50 ± 0.10
Hitachi Code
JEDEC
EIAJ
Mass (reference value)
TTP-20DA
—
—
0.07 g
7
HD74HCT373/HD74HCT533
Cautions
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copyright, trademark, or other intellectual property rights for information contained in this document.
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intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
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products.
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Copyright  Hitachi, Ltd., 2000. All rights reserved. Printed in Japan.
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