HD74LV4066A Quad. Analog Switches / Quad. Multiplexers ADE-205-285 (Z) 1st Edition April 1999 Description The HD74LV4066A handles both analog and digital signals, and enables signals of either type with amplitudes of up to 5.5 V (peak) to be transmitted in either direction (at VCC = 0 V to 5.5 V). Each switch section has its own enable input control (C). A high-level voltage applied to C turns on the associated switch section. Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. Features • VCC = 2.0 V to 5.5 V operation • All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) Function Table Control Switch L OFF H ON Note: H: High level L: Low level HD74LV4066A Pin Arrangement 14 VCC 1A 1 1B 2 13 1C 2B 3 12 4C 2A 4 11 4A 2C 5 10 4B 3C 6 9 3B GND 7 8 3A (Top view) 2 HD74LV4066A Absolute Maximum Ratings Item Symbol Ratings Unit VCC –0.5 to 7.0 V VI –0.5 to 7.0 V VO –0.5 to VCC + 0.5 V Output: H or L Input clamp current I IK –20 mA VI < 0 Output clamp current I OK ±50 mA VO < 0 or VO > VCC Continuous output current IO ±25 mA VO = 0 to VCC Continuous current through VCC or GND I CC or IGND ±50 mA Maximum power dissipation at Ta = 25°C (in still air)*3 PT 785 mW Supply voltage range Input voltage range* 1 Output voltage range* 1, 2 SOP 500 Storage temperature Tstg Conditions TSSOP –65 to 150 °C Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.. 1. The input and output voltage ratings may be exceeded even if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The maximum package power dissipation was calculated using a junction temperature of 150°C. Recommended Operating Conditions Item Symbol Min 1 Max Unit Conditions Supply voltage range VCC 2.0* 5.5 V Input voltage range VI 0 5.5 V Output voltage range VI/O 0 VCC V Input transition rise or fall rate ∆t/∆v 0 200 ns/V 0 100 VCC = 3.0 to 3.6 V 0 20 VCC = 4.5 to 5.5 V –40 85 Operating free-air temperature Ta VCC = 2.3 to 2.7 V °C Notes: Unused or floating inputs must be held high or low. 1. With the supply voltage at or around 2 V, the analog switch on-state resistance loses linearity significantly. It is recommended that only digital signals be transmitted at these low supply voltages. 3 HD74LV4066A Logic Diagram A C 4 B HD74LV4066A DC Electrical Characteristics Ta = 25°C Ta = –40 to 85°C Item Symbol VCC (V) Min Typ Max Min Max Unit Input voltage VIH 2.0 — — — 1.5 — V 2.3 to 2.7 — — — VCC × 0.7 — 3.0 to 3.6 — — — VCC × 0.7 — 4.5 to 5.5 — — — VCC × 0.7 — 2.0 — — — — 0.5 2.3 to 2.7 — — — — VCC × 0.3 3.0 to 3.6 — — — — VCC × 0.3 4.5 to 5.5 — — — — VCC × 0.3 2.3 — 60 180 — 225 VIL On-state switch resistance RON Ω Test Conditions VIN = VCC or GND VC = VIH IT = 1 mA Peak on resistance RON (P) 3.0 — 50 150 — 190 4.5 — 40 75 — 100 2.3 — 250 500 — 600 Ω VIN = VCC to GND VC = VIH IT = 1 mA Difference of on-state resistance between switches ∆RON 3.0 — 100 180 — 225 4.5 — 50 100 — 125 2.3 — 20 30 — 40 Ω VIN = VCC to GND VC = VIH IT = 1 mA 3.0 — 10 20 — 30 4.5 — 7 15 — 20 Off-state switch leakage current Is (OFF) 5.5 — — ±0.1 — ±1.0 µA VIN = VCC, VOUT = GND or V IN = GND, VO = VCC, VC = VIL On-state switch leakage current Is (ON) 5.5 — — ±0.1 — ±1.0 µA VIN = VCC or GND V C = VIH Input current IIN 0 to 5.5 — — ±0.1 — ±1.0 µA VIN = 5.5 V or GND Quiescent supply current ICC 5.5 — — — — 20 µA VIN = VCC or GND Note: For conditions shown as Min or Max use the appropriate values under recommended operating conditions. 5 HD74LV4066A Switching Characteristics • VCC = 2.5 ± 0.2 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions FROM (Input) TO (Output) Propagation delay time tPLH tPHL — 2.0 10.0 — 16.0 ns CL = 15 pF A or B B or A — 5.0 12.0 — 18.0 — 6.0 15.0 — 20.0 C A or B — 8.0 25.0 — 32.0 — 7.0 15.0 — 23.0 C A or B — 11.0 25.0 — 32.0 Enable time Disable time tZH tZL tHZ tLZ CL = 50 pF ns RL = 1 kΩ CL = 15 pF CL = 50 pF ns RL = 1 kΩ CL = 15 pF CL = 50 pF • VCC = 3.3 ± 0.3 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions FROM (Input) TO (Output) Propagation delay time tPLH tPHL — 1.5 6.0 — 10.0 ns CL = 15 pF A or B B or A — 4.0 9.0 — 12.0 — 4.0 11.0 — 15.0 C A or B — 6.0 18.0 — 22.0 — 5.0 11.0 — 15.0 C A or B — 8.0 18.0 — 22.0 Enable time Disable time 6 tZH tZL tHZ tLZ CL = 50 pF ns RL = 1 kΩ CL = 15 pF CL = 50 pF ns RL = 1 kΩ CL = 15 pF CL = 50 pF HD74LV4066A Switching Characteristics (cont) • VCC = 5.0 ± 0.5 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions FROM (Input) TO (Output) Propagation delay time tPLH tPHL — 1.0 4.0 — 7.0 ns CL = 15 pF A or B B or A — 3.0 6.0 — 8.0 — 3.0 7.0 — 10.0 C A or B — 5.0 12.0 — 16.0 — 4.0 7.0 — 10.0 C A or B — 6.0 12.0 — 16.0 Enable time Disable time tZH tZL tHZ tLZ CL = 50 pF ns RL = 1 kΩ CL = 15 pF CL = 50 pF ns RL = 1 kΩ CL = 15 pF CL = 50 pF 7 HD74LV4066A Switching Characteristics (cont) Ta = 25°C FROM (Input) TO (Output) CL = 50 pF, RL = 600 Ω Adjust f in voltage to obtain 0 dBm at output when fin is 1 MHz (sine wave). Increase fin frequency until the dB-meter reads –3dBm. 20 log (VO/V I) = –3 dBm A or B B or A dB CL = 50 pF, RL = 600 Ω Adjust f in voltage to obtain 0 dBm at input when fin is 1 MHz (sine wave). A or B B or A mV CL = 50 pF, RL = 600 Ω Adjust RL value to obtain 0 A at IIN/OUT when fin is 1 MHz (square wave). C A or B Item Symbol VCC (V) Min Typ Max Unit Control input capacitance CIC — — 3.5 — pF Switch terminal capacitance CI/O — — 6.0 — pF Feedthrough capacitance CT — — 0.5 — pF Power dissipation capacitance CPD — — 4.0 — pF 2.3 — 30.0 — MHz 3.0 — 35.0 — 4.5 — 50.0 — 2.3 — –45.0 — 3.0 — –45.0 — 4.5 — –45.0 — 2.3 — 15.0 — 3.0 — 20.0 — 4.5 — 50.0 — Frequency response (Switch ON) Crosstalk (Between any switches) Crosstalk (Control input to signal output) 8 Test Conditions HD74LV4066A Switching Characteristics (cont) Ta = 25°C Item Feedthrough attenuation (Switch OFF) Sine-wave distortion Symbol FROM (Input) TO (Output) CL = 50 pF, RL = 600 Ω Adjust f in voltage to obtain 0 dBm at input when f in is 1 MHz (sine wave). A or B B or A CL = 50 pF, RL = 10 kΩ fIN = 1 kHz (sine wave) VI = 2 VP-P, VCC = 2.3 V VI = 2.5 VP-P, VCC = 3.0 V VI = 4 VP-P, VCC = 4.5 V A or B B or A VCC (V) Min Typ Max Unit Test Conditions 2.3 — –40.0 — dB 3.0 — –40.0 — 4.5 — –40.0 — 2.3 — 0.1 — % 3.0 — 0.1 — 4.5 — 0.1 — 9 HD74LV4066A Test Circuits RON: On-state switch resistance VCC VC = VIH VCC VIN = VCC or GND VOUT (ON) GND R ON = VIN –VOUT 10 1.0 mA V –3 (Ω) VIN –VOUT Is (OFF): Off-state switch leakage current, Is (ON): On-state switch leakage current VCC VC = VIL VCC A A (OFF) GND B CONDITION 1: VA = 0, VB = VCC CONDITION 2: VA = VCC , V B = 0 VCC VC = VIH VCC A 10 A (ON) GND B Open VA = VCC or GND HD74LV4066A t PLH, t PHL : Propagation delay time (from switch input to switch output) VCC VC = VIH VCC A B (ON) GND RL = 50 Ω CL = 15 or 50 pF Switching time VCC RL = 50 Ω VC S1 RL = VOUT 1 k Ω VCC VIN S2 CL = 15 or 50 pF GND TEST S1 S2 tLZ /t ZL GND VCC tHZ /t ZH VCC GND VCC VC VCC VC 50% VCC 0V t ZL 50% VCC 0V t ZH ≈VCC VOUT VOH VOUT 50% VCC 50% VCC ≈0 V VOL VCC VC VCC VC 50% VCC 0V t LZ VOUT VOL +0.3 V VOL 0V t HZ ≈VCC VOUT 50% VCC VOH –0.3 V VOH ≈0 V 11 HD74LV4066A Frequency response (Switch ON) VCC f in = sine wave V C = V IH f in 0.1 µF VIN RL = 50 Ω VCC (ON) GND VOUT RL = 600 Ω CL = 50 pF VCC /2 Crosstalk (Between any switches) VCC V C = V IH f in 0.1 µF RL = 600 Ω VIN RL = 50 Ω VCC (ON) GND VOUT1 RL = 600 Ω CL = 50 pF VCC /2 VCC V C = V IL VCC RL = 600 Ω VCC /2 12 (OFF) GND VOUT2 RL = 600 Ω VCC /2 CL = 50 pF HD74LV4066A Crosstalk (Control input to signal output) VCC RL = 50 Ω VC VCC VOUT RL = 600 Ω GND VCC /2 RL = 600 Ω CL = 50 pF VCC /2 Feedthrough attenuation (Switch OFF) VCC VC = VIL 0.1 µF f in VIN RL = 50 Ω RL = 600 Ω VCC (OFF) GND VCC /2 VOUT RL = 600 Ω CL = 50 pF VCC /2 Sine-wave distortion VCC VC = VIH f in 10 µF VIN VCC (ON) GND VOUT RL = 10 k Ω CL = 50 pF VCC /2 13 HD74LV4066A Package Dimensions Unit: mm 10.06 10.5 Max 8 5.5 14 1 0.10 ± 0.10 1.42 Max 1.27 *0.42 ± 0.08 0.40 ± 0.06 *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 7 + 0.20 7.80 – 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension 14 Hitachi Code JEDEC EIAJ Weight (reference value) FP-14DA — Conforms 0.23 g HD74LV4066A Unit: mm 8.65 9.05 Max 8 1 7 *0.22 ± 0.03 0.20 ± 0.03 0.635 Max 1.75 Max 3.95 14 0.10 6.10 +– 0.30 1.08 *0.42 ± 0.08 0.40 ± 0.06 0.11 0.14 +– 0.04 0° – 8° 1.27 0.67 0.60 +– 0.20 0.15 0.25 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-14DN Conforms Conforms 0.13 g 15 HD74LV4066A Unit: mm 4.40 5.00 5.30 Max 14 8 1 7 0.65 *0.22 0.20 ± 0.06 1.0 0.13 M 6.40 ± 0.20 0.10 *Dimension including the plating thickness Base material dimension 16 *0.17 ± 0.05 0.15 ± 0.04 1.10 Max 0.83 Max 0.07 +0.03 –0.04 +0.08 –0.07 0° – 8° 0.50 ± 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) TTP-14D — — 0.05 g Cautions 1. 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