TI SNJ55LBC173W

SN55LBC173
QUADRUPLE LOW-POWER DIFFERENTIAL RECEIVER
SGLS081 – MARCH 1995
D
D
D
D
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
4B
4A
4Y
G
3Y
3A
3B
FK PACKAGE
(TOP VIEW)
1B
NC
VCC
4B
3
2
1
20 19
4
18 4A
G
5
17 4Y
NC
6
16 NC
2Y
7
15 G
2A
8
14 3Y
9
10 11 12 13
GND
1Y
2B
The SN55LBC173 is a monolithic quadruple
differential line receiver with 3-state outputs and is
designed to meet the requirements of the EIA
standards RS-422-A, RS-423-A, RS-485, and
CCITT V.11. This device is optimized for balanced
multipoint bus transmission at data rates up to and
exceeding 10 million bits per second. The four
receivers share two ORed enable inputs, one
active when high, the other active when low. Each
receiver features high input impedance, input
hysteresis for increased noise immunity, and input
sensitivity of ± 200 mV over a common-mode input
voltage range of 12 V to –7 V. Fail-safe design
ensures that if the inputs are open circuited, the
output is always high. The SN55LBC173 is
designed using the Texas Instruments proprietary
LinBiCMOS technology that provides low power
consumption, high switching speeds, and
robustness.
1A
description
3A
D
1B
1A
1Y
G
2Y
2A
2B
GND
3B
D
J OR W PACKAGE
(TOP VIEW)
Meets EIA Standards RS-422-A, RS-423-A,
RS-485, and CCITT V.11
Designed to Operate With Pulse Durations
as Short as 20 ns
Designed for Multipoint Bus Transmission
on Long Bus Lines in Noisy Environments
Input Sensitivity . . . ± 200 mV
Low-Power Consumption . . . 20 mA Max
Open-Circuit Fail-Safe Design
Pin Compatible With SN75173 and
AM26LS32
NC
D
NC – No internal connection
This device offers optimum performance when used with the SN55LBC172M quadruple line driver. The
SN55LBC173 is available in the 16-pin CDIP (J), the 16-pin CPAK (W), or the 20-pin LCCC (FK) packages.
The SN55LBC173 is characterized over the military temperature range of – 55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS is a trademark of Texas Instruments Incorporated.
Copyright  1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN55LBC173
QUADRUPLE LOW-POWER DIFFERENTIAL RECEIVER
SGLS081 – MARCH 1995
FUNCTION TABLE
(each receiver)
DIFFERENTIAL INPUTS
A–B
ENABLES
G
G
OUTPUT
Y
VID ≥ 0.2 V
H
X
X
L
H
H
– 0.2 V < VID < 0.2 V
H
X
X
L
?
?
VID ≤ – 0.2 V
H
X
X
L
L
L
X
L
H
Z
Open circuit
H
X
X
L
H
H
H = high level, L = low level, X = irrelevant,
Z = high impedance (off), ? = indeterminate
logic symbol†
G
G
1A
1B
2A
2B
3A
3B
4A
4B
4
logic diagram (positive logic)
≥1
G
12
2
G
3
1
6
7
10
9
14
15
1Y
1B
5
11
13
2Y
2A
2B
12
2
1
6
7
3
5
1Y
2Y
3Y
3A
4Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the J or W package.
2
1A
4
POST OFFICE BOX 655303
3B
4A
4B
• DALLAS, TEXAS 75265
10
9
14
15
11
13
3Y
4Y
SN55LBC173
QUADRUPLE LOW-POWER DIFFERENTIAL RECEIVER
SGLS081 – MARCH 1995
schematics of inputs and outputs
EQUIVALENT OF A AND B INPUTS
TYPICAL OF ALL OUTPUTS
VCC
TYPICAL OF G AND G INPUTS
VCC
100 kΩ
A Only
VCC
3 kΩ
Receiver
Input
Input
18 kΩ
100 kΩ
B Only
Y Output
12 kΩ
1 kΩ
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 7 V
Input voltage, VI (A or B inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 25 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 25 V
Data and control voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 7 V
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to GND.
2. Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 125°C
POWER RATING
FK
1375 mW
11.0 mW/°C
275 mW
J
1375 mW
11.0 mW/°C
275 mW
W
1000 mW
8.0 mW/°C
200 mW
recommended operating conditions
Supply voltage, VCC
Common-mode input voltage, VIC
MIN
NOM
MAX
UNIT
4.75
5
5.25
V
12
V
±6
V
–7
Differential input voltage, VID
High-level input voltage, VIH
Low-level input voltage, VIL
2
G inputs
V
0.8
V
High-level output current, IOH
–8
mA
Low-level output current, IOL
16
mA
125
°C
Operating free-air temperature, TA
– 55
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN55LBC173
QUADRUPLE LOW-POWER DIFFERENTIAL RECEIVER
SGLS081 – MARCH 1995
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIT +
VIT –
Positive-going input threshold voltage
Vhys
VIK
Hysteresis voltage ( VIT + – VIT – )
VOH
High-level output voltage
Negative-going input threshold voltage
Enable input clamp voltage
IO = – 8 mA
IO =16 mA
IOZ
High-impedance-state output current
MAX
– 0.2
– 0.9
IOH = – 8 mA
IOL = 16 mA
3.5
– 1.5
0.3
0.7
± 20
Other inputs at 0 V
VIH = 12 V,
VIH = – 7 V,
VCC = 0 V ,
Other inputs at 0 V
0.8
1
VCC = 5 V,
Other inputs at 0 V
– 0.5
– 0.8
VCC = 0 V,
Other inputs at 0 V
– 0.4
– 0.8
High-level input current
VIH = – 7 V,
VIH = 5 V
Low-level input current
VIL = 0 V
IOS
Short-circuit output
current
VO = 0
ICC
Supply current
IIH
IIL
Bus input current
A or B
inputs
Outputs enabled,
IO = 0,
0.7
V
V
0.5
VCC = 5 V,
II
V
mV
4.5
IOL = 16 mA, TA = 125°C
VO = 0 V to VCC
VIH = 12 V,
UNIT
V
45
VID = – 200 mV,
VID = – 200 mV,
Low level output voltage
Low-level
TYP†
0.2
II = – 18 mA
VID = 200 mV,
VOL
MIN
V
µA
1
mA
± 20
µA
– 20
µA
– 80
– 120
mA
11
20
0.9
1.4
MIN
TYP
MAX
11
22
30
VID = 5 V
Outputs disabled
mA
† All typical values are at VCC = 5 V and TA = 25°C.
switching characteristics, VCC = 5 V, CL = 15 pF
PARAMETER
TEST CONDITIONS
tPHL
Propagation delay time,
time high-to-low-level
high to low level output
VID = – 1.5 V to 1.5 V,,
See Figure 1
tPLH
Propagation delay time,
time low-to-high-level
low to high level output
VID = – 1.5 V to 1.5 V,,
See Figure 1
tPZH
Output enable time to high level
See Figure 2
tPZL
Output enable time to low level
See Figure 3
tPHZ
Output disable time from high level
See Figure 2
tPLZ
Output disable time from low level
See Figure 3
tsk(p)
Pulse skew (|tPHL – tPLH|)
See Figure 1
tt
Transition time
See Figure 1
4
TA
25°C
– 55°C to 125°C
11
25°C
11
– 55°C to 125°C
11
25°C
35
22
35
17
– 55°C to 125°C
25°C
18
30
25
– 55°C to 125°C
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
40
45
0.5
– 55°C to 125°C
25°C
40
55
– 55°C to 125°C
25°C
30
35
– 55°C to 125°C
25°C
40
45
– 55°C to 125°C
25°C
35
6
UNIT
ns
ns
ns
ns
ns
ns
ns
7
5
10
16
ns
SN55LBC173
QUADRUPLE LOW-POWER DIFFERENTIAL RECEIVER
SGLS081 – MARCH 1995
PARAMETER MEASUREMENT INFORMATION
Generator
(see Note A)
1.5 V
50 Ω
Input
Output
0V
0V
– 1.5 V
CL = 15 pF
(see Note B)
tPLH
tPHL
VOH
90%
Output
1.3 V
10%
1.3 V
VOL
tt
2V
tt
VOLTAGE WAVEFORMS
TEST CIRCUIT
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle ≤ 50%, tr ≤ 6 ns,
tf ≤ 6 ns, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 1. tpd and tt Test Circuit and Voltage Waveforms
VCC
Output
2 kΩ
1.5 V
S1
Input
CL = 15 pF
(see Note B)
5 kΩ
Generator
(see Note A)
3V
1.3 V
1.3 V
0V
tPHZ
tPZH
See Note C
Output
S1 Open
2V
0.5 V
1.3 V
0V
VOH
S1 Closed
≈ 1.4 V
VOLTAGE WAVEFORMS
50 Ω
(see Note D)
TEST CIRCUIT
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle ≤ 50%, tr ≤ 6 ns,
tf ≤ 6 ns, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
C. All diodes are 1N916 or equivalent.
D. To test the active-low enable G, ground G and apply an inverted input waveform to G.
Figure 2. tPHZ and tPZH Test Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SN55LBC173
QUADRUPLE LOW-POWER DIFFERENTIAL RECEIVER
SGLS081 – MARCH 1995
PARAMETER MEASUREMENT INFORMATION
VCC
Output
2 kΩ
– 1.5 V
3V
Input
CL = 15 pF
(see Note B)
1.3 V
1.3 V
0V
5 kΩ
See Note C
tPZL
tPLZ
S2 Open
2V
Output
Generator
(see Note A)
S2 Closed
≈ 1.4 V
1.3 V
VOL
S2
0.5 V
50 Ω
(see Note D)
VOLTAGE WAVEFORMS
TEST CIRCUIT
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle ≤ 50%, tr ≤ 6 ns,
tf ≤ 6 ns, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
C. All diodes are 1N916 or equivalent.
D. To test the active-low enable G, ground G and apply an inverted input waveform to G.
Figure 3. tPZL and tPLZ Test Circuit and Voltage Waveforms
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5.5
4.5
VCC = 5 V
TA = 25°C
VIC = 12 V
VIC = 0 V
VIC = – 7 V
2
VIC = 0 V
2.5
VIC = 12 V
3
1.5
1
0.5
0
0
10
20
30
40
50
60
70
80
90 100
VOH – High-Level Output Voltage – V
5
3.5
VIC = – 7 V
VO – Output Voltage – V
4
4
VCC = 5 V
3.5
VCC = 4.75 V
3
2.5
2
1.5
1
0.5 VID = 0.2 V
TA = 25°C
0
0 – 4 – 8 – 12 – 16 – 20 – 24 – 28 – 32 – 36 – 40
VID – Differential Input Voltage – mV
IOH – High-Level Output Current – mA
Figure 4
6
VCC = 5.25 V
4.5
Figure 5
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN55LBC173
QUADRUPLE LOW-POWER DIFFERENTIAL RECEIVER
SGLS081 – MARCH 1995
TYPICAL CHARACTERISTICS
AVERAGE SUPPLY CURRENT
vs
FREQUENCY
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
14
660
VOL – Low-Level Output Voltage – mV
600
540
I CC – Average Supply Current – mA
TA = 25°C
VCC = 5 V
VID = 200 mV
480
420
360
300
240
180
120
TA = 25°C
VCC = 5 V
12
10
8
6
4
2
60
0
10 K
0
0
3
6
9
12
15
18
21
24
27
30
100 K
Figure 6
0.6
0.4
0.2
0
– 0.2
– 0.4
– 0.6
– 0.8
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
–1
–8
24.5
TA = 25°C
VCC = 5 V
The shaded region of this graph represents
more than 1 unit load per RS-485.
–6 –4
–2
0
2
100 M
PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
4
6
8
10
12
Propagation Delay Time – ns
I I – Bus Input Current – mA
0.8
10 M
Figure 7
BUS INPUT CURRENT
vs
INPUT VOLTAGE
(COMPLEMENTARY INPUT AT 0 V)
1
2M
f – Frequency – Hz
IOL – Low-Level Output Current – mA
VCC = 5 V
CL = 15 pF
VIO = ± 1.5 V
24
tPHL
23.5
23
tPLH
22.5
22
– 40
– 20
0
20
40
60
80
100
TA – Free-Air Temperature – °C
VI – Input Voltage – V
Figure 8
Figure 9
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright  1998, Texas Instruments Incorporated