UCC28230 UCC28231 www.ti.com SLUS814 – FEBRUARY 2008 Advanced PWM Controller For Bus Converters • • • • • • • • • • • • • Programmable, Load Dependent, Off-Time Control Frequency Controlled Start Up Allows Small Output Inductor, Low Ripple and Constant Current Start with Large Output Capacitor Two 0.2-A Push-Pull Outputs Provide Matched Control Signals D to External Drivers Two Additional 1- D Outputs for Optimal Use of Self-Driven or Control Driven Synchronous Rectifiers Unregulated, Fixed Volt-Second or Fixed Frequency Modes set by User Two, 1.5% Overall Accuracy Reference Voltage Options: 5-V for UCC28230 and 3.3-V for UCC28231 Resistor Programmable Switching Frequency up to 1 MHz Cycle-by-Cycle Current Limit Allows Parallel Operation with Droop Based Current Sharing Single External Capacitor sets Soft-Start and Over Current Hiccup Mode Parameters with Restart Severe Short Circuit Hiccup with Restart or Latch-Off Protection Option by External Resistor Input Under Voltage Lock Out Thermal Shutdown Thermally Enhanced 3 mm x 2 mm SON-12 and TSSOP-14 Package Options APPLICATIONS • • Intermediate Bus Isolated Converters DC-to-DC Transformers DESCRIPTION The UCC28230, UCC28231 PWM bus controllers are optimized for use in high efficiency, high power density, unregulated intermediate bus converters. Topologies include push-pull, half-bridge and full-bridge. External drivers, such as 120-V high-side/low-side driver UCC27200, can be used with this controller. Low cost, small size and highly efficient solutions are achieved by innovations such as: • Start-up frequency control circuit allowing small output inductor and start with large intermediate bus capacitance. • Load dependent off-time control set by user. Additional 1-D control outputs can be used for primary winding clamping in self-driven output synchronous rectifier applications or as drive signals for the control-driven synchronous rectifier. Cycle-by-cycle current limit prevents overstresses of converter. If the over current condition causes less than 80% duty cycle at the output, then after programmable time the controller proceeds into periodical shutdown and restart hiccup mode. The UCC28230 provides 5 V, and the UCC28231 provides 3.3-V precision reference voltages with 1.5% overall accuracy and 10-mA output current. This reference voltage can be used to supply housekeeping circuit and/or microcontroller. The precision reference voltage can also be used for accurate setting of system parameters. Other features include under-voltage lockout, thermal shutdown, programmable soft-start, over-current hiccup mode and short circuit protection with internal restart (by default) or latch-off mode by using an external resistor. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. Copyright © 2008, Texas Instruments Incorporated PRODUCT PREVIEW FEATURES 1 UCC28230 UCC28231 www.ti.com SLUS814 – FEBRUARY 2008 Symplified Application Diagram + Vbias UCC27200 Vbias UCC27200 VDD VDD HB HB Vin 36 V to60V HI CT HO LI HI HO HS HS LO LO LI VSS VSS _ + Vout 7 V to12 V 400W _ Bias Power Supply Vbias VDD VDD VDD Thermal Shutdown UVLO Comp. 12 OS R2 Off Time Control Circuit 3 R3 Reference Generator 5V/3.3V LDO 1 R1 Micro Controller VDD 6.3V rise 5.7V fall VREF Vcc=5 V or3.3V Interface with System Housekeeping EN 2 OST CS O1_DIN 10 Short Circuit Shutdown O2_DIN 8 Is 6 CT PRODUCT PREVIEW Oscillator & Start Up Frequency Control Vin RT 4 O1_D Logic Block Cycle-byCycle Current Limit 11 O2_D 9 CLK Soft Start & Hiccup Current Limit Circuit GND 7 5 SS Figure 1. Full-Bridge Converter + UCC27200 Vbias VDD HB Vin 36V to 60V HI CT HO HS LI LO VSS _ + Bias Power Supply Vout 7V to 12V 200W _ Vbias VDD VDD VDD Thermal Shutdown UVLO Comp. 12 Interface with System OS R3 R2 MicroController Off Time Control Circuit 3 2 OST CS Reference Generator 5V/3.3V LDO 1 R1 VDD 6.3V rise 5.7V fall VREF Vcc =5V or 3.3V EN O1_DIN 10 Short Circuit Shutdown O2_DIN 8 6 CT Is Logic Block Cycle-byCycle Current Limit Vin RT 4 Oscillator & Start Up Frequency Control O1_D 11 O2_D 9 CLK Soft Start & Hiccup Current Limit Circuit GND 7 5 SS UCC28230 Figure 2. Half-Bridge Converter 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): UCC28230 UCC28231 UCC28230 UCC28231 www.ti.com SLUS814 – FEBRUARY 2008 ORDERING INFORMATION TEMPERATURE RANGE, TA = TJ REFERENCE VOLTAGE PACKAGE TAPE AND REEL QTY 5V 250 UCC28230DRNT 5V Plastic 12-pin SON (DRN) 3000 UCC28230DRNR 250 UCC28231DRNT 3.3 V 3000 UCC28231DRNR 5V 250 UCC28230PWT 5V 2000 UCC28230PWR 3.3 V -40°C to +125°C Plastic 14-pin TSSOP (PW) 3.3 V 3.3 V PART NUMBER 250 UCC28231PWT 2000 UCC28231PWR ABSOLUTE MAXIMUM RATINGS (1) (2) over operating free-air temperature range (unless otherwise noted) VALUE Input supply voltage range, (3) UNIT -0.3 to 20.0 O1_D, O2_D, O1_DIN, O2_DIN -0.3 to VDD +0.3 Inputs voltages on OS, CS, SS, RT, OST -0.3 to 6.3 Output voltage on VREF -0.3 to 5.6 HBM ESD rating, CDM ESD rating 500 NoLabel TJ Operating virtual junction temperature range, -40 to +150 TA Operating ambient temperature range, -40 to +125 Tstg Storage temperature, -65 to +150 Lead temperature (Soldering, 10 sec.) (2) (3) V 2k Continuous total power dissipation (1) PRODUCT PREVIEW VDD °C +300 Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. These devices are sensitive to electrostatic discharge; follow proper device handling procedures. All voltages are with respect to GND unless otherwise noted. Currents are positive into, negative out of the specified terminal. See Packaging Section of the datasheet for thermal limitations and considerations of packages. DISSIPATION RATINGS (1) BOARD PACKAGE High-K(2) (2) DRN RΘJC PW (1) (2) RΘJA DERATING FACTOR ABOVE TA = 25°C TA <25°C POWER RATING 110°C 9.07mW/ °C 907 mW TA = 70°C POWER RATING TA = 85°C POWER RATING These thermal data are taken at standard JEDEC test conditions and are useful for the thermal performance comparison of different packages. The cooling condition and thermal impedance RθJA of practical design is specific. The JEDEC test board JESD51-5 with direct thermal pad attach, 3-inch x 3-inch, 4-layer with 1-oz internal power and ground planes and 2-oz top and bottom trace layers (preliminary data based on modeling) RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN VDD Supply voltage range TJ Operating junction temperature range NOM 7 -40 MAX 12 UNIT 17 V 125 °C Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): UCC28230 UCC28231 3 UCC28230 UCC28231 www.ti.com SLUS814 – FEBRUARY 2008 ELECTRICAL CHARACTERISTICS (1) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITION MIN TYP MAX UNITS Bias Currents IDD(off) Startup current IDD Operating supply current 150 238 µA 1.5 4 mA 5.9 6.3 6.8 5.3 5.7 6.1 0.55 0.6 0.75 VDD is 200 mV below UVLO falling threshold Under Voltage Lockout Start threshold Minimum operating voltage after start Hysteresis V Soft Start (SS Pin) ISS Charge current VSS = 0 V VSS_STD Shutdown/restart/reset threshold 20 25 30 0.3 0.55 0.8 VSS_FP Soft-start first pulse threshold VSS_PU Pull up threshold 3.3 0.85 3.5 3.7 VSS_CL Clamp voltage 4.2 4.5 4.7 33 40 47 40 47 µA V OFF Time Programming PRODUCT PREVIEW TOFF Off time between O1_D and O2_D OS = 12.7 kΩ, CS = 0.3 V, OST = 1 V TDT Dead time between O1_D and O1_DIN, O2_D and O2_DIN TOFFR Off time between O1_D and O2_D TDTF Dead time between O1_D and O1_DIN, O2_D and O2_DIN ΔTOFFR Off time matching IHYST Hysteresis current source VCS(off) Off time control threshold OS = 12.7 kΩ, OST = 1 V, CS rising TOFF(ma Maximum off time at low CS OS = 12.7 kΩ, OST = 1 V, CS = 0 V 10 33 OS = 12.7 kΩ, CS = 0 V, OST = VREF ns 10 2 10 µA 0.1 V 165 235 ns x) Switching Frequency at O1_D and O2_D Outputs FSW(nom Starting frequency VSS = VSS(FP) + 100 mV 92 100 108 Nominal frequency VSS = VSS(PU) + 100 mV 92 100 108 Maximum frequency VSS = 1.8 V 450 500 550 ) FSW(max ) kHz VREF Output Voltage VREF5 Output voltage (UCC28230) 0 ≤ IR ≤ 10 mA, 7 V ≤ VDD ≤ 17 V, -40°C ≤ TJ ≤ 125°C 4.925 5 5.075 VREF3 Output voltage (UCC28231) 0 ≤ IR ≤ 10 mA, 7 V ≤ VDD ≤ 17 V, -40°C ≤ TJ ≤ 125°C 3.25 3.3 3.35 ΔVREF/ ΔVDD Line regulation 7 V ≤ VDD ≤ 17 V, IR = 1 mA 0.3 1 ΔVREF/ ΔIREF Load regulation 0 ≤ IR ≤ 10 mA 1.3 3 mV/mA ISCC Short circuit current VREF = 0 V (1) 4 V -35 -25 -15 mV/V mA Typical values for TA + 25°C. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): UCC28230 UCC28231 UCC28230 UCC28231 www.ti.com SLUS814 – FEBRUARY 2008 ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITION MIN TYP MAX UNITS Current Sense, Cycle-by-Cycle Current Limit With Hiccup, Short Circuit Protection With Latch OFF VCS_LIM CS pin cycle-by-cycle threshold 0.485 TCS Propagation delay from CS to O1_D and O2_D outputs Input pulse at CS from zero to 0.6 V IDS Discharge current to set cycle-by-cycle current limit duration CS = 0.6 V, VSS = 4 V 0.5 0.515 25 V ns 15 20 25 µA Hiccup OFF time threshold 3.1 3.4 3.7 V IHCC Discharge current to set hiccup mode OFF time 1.9 2.5 3.1 µA VCS_SC CS pin short circuit protection threshold 0.65 0.7 0.75 V Outputs O1_D, O2_D, O1_DIN, O2_DIN 0.2 A Rise time CLOAD = 100 pF 8 20 Fall time CLOAD = 100 pF 4 20 RSRC Output source resistance IOUT = 20 mA 15 20 30 RSINK Output sink resistance IOUT = 20 mA 5 10 25 Duty cycle matching Pins 7 and 9 pulses matching at FSW = 100 kHz 35 ns Ω PRODUCT PREVIEW Sink/source peak current ns Thermal Shutdown Rising threshold 150 160 170 Falling threshold 130 140 150 Hysteresis °C 20 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): UCC28230 UCC28231 5 UCC28230 UCC28231 www.ti.com SLUS814 – FEBRUARY 2008 DEVICE INFORMATION SON-12 Package VDD Thermal Shutdown UVLO Comp. VDD VDD 12 EN VDD 6.3V rise 5.7V fall VREF 5V/3.3V LDO 1 OS R1 Off Time Control Circuit 3 R3 2 R2 Reference Generator OST CS O1_DIN 10 Short Circuit Shutdown O2_DIN 8 Is 6 CT PRODUCT PREVIEW Oscillator & Start Up Frequency Control Vin RT 4 O1_D Logic Block Cycle-byCycle Current Limit 11 O2_D 9 CLK Soft Start & Hiccup Current Limit Circuit GND 7 5 SS TSSOP-14 Package VDD VDD VDD Thermal Shutdown UVLO Comp. 14 EN VDD 6.3V rise 5.7V fall VREF 5V/3.3V LDO 1 R1 OS R3 R2 Off Time Control Circuit 3 2 OST CS Reference Generator O1_DIN 12 Short Circuit Shutdown O2_DIN 10 7 CT Is Logic Block Cycle-byCycle Current Limit NC O2_D 4 Vin RT 5 AGND Oscillator & Start Up Frequency Control O1_D 13 11 CLK Soft Start & Hiccup Current Limit Circuit GND 9 8 6 SS 6 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): UCC28230 UCC28231 UCC28230 UCC28231 www.ti.com SLUS814 – FEBRUARY 2008 PINOUT DIAGRAMS DFN-12 TSSOP-14 PIN # NAME I/O FUNCTION 1 1 VREF O VREF is a 10-mA output reference, 1.5% accurate 5 V for UCC28230 and 3.3 V for UCC28231. The reference voltage has short circuit protection that can be used for fixed switching frequency setting and/or for housekeeping microcontroller. Place decoupling capacitor in the range of 1 µF to 2.2 µF from this pin to GND. 2 2 OST I The off-time control threshold pin uses a resistor divider to set current level as percentage of current limit threshold below which TOFF starts increasing and reaches its maximum value at no load condition. 3 3 OS I Nominal off time, TOFF, set pin. 4 NC 4 5 RT I Oscillator timing input pin. The external resistor which is connected between this pin and VIN sets the oscillator frequency which varies with VIN. Tieing the external resistor to VREF sets fixed frequency operation independent of VIN. 5 6 SS I/O Input for setting the adjustable soft-start and hiccup mode. Place the soft-start capacitor from this pin to GND. The internal charge/discharge current ISS and an external capacitor value set the soft-start timing, duration of cycle-by-cycle current limit and OFF time for hiccup mode operation. 6 7 CS PRODUCT PREVIEW TERMINAL FUNCTIONS No connection pin, TSSOP-14 only. Current sensing pin used for cycle-by-cycle current limit, short circuit protection and off time control. 8 AGND 7 9 GND Analog ground, TSSOP-14 only. 8 10 O2_DIN O 0.2-A sink/source switching output pin. Connect this pin to an external driver that provides 1-D pulse. 9 11 O2_D O 0.2-A sink/source switching output pin. Connect this pin to an external driver that provides D pulse. 10 12 O1_DIN O 0.2-A sink/source switching output pin. Connect this pin to an external driver that provides 1-D pulse. 11 13 O1_D O 0.2-A sink/source switching output pin. Connect this pin to an external driver that provides D pulse. 12 14 VDD I Connect this pin to a 7-V to 17-V bias supply. Place a high quality at least 1-µF ceramic bypass capacitor from this pin to GND. Ground pin connected to thermal pad. All signals are referenced to this node. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): UCC28230 UCC28231 7