S PL081A SP Low Voltage 7KB LCD Controller AUG. 27, 2001 Version 1.1 SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO. is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document. Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus. SPL081A Table of Contents PAGE 1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3 2. FEATURES.................................................................................................................................................................................................. 3 3. BLOCK DIAGRAM ...................................................................................................................................................................................... 3 4. SIGNAL DESCRIPTIONS ........................................................................................................................................................................... 4 5. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 5 5.1. ROM AREA ........................................................................................................................................................................................... 5 5.2. STOP CLOCK MODE ............................................................................................................................................................................... 5 5.3. TIMER/COUNTER ................................................................................................................................................................................... 5 5.4. LCD CONTROLLER ................................................................................................................................................................................ 5 5.5. MAP OF MEMORY AND I/OS .................................................................................................................................................................... 5 6. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................... 6 6.1. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................... 6 6.2. DC CHARACTERISTICS........................................................................................................................................................................... 6 7. APPLICATION CIRCUIT ............................................................................................................................................................................. 7 8. PACKAGE/PAD LOCATIONS ..................................................................................................................................................................... 8 8.1. PAD ASSIGNMENT ................................................................................................................................................................................. 8 8.2. ORDERING INFORMATION ....................................................................................................................................................................... 8 8.3. PAD LOCATIONS .................................................................................................................................................................................... 9 9. DISCLAIMER............................................................................................................................................................................................. 10 10. REVISION HISTORY ................................................................................................................................................................................. 11 © Sunplus Technology Co., Ltd. Proprietary & Confidential 2 AUG. 27, 2001 Version: 1.1 SPL081A LOW VOLTAGE 7KB LCD CONTROLLER 1. GENERAL DESCRIPTION 3. BLOCK DIAGRAM SPL081A, a special designed CMOS 8-bit microprocessor by Sunplus, offers the best cost/performance ratio in the industry. X32I X32O It combines RAM, ROM, I/Os, an interrupt controller, and an automatic display controller/driver in a small package. One of its extraordinary features is the capability of operating in low voltage range, from 1.2V - 1.7V. OSC GEN TIME BASE & INTERRUPT LOGIC 8-BIT RISC PROCESSOR The Power Down Mode keeps LCD 12 I/O P O R T being displayed when CPU is in standby mode, but consumes only less than 3.5µA. EFB5 - 0 ( I ) CDB3 - 0 ( I/O ) Not only SPL081A is capable of displaying 7.5K BYTES ROM LCD, but it also can process complex instructions and functions as well. ABB1 - 0 ( I/O ) ONE 8-BIT AUTO RELOAD TIMER The development team has designed SPL081A to cover 128 BYTES SRAM many application fields such as calculator, watch and other LCD related products required only one battery supply. 32 SEGMENTS X 4 COMMONS LCD DRIVER 2. FEATURES ! Built-in 8-bit RISC processor MASK OPTION ! 128-byte SRAM ! 7.5K-byte ROM ! CPU frequency: 150KHz, 300KHz or 500KHz (mask option) SEG31- 0 @ 1.5V (dependent VDD) SEG31 - 28 /ABB7 - 4 C4/ABB1 C3 - C0 ! Built-in RC oscillator ! Built-in 32.768KHz oscillator circuit for real clock function Note1: By mask option, SEG31 - 28 can be defined as either segment ! Watch dog mode (1Hz or 0.5Hz) output or I/O. (SEG31 - 28 or ABB7 - 4) Note2: By mask option, ABB1 can be defined as either I/O or common ! Low operating voltage: 1.2V - 1.7V output (ABB1 or common4) ! Low standby current, ISTBY < 1µA ! LCD matrix: 28 - 32 segments, 4(or 5) commons defined as I/O; ! 12 general I/O pins (segment 29, 30, 31, 32 can be th ABB1 can be optioned to 5 common) ! LCD 1/2, 1/3 bias, 1/2, 1/3, 1/4, 1/5 (mask option) duty ! One 8-bit timer ! 6 interrupt sources (Timer, T16Hz, T2Hz, 128Hz, 2KHz, external interrupt) ! Power down mode (Wake-up source: key input, T2Hz, T16Hz, timer) Note1: T16Hz: 32Hz, 16Hz, 8Hz or 4Hz Note2: T2Hz: 2Hz or 1Hz © Sunplus Technology Co., Ltd. Proprietary & Confidential 3 AUG. 27, 2001 Version: 1.1 SPL081A 4. SIGNAL DESCRIPTIONS Mnemonic PIN No. Type SEG26 - 0 30 - 4 O SEG31 - 27 36 - 32 Description LCD driver segment output. SEG31 - 28 can be mask option for ABB7 - 4. C3 - 0 54 - 57 O LCD driver common output ABB1 - 0 37 - 38 I/O I/O port (ABB1 can be mask option for C4) EFB5 - 0 44 - 49 I CDB3 - 0 42 - 39 I/O Input port (also for key wake up input) I/O port is applicable for sensor RESET 50 I System reset input X32I 51 I 32.768KHz crystal input (provide LCD frequency) X32O 52 O 32.768KHz crystal output TEST 53 I Test input VDD 43 I Power input VSS 31 I Ground input V3 58 I Inputs for setting LCD bias V45 1 CUP1 2 I Inputs for setting LCD bias CUP2 3 © Sunplus Technology Co., Ltd. Proprietary & Confidential 4 AUG. 27, 2001 Version: 1.1 SPL081A 5. FUNCTIONAL DESCRIPTIONS 5.1. ROM Area 5.4. LCD Controller The SPL081A provides 7.5K-byte ROM with a LCD driver that is SPL081A contains a LCD controller/driver that provides the capable of controlling 4(or 5) commons and 32 segments. capability of driving 5 commons and 32 segments LCD. (Basically, 7K bytes of ROM is available for application program the overhead of CPU, a display buffer is designed for mapping to and data, 0.5K bytes is allocated for test program.) LCD. To light A LCD dot/pattern is set ON or OFF by programming the corresponding bit of the display buffer. To make the chip more 5.2. Stop Clock Mode flexible, the pin SEG31, 30, 29, 28, can be selected as I/O pins by The SPL081A provides a power saving mode for those mask option. applications required very low stand-by current. 1/2 or 1/3. Users can In addition, the LCD bias can be programmed as The duty can be selected as 1/2, 1/3, 1/4 or 1/5. simply enable the wake-up sources to stop the CPU clock by writing the STOP CLOCK Register ($09). 5.5. Map of Memory and I/Os By doing that, CPU will go to standby mode and the RAM and I/Os remain in their previous states until being woken up. ― PORT ABB $0002 sources in the SPL081A, Port EFB wake-up, TIMER wake-up and T2Hz or T16Hz wake-up. $0000 EFB $0003 After the SPL081A is woken up, CPU will go to the next state of Sleep. *MEMORY MAP * I/O PORT: There are three wake-up CDB $0005 Wake-up action will not affect ― I/O CONFIG $0000 $0001 both RAM and I/Os. H/W REGISTER, I/Os $0080 USER RAM and STACK $0006 * NMI SOURCE: Note1: T16Hz: 32Hz, 16Hz, 8Hz or 4Hz Note2: T2Hz: 2Hz or 1Hz $00FF ― INT1 (from TIMER) 5.3. Timer/Counter *INT SOURCE The SPL081A contains an 8-bit timer. a re-loadable up-counter. UNUSED $0200 ― INT0 (from TIMER) In the timer mode, TMA is SUNPLUS TEST PROGRAM ― 128 Hz It will automatically be reloaded with ― 2 KHz ― TYHz (32Hz, 16Hz, 8Hz, 4Hz) the user’s preset value and up-count again. $05FF $0600 USER'S PROGRAM ― TXHz (2 Hz or 1Hz) ― EXTERNAL (CDB1) $1FFF The clock source is selected as the following: Timer/Counter TMA 8-BIT TIMER Addr. $0025 © Sunplus Technology Co., Ltd. Proprietary & Confidential DATA AREA Clock Source CPU CLOCK (T) or CLK32K (32768Hz or CPU clock / 8) 5 AUG. 27, 2001 Version: 1.1 SPL081A 6. ELECTRICAL SPECIFICATIONS 6.1. Absolute Maximum Ratings Characteristics Symbol Ratings DC Supply Voltage V+ < 1.7V Input Voltage Range VIN -0.5V to V+ + 0.5V Operating Temperature TA 0℃ to +60℃ TSTO -50℃ to +150℃ Storage Temperature Note: Stresses beyond those given in the Absolute Maximum Rating table may cause operational errors or damage to the device. For normal operational conditions see AC/DC Electrical Characteristics. 6.2. DC Characteristics Characteristics Limit Symbol Operating Voltage Operating Current with 2Hz wake up Operating Current with 2Hz wake up Operating Current without 2Hz wakeup Standby Current OSC Frequency Unit Test Condition Min. Typ. Max. VDD 1.2 - 1.7 V IOP - 3.0 - µA IOP - 16 - µA IOP - 35 - µA FCPU = 0.3MHz @ 1.5V, no load ISTBY - - 1.0 µA VDD = 1.5V, 32768 Hz OFF - 0.3 - - 0.6 - - 1.1 - FOSC2 FCPU = 0.3MHz @ 1.5V, no load use 32768Hz crystal FCPU = 0.3MHz @ 1.5V, no load no use 32768Hz crystal MHz VDD = 1.5V Input High Level VIH 1.1 - - V VDD = 1.5V Input Low Level VIL - - 0.5 V VDD = 1.5V IOH - -1.0 - mA IOL - 0.25 - mA - 0.15 - - 0.3 - - 0.55 - Output High Current (I/O) Output Sink Current (I/O) CPU Clock FCPU VDD = 1.5V VOH = 1.0V VDD = 1.5V VOL = 0.5V 0.15, 0.3, 0.55MHz by code option MHz FCPU = FOSC/2 @ 1.5V 6.2.2. Frequency vs. VDD 6.2.1. Frequency vs. temperature Frequency norm alized to 25℃ 1.05 FCPU ( KHz ) FCPU/FCPU (25℃ ) 1.10 V DD =1.5V 1.00 0.95 500.0 400.0 300.0 200.0 100.0 0.0 1.2 0.90 0 10 20 30 40 50 Tem perature ( ℃ ) © Sunplus Technology Co., Ltd. Proprietary & Confidential 60 1.3 1.4 1.5 1.6 1.7 VDD ( Volts ) 70 6 AUG. 27, 2001 Version: 1.1 SPL081A 7. APPLICATION CIRCUIT 0.1µ 20p 0.1µ C2 20p C3 TEST X32I SPL081A SEG17 X32O RESET EFB0 EFB2 SEG20 EFB3 SEG21 RESET EFB1 0.1 µ SEG18 SEG19 EFB4 SEG22 EFB5 VDD CDB3 CDB2 CDB1 CDB0 ABB1 ABB0 SEG31 SEG30 SEG29 SEG28 SEG27 VSS SEG26 SEG25 V3 V45 CUP1 CUP2 SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG8 C0 C1 SEG16 SEG23 SEG24 32768Hz SEG6 0.1 µ LCD SEG7 Cs[3:0] Module SEGs[31:0] SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 VDD 0.1µF I/O DEVICE Note: The 0.1µF capacitor between VDD and VSS should be placed to IC as close as possible. © Sunplus Technology Co., Ltd. Proprietary & Confidential 7 AUG. 27, 2001 Version: 1.1 SPL081A 8. PACKAGE/PAD LOCATIONS 8.1. PAD Assignment Chip Size: 2440µm x 2020µm This IC substrate should be connected to VSS Note1: Chip size included scribe line. Note2: The 0.1µF capacitor between VDD and VSS should be placed to IC as close as possible. 8.2. Ordering Information Product Number Package Type SPL081A-nnnnV-C Chip form Note1: Code number (nnnnV) is assigned for customer. Note2: Code number (nnnn = 0000 - 9999); version (V = A - Z). © Sunplus Technology Co., Ltd. Proprietary & Confidential 8 AUG. 27, 2001 Version: 1.1 SPL081A 8.3. PAD Locations PAD No. PAD Name X Y PAD No. PAD Name X Y 1 V45 -1068 847 30 2 CUP1 -1068 711 31 SEG26 1019 -858 VSS 1019 -721 3 CUP2 -1068 574 32 SEG27 1019 -584 4 SEG0 -1068 5 SEG1 -1068 447 33 SEG28 1019 -450 320 34 SEG29 1019 -322 6 SEG2 -1068 193 35 SEG30 1019 -196 7 SEG3 8 SEG4 -1068 66 36 SEG31 1019 -69 -1068 -60 37 ABB1 1019 58 9 SEG5 -1068 -187 38 ABB0 1019 193 10 SEG6 -1068 -314 39 CDB0 1019 320 11 SEG7 -1068 -441 40 CDB1 1019 447 12 SEG8 -1068 -577 41 CDB2 1019 574 13 SEG9 -1068 -714 42 CDB3 1019 711 14 SEG10 -1068 -858 43 VDD 1001 847 15 SEG11 -931 -858 44 EFB5 864 847 16 SEG12 -795 -858 45 EFB4 727 847 17 SEG13 -668 -858 46 EFB3 601 847 18 SEG14 -541 -858 47 EFB2 474 847 19 SEG15 -414 -858 48 EFB1 347 847 20 SEG16 -287 -858 49 EFB0 220 847 21 SEG17 -160 -858 50 RESET 93 847 22 SEG18 -33 -858 51 X32I -33 847 23 SEG19 93 -858 52 X32O -160 847 24 SEG20 220 -858 53 TEST -287 847 25 SEG21 347 -858 54 C3 -414 847 26 SEG22 474 -858 55 C2 -541 847 27 SEG23 601 -858 56 C1 -668 847 28 SEG24 737 -858 57 C0 -795 847 29 SEG25 874 -858 58 V3 -931 847 © Sunplus Technology Co., Ltd. Proprietary & Confidential 9 AUG. 27, 2001 Version: 1.1 SPL081A 9. DISCLAIMER The information appearing in this publication is believed to be accurate. Integrated circuits sold by Sunplus Technology are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. SUNPLUS makes no warranty, express, statutory implied or by description regarding the information in this publication or regarding the freedom of the described chip(s) from patent infringement. MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. prices at any time without notice. FURTHERMORE, SUNPLUS MAKES NO WARRANTY OF SUNPLUS reserves the right to halt production or alter the specifications and Accordingly, the reader is cautioned to verify that the data sheets and other information in this publication are current before placing orders. Products described herein are intended for use in normal commercial applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are specifically not recommended without additional processing by SUNPLUS for such applications. Please note that application circuits illustrated in this document are for reference purposes only. © Sunplus Technology Co., Ltd. Proprietary & Confidential 10 AUG. 27, 2001 Version: 1.1 SPL081A 10. REVISION HISTORY Date Revision # Description JUL. 28, 1998 0.1 Original AUG. 18, 1998 0.2 Modify CPU frequency: 0.3MHz @ 1.5V -> 300KHz or 550KHz (mask option) in the Page “FEATURES” OCT. 27, 1998 0.3 1. Modify CPU frequency: 550KHz -> 500KHz 2. Add “PAD ASSIGNMENT AND LOCATIONS” JAN. 12, 1999 0.4 Correct chip size: 2440µm X 2020µm OCT. 20, 1999 0.5 Add “Iop Condition” description in the “DC CHARACTERISTICS” MAY. 15, 2001 1.0 1. Delete “PRELIMINARY” 2. Add “Note: The 0.1µF capacitor between VDD and VSS…” 6, 7 3. Add “10. REVISION HISTORY” 10 4. Renew to a new document format AUG. 27, 2001 1.1 1. Add Note1 in the “8.1 PAD Assignment” 8 2. Renew to a new document format © Sunplus Technology Co., Ltd. Proprietary & Confidential 11 AUG. 27, 2001 Version: 1.1