ETC SPCR02A

S
PCR02A
SP
Sound Controller with 40KB MROM
and Serial RAM Interface
SEP. 19, 2001
Version 1.5
SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO.
is believed to be accurate and reliable.
However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document.
Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by
SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products
are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may
reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus.
SPCR02A
Table of Contents
PAGE
1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3
2. BLOCK DIAGRAM ...................................................................................................................................................................................... 3
3. FEATURES.................................................................................................................................................................................................. 3
4. APPLICATION FIELD ................................................................................................................................................................................. 3
5. SIGNAL DESCRIPTIONS* .......................................................................................................................................................................... 4
6. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 5
6.1. CPU ..................................................................................................................................................................................................... 5
6.2. ROM AREA ........................................................................................................................................................................................... 5
6.3. RAM AREA ............................................................................................................................................................................................ 5
6.4. MAP OF MEMORY AND I/OS .................................................................................................................................................................... 5
6.5. I/O PORT CONFIGURATIONS*.................................................................................................................................................................. 5
6.6. TIMER/COUNTER ................................................................................................................................................................................... 6
6.7. SPEECH AND MELODY ............................................................................................................................................................................ 6
6.8. POWER SAVINGS MODE ......................................................................................................................................................................... 6
7. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................... 7
7.1. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................... 7
7.2. DC/AC CHARACTERISTICS..................................................................................................................................................................... 7
7.3. THE RELATIONSHIP BETWEEN THE ROSC AND THE FCPU ............................................................................................................................. 7
8. APPLICATION CIRCUIT ............................................................................................................................................................................. 8
9. PACKAGE/PAD LOCATIONS ..................................................................................................................................................................... 9
9.1. PAD ASSIGNMENT ................................................................................................................................................................................. 9
9.2. ORDERING INFORMATION ....................................................................................................................................................................... 9
9.3. PAD LOCATIONS .................................................................................................................................................................................. 10
10. DISCLAIMER............................................................................................................................................................................................. 11
11. REVISION HISTORY ................................................................................................................................................................................. 12
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
2
SEP. 19, 2001
Version: 1.5
SPCR02A
SOUND CONTROLLER WITH
40KB MROM AND SERIAL RAM INTERFACE
1. GENERAL DESCRIPTION
3. FEATURES
The SPCR02A is a CPU based device for recording (one channel)
! 8-bit microprocessor
and playback (two channel) that includes a CMOS 8-bit
! Software-based audio processing
microprocessor, 40K-byte MROM (speech is compressed by 4-bit
! Provides 40K-byte MROM for program and audio data with
ADPCM with approx. 12sec. speech duration @ 7KHz sampling
rate).
approx. 12 sec. speech @ 7KHz sampling rate with ADPCM
It also includes Serial SRAM Interface and 128-byte
working SRAM.
! 128-bytes working SRAM
It includes two Timer/Counters, 20 software
! Operating voltage (single power): 2.4V - 3.6V
selectable I/Os, two 8-bit audio current output D/A, MIC
3.6V - 5.5V
(microphone) input, and AGC function.
For audio processing,
melody and speech can be mixed into one output.
over a single power voltage range of 2.4V - 5.5V.
! Supports Rosc
It operates
! Max. CPU clock speed: 6.0MHz @ 5.0V
In addition, the
SPCR02A has a Clock Stop mode for power savings.
! Serial SRAM Interface
The power
! Standby mode (Clock Stop mode) for power savings.
savings mode saves the SRAM contents, but freezes the oscillator,
causing all other chip functions to be inoperative.
clock frequency is 6.0MHz.
Max. 5µA @ 5.0V
The Max. CPU
! Below 1000ns instruction cycle time @ 4.0MHz CPU clock
It has an instruction cycle rate of 2
clock cycles (min.) - 6 clock cycles (max.).
! Provides 20 general I/Os
The SPCR02A
! Two 12-bit timer/counters
includes, not only the latest technology, but also the full
! Two 8-bit audio current output (D/A)
commitment and technical support of Sunplus.
! 6 INT sources
! Sunplus Serial SRAM Chip-Set Options
― SPRS256A (10sec @ 6.4KHz sampling rate)
2. BLOCK DIAGRAM
― SPRS512C (20sec @ 6.4KHz sampling rate)
― SPRS1024C (40sec @ 6.4 Sampling Rate)
40K-byte
MROM
Rosc
8-bit
128-byte
SRAM
Two
8-bit D/A
(current)
MIC
Input
Serial RAM Interface
20
! MIC input with AGC and Comparator
INT control
microprocessor
MIC
AGC
OPIN
OPOUT
! Key wake -up function
Two Timers
TimeBase
PINS
GENERAL
I/O
AUD1
AUD2
4. APPLICATION FIELD
! Intelligent education toys
CSB
SCL
SDA
Ex. Pattern to voice (animal, car, color, etc.)
Spelling (English or Chinese)
PORT
Math
IOB3-0, 6,7
(I/O)
IOC3-0,6,7
(I/O)
IOD7-0
(I/O)
! High end toy controller
! Talking instrument controller
! General speech recorder
! Interactive games
! Industrial controller
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
3
SEP. 19, 2001
Version: 1.5
SPCR02A
5. SIGNAL DESCRIPTIONS*
Mnemonic
PIN No.
Type
VDD
10
I
Positive supply for logic and I/O pins.
Description
VSS
3
I
Ground reference for logic and I/O pins.
RESET
4
I
RESET input (This pin is active low reset for the chip)
ROSC
11
I
ROSC input
SDA
21
I/O
External SRAM interface with the following Serial SRAM Chip-Set Options: SPRS256A,
SCL
22
O
SPRS512C, and SPRS1024C.
CSB
23
O
AUD1
17
O
AUDIO output A
MIC
13
I
Microphone input
OPIN
15
I
Preamplifier Input
OPOUT
16
O
Preamplifier Output
ALC
14
I
Automatic Gain Control
AUD2
12
O
AUDIO output B
I/O
Port B is an 8-bit bi-directional programmable Input / Output port with Pull-low or
IOB0
30
I/O
Open-drain option.
IOB1
31
I/O
outputs, Port B can be either Buffer or Open-drain NMOS types (Sink current).
IOB2
32
I/O
IOB3
33
I/O
IOB6
1
I/O
IOB7
2
IOC0
24
I/O
Open-drain option.
IOC1
25
I/O
outputs Port C can be a Buffer or Open-drain type.
IOC2
26
I/O
type (Sink current) and Port C7 - C6 are Open-drain NMOS (Sink current).
IOC3
27
I/O
IOC1: EXT INT IN
IOC6
28
I/O
IOC2: EXT COUNT IN
IOC7
29
I/O
**See note 1 and 2 below.
As inputs, Port B can be in either the Pure or Pull-low states.
As
**See note 1 and 2 below.
Port C is an 8-bit bi-directional programmable Input / Output port with Pull-high or
As inputs, Port C can be in either the Pure or Pull-high states.
As
Port C3 - C0 are Open-drain NMOS
Port D is an 8-bit bi-directional Input / Output port with Pull-low or Open-drain option.
IOD0
20
I/O
inputs, Port D can be either Pure or Pull-low states.
IOD1
19
I/O
Buffer or Open-drain PMOS (send current).
IOD2
18
I/O
for wake-up I/O pins.
IOD3
9
I/O
(Key change, Wake up I/O)
IOD4
8
I/O
IOD5
7
I/O
IOD6
6
I/O
IOD7
5
I/O
As
As outputs, Port D can be either
Also, Port D can be software programmed
**See note 1 and 2 below.
* Refer to SPC Programming Guide for complete information.
**Note: 1.) Three input states can be specified; Pure Input, Pull-High or Pull Low.
2.) Three output states can be specified as Buffer output, Open Drain PMOS output (send), or Open Drain NMOS output (sink).
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
4
SEP. 19, 2001
Version: 1.5
SPCR02A
6. FUNCTIONAL DESCRIPTIONS
6.1. CPU
Input/Output IOB port : IOB7,6
The SPCR02A 8-bit microprocessor is a high performance
processor equipped with Accumulator, Program Counter, X
input data
Register, Stack pointer and Processor Status Register (this is the
same as the 6502 instruction structure).
SPCR02A is able to
output
perform with 6.0MHz (max.) depending on the application
OD-NMOS
or buffer
data
specifications.
60K
logic_2
6.2. ROM Area
control
The SPCR02A provides a 40K-byte MROM that can be defined as
OD : Open Drain
the program area, audio data area, or both.
Input/Output IOC port : IOC3 - 0
6.3. RAM Area
The SPCR02A total RAM consists of 128 bytes (including Stack)
logic_3
at locations from $80 through $FF.
control
data
*MEMORY MAP (From ROM view)
- PORT IOB
$0003
IOC
$0004
IOD
$0005
$00000
HW register, I/Os
OD : Open Drain
USER RAM and STACK
$0001
buffer or
OD-NMOS
input data
$00080
- I/O CONFIG $0000
90K
output
6.4. Map of Memory and I/Os
*I/O PORT:
VDD
$00100
DUMMY for ice debug
*NMI SOURCE:
- INTA (from TIMER A)
Input/Output IOC port : IOC7,6
$06000
$0FFFF
*INT SOURCE:
USER'S PROGRAM &
DATA AREA
VDD
logic_4
control
90K
- INTA (from TIMER A)
output
- INTB (from TIMER B)
data
- CPU CLK / 1024
- CPU CLK / 8192
- CPU CLK / 65536
buffer or
OD-NMOS
input data
- EXT INT
OD : Open Drain
6.5. I/O Port Configurations*
Input/Output IOD port : IOD3 - 0
input data
Input/Output IOB port : IOB3 - 0
input data
output
output
OD-PMOS
or buffer
data
OD-NMOS
or buffer
logic_5
data
60K
control
logic_1
60K
OD : Open Drain
control
OD : Open Drain
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
5
SEP. 19, 2001
Version: 1.5
SPCR02A
Input/Output IOD port : IOD7 - 4
Clock source of Timer/Counter can be selected as follows:
Timer/Counter
input data
Clock Source
12-BIT TIMER
output
OD-PMOS
or buffer
TMA
CPU CLOCK (T) or T/4
12-BIT COUNTER
data
TMB
logic_6
60K
control
12-BIT TIMER
T/64, T/8192, T/65536 or EXT
CLK
T or T/4
MODE SELECT REGISTER
TMA only, select timer or counter
TIMER CLOCK SELECTOR
Select T or T/4
OD : Open Drain
6.7. Speech and Melody
*Values shown are for VDD = 5.0V test conditions only.
Since the SPCR02A provides a large ROM and wide range of
CPU operation speeds, it is most suitable for speech and melody
6.6. Timer/Counter
synthesis.
The SPCR02A contains two 12-bit timer/counters, TMA and TMB
respectively.
For speech synthesis, the SPCR02A can provide NMI for accurate
TMA can be specified as a timer or a counter, but
TMB can only be used as a timer.
In the timer mode, TMA and
sampling frequency.
TMB are re-loaded up-counters.
When timer overflows from
and digitize it into the external Serial SRAM.
For recording users can record the sound
The sound data can
$0FFF to $0000, the carry signal will make the timer automatically
be played back in the sequence of the control functions as
reload to the user’s pre-set value and be up-counted again.
designed by the user's program.
At
For pre-recorded data several
the same time, the carry signal will generate the INT signal if the
algorithms are recommended for high fidelity and compression of
corresponding bit is enabled in the INT ENABLE Register.
sound including PCM, LOG PCM, and ADPCM.
If TMA
is specified as a counter, users can reset by loading #0 into the
After the counter has been activated, the value of the
For melody synthesis, the SPCR02A provides the dual tone mode.
counter can also be read from the counters at the same time.
After selecting the dual tone mode, users only need to fill either
The read instruction will not reset or affect the value of the
TMA or TMB, or both TMA and TMB to generate expected
counter.
frequency for each channel.
counter.
The hardware will toggle the tone
wave automatically without entering into an interrupt service
routine.
Users are able to simulate musical instruments or sound
effects by simply controlling the envelope of tone output.
6.8. Power Savings Mode
The SPCR02A provides a power savings mode (Standby mode)
awakened.
Port IOD7-0 is the only wake-up source in the
for those applications that require very low stand-by current.
SPCR02A.
After the SPCR02A is awakened, the internal CPU
To
enter standby mode, the Wake-Up Register should be enabled
will go to the RESET State (Tw ≧ 65536 x T1) and then continue
and then stop the CPU clock by writing the STOP CLOCK
processing the program.
Register.
I/Os. (See FIG.1)
The CPU will then go to the stand-by mode.
In such a
Wakeup Reset will not affect RAM or
mode, RAM and I/Os will remain in their previous states until being
Sleep
Wake-up
T1
CPU CLK
Reset
Tw
FIG. 1
T1 = 1 / ( FCPU ), Tw ≧ 65536 x T1
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
6
SEP. 19, 2001
Version: 1.5
SPCR02A
7. ELECTRICAL SPECIFICATIONS
7.1. Absolute Maximum Ratings
Characteristics
Symbol
Ratings
DC Supply Voltage
V+
< 7.0V
Input Voltage Range
VIN
-0.5V to V+ + 0.5V
Operating Temperature
TA
-10℃ to +70℃
TSTO
-50℃ to +150℃
Storage Temperature
Note: Stresses beyond those given in the Absolute Maximum Rating table may cause operational errors or damage to the device.
For normal operational
conditions see AC/DC Electrical Characteristics.
7.2. DC/AC Characteristics
Characteristics
Limit
Symbol
Min.
Typ.
Max.
Unit
Test Condition
Operating Voltage
VDD
2.4
-
5.5
V
Operating Current
IOP
-
4.0
10
mA
FOSC = 4.0MHz @ 5.0V, no load
Standby Current
ISTBY
-
-
2.0
µA
VDD = 5.0V
OSC frequency
FOSC
-
3.0
6.0
MHz
VDD = 5.0V
Audio output current
IAUD
-
-1.2
-
mA
VDD = 5.0V
Input high level
VIH
3.0
-
-
V
VDD = 5.0V
Input Low level
VIL
-
-
0.8
V
VDD = 5.0V
IOH
-1.0
-
-
mA
IOL
4.0
-
-
mA
RIN
-
30
-
Kohm
Pull Low or Pull High
FCPU
-
-
4.0
MHz
VDD = 3.0V
Output high I
IOB, IOC, IOD
Output sink I
IOB, IOC, IOD
Input resistor
IOB, IOC, IOD
OSC frequency
VDD = 5.0V
VOH = 4.2V
VDD = 5.0V
VOL = 0.8V
7.3. The Relationship between the ROSC and the FCPU
7.3.1. VDD = 3.0V, TA = 25℃
7.3.2. VDD = 4.5V, TA = 25℃
SPCR02A
SPCR02A
6
5
3
Fosc ( MHz )
Fosc ( MHz )
4
2
1
4
3
2
1
0
0
200
400
600
0
800
0
Rosc ( Kohms )
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
200
400
600
800
R o s c ( K o hm s )
7
SEP. 19, 2001
Version: 1.5
SPCR02A
8. APPLICATION CIRCUIT
MIC
Input
R2
4.7K
R4
200K
VDD
C1
0.1 µ
C2
0.1 µ
R3
100K
C4
0.22 µ
R1
43K
47µ
C3
0.1 µ
68p
VDD
IOC0
IOC0
IOD0
IOC3
IOC6
IOC7
IOD0
IOD7
IOC3
IOC6
IOC7
IOD7
AUD1
SPCR02A
ROSC
RESET
VSS
MIC
OPIN
OPOUT
8050
Speaker
Q1
VDD
Speaker
Q2
SDA
ALC
8050
SPRS512C
SDA
SCL
VDD
IOB0
SCL
CSB
AUD2
IOB0
IOB3
CSB
VDD
IOB3
IOB6
IOB7
VSS
IOB6
IOB7
Version: 1.5
Proprietary & Confidential
SEP. 19, 2001
8
© Sunplus Technology Co., Ltd.
SPCR02A
9. PACKAGE/PAD LOCATIONS
9.1. PAD Assignment
Chip Size: 2220µm x 2120µm
This IC substrate should be connected to VSS
Note1: Chip size included scribe line.
Note2: The 0.1µF capacitor between VDD and VSS should be placed to IC as close as possible.
9.2. Ordering Information
Product Number
Package Type
SPCR02A-nnnnV-C
Chip form
Note1: Code number (nnnnV) is assigned for customer.
Note2: Code number (nnnn = 0000 - 9999); version (V = A - Z).
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
9
SEP. 19, 2001
Version: 1.5
SPCR02A
9.3. PAD Locations
PAD No.
PAD Name
X
Y
1
IOB6
-915
518
2
IOB7
-917
288
3
VSS
-897
63
4
RESET
-833
-807
5
IOD7
-669
-825
6
IOD6
-502
-825
7
IOD5
-345
-825
8
IOD4
-175
-825
9
IOD3
-14
-825
10
VDD
152
-832
11
ROSC
304
-821
12
AUD2
465
-821
13
MIC
614
-821
14
ALC
775
-821
15
OPIN
925
-821
16
OPOUT
908
-620
17
AUD1
891
-451
18
IOD2
904
-290
19
IOD1
904
-121
20
IOD0
935
106
21
SDA
937
333
22
SCL
937
557
23
CSB
613
893
24
IOC0
474
892
25
IOC1
313
895
26
IOC2
176
894
27
IOC3
15
893
28
IOC6
-119
894
29
IOC7
-278
893
30
IOB0
-437
898
31
IOB1
-569
897
32
IOB2
-742
903
33
IOB3
-908
901
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
10
SEP. 19, 2001
Version: 1.5
SPCR02A
10. DISCLAIMER
The information appearing in this publication is believed to be accurate.
Integrated circuits sold by Sunplus Technology are covered by the warranty and patent indemnification provisions stipulated in the terms of
sale only.
SUNPLUS makes no warranty, express, statutory implied or by description regarding the information in this publication or
regarding the freedom of the described chip(s) from patent infringement.
MERCHANTABILITY OR FITNESS FOR ANY PURPOSE.
prices at any time without notice.
FURTHERMORE, SUNPLUS MAKES NO WARRANTY OF
SUNPLUS reserves the right to halt production or alter the specifications and
Accordingly, the reader is cautioned to verify that the data sheets and other information in this
publication are current before placing orders.
Products described herein are intended for use in normal commercial applications.
Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are
specifically not recommended without additional processing by SUNPLUS for such applications.
Please note that application circuits
illustrated in this document are for reference purposes only.
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
11
SEP. 19, 2001
Version: 1.5
SPCR02A
11. REVISION HISTORY
Date
Revision #
Description
NOV. 28, 1997
1.0
Original
DEC. 27, 1997
1.1
Modify error.
Page
IOB4 -> IOB6, IOB5 -> IOB7, IOC4 -> IOC6, IOC5 -> IOC7
FEB. 06, 1998
1.2
Modify error.
IOB4 -> IOB6, IOB5 -> IOB7, IOC4 -> IOC6, IOC5 -> IOC7
AUG. 18, 1998
1.3
Correction error.
DEC. 15, 1999
1.4
1. Modify Format
2, 3, 7
2. Add PIN No.
3. Add “DISCLAIMER”
SEP. 19, 2001
1.5
1. Modify operating voltage: 2.4V - 3.4V -> 2.4V - 3.6V
3
2. Correct chip size
9
3. Add Note1 and Note2 in the “9.1 PAD Assignment”
9
4. Renew to a new document format
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
12
SEP. 19, 2001
Version: 1.5