AD6311 1/8- to 1/16 Duty VFD Controller/Driver Features General Description - 4-pin serial interface - Key scanning (12x4 matrices) - Programming display modes (16-digit & 12segment to 8-digit & 20-segment) - Programming dimming step - High-voltage output (VDD-35V max) - 5 channels LED ports - 4-pin general-purpose input port - Built-in oscillator - No external resistor necessary for driver outputs The AD6311 is a VFD (Vacuum Fluorescent Display) controller/driver that is driven on a 1/8- to 1/16 duty factor (include key scan). It consists of 12 segment/key scan output lines, 8 grid output lines, 8 segment/grid output drive lines, a display memory, a control circuit, and a key scan circuit. Serial data is input to the AD6311 through a four-line serial interface. Grid6 Grid7 Grid8 Seg20 / Grid9 Seg19 / Grid10 VEE VDD Seg18 / Grid11 Seg17 / Grid12 Seg16 / Grid13 Seg15 / Grid14 Seg14 / Grid15 Seg13 / Grid16 39 38 37 36 35 34 33 32 31 30 29 28 27 Pin Assignments Seg4 / KS4 49 17 Seg3 / KS3 LED1 50 16 Seg2 / KS2 VSS 51 15 Seg1 / KS1 OSC 52 14 VDD 13 18 12 48 LED2 Key4 LED3 Key3 Seg5 / KS5 11 Seg6 / KS6 19 Key2 20 47 10 46 LED4 9 LED5 STB Seg7 / KS7 Key1 Seg8 / KS8 21 8 22 45 7 44 VDD NC Grid1 CLK Seg9 / KS9 6 Seg10 / KS10 23 5 24 43 DIN 42 Grid2 DOUT Grid3 4 Seg11 / KS11 Sw4 25 3 41 2 Grid4 Sw3 Seg12 / KS12 Sw2 26 1 40 Sw1 Grid5 Use all the power pins. This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product. Rev. A5 Dec 29, 2003 1/11 AD6311 1/8- to 1/16 Duty VFD Controller/Driver Pin Descriptions Symbol Name DIN Data input DOUT Data output STB Strobe CLK Clock input OSC Oscillator pin Seg1/KS1 to Seg12/KS12 Grid1 to Grid8 Seg13/Grid16 to Seg20/Grid9 LED1 to LED5 KEY1 to KEY4 No. High-voltage output (Grid) High-voltage output (Segment/grid) Key data input Input serial data at rising edge of shift clock, starting from the low order bit. Output serial data at the falling edge of the shift 5 clock, starting from low order bit. This is N-ch open-drain output pin. Initializes serial interface at the rising or falling edge of the AD6311. It then waits for reception of a command. Data input after STB falling is processed as a command. While command data is 9 processed, current processing is stopped, and the serial interface is initialized. While STB is high, CLK is ignored. Reads serial data at the rising edge, and outputs 8 data at the falling edge. Connect resistor in between this pin and Vdd to set 52 up the oscillation frequency. Multi-function pins, Segment output pins (Dual 15 to 26 function as key scan source) 37 to 44 Grid output pins 27 to 32 These pins are selectable for segment or grid 35, 36 driving. 46 to 50 CMOS output Data input to these pins is latched at the end of the 10 to 13 display cycle. 14, 33, 45 Logic power supply 6 High-voltage output LED output Description VDD Logic power VSS Logic ground 51 Connect this pin to system GND. VEE Pull-down level 34 SW1 to SW4 Switch input 1 to 4 NC NC 7 Driver power supply These pins constitute a 4-bit general-purpose input port. No connection Ordering Information AD6311X X X Package Lead Packing Q: QFP-52L Blank: Normal F: Lead Free Blank : Tray Anachip Corp. www.anachip.com.tw Rev. A5 Dec 29, 2003 2/11 AD6311 1/8- to 1/16 Duty VFD Controller/Driver Block Diagram R OSC KEY1 to KEy4 SW1 to SW4 Timing generator key scan Key data memory (4X2) 4 4 4-bit latch 8 5-bit latch 8 Segment/grid driver STB VDD 12 20 Seg1 Seg12 Seg13/Grid16 Seg20/Grid9 8 16 8 Grid driver CLK Display memory 20 bitX16Words Data selector Serial I/F 16-bit shift register DOUT 20-bit output latch DIN Segment driver Dimming circuit Command decoder Grid1 Grid8 VDD Vss VEE (+5V) (0V) (-30V) LED1 LED5 Anachip Corp. www.anachip.com.tw Rev. A5 Dec 29, 2003 3/11 AD6311 1/8- to 1/16 Duty VFD Controller/Driver Absolute Maximum Ratings Parameter Logic supply voltage Driver supply voltage Logic input voltage VFD driver output voltage LED driver output current VFD driver output current Operating ambient temperature Storage temperature Symbol VDD VEE VI1 VO2 IO1 IO2 TOPT TSTG Operating Conditions Parameter Logic supply voltage High-level input voltage Low-level input voltage Driver supply voltage Symbol VOH1 VOL1 VOL2 IOH21 High-level output current IOH22 Driver leakage current Output pull-down resistor High-level input voltage Low-level input voltage IOLEAK RL VIH VIL Parameter Oscillation frequency Maximum clock frequency Clock pulse width Strobe pulse width Data setup time Data hold time Clock-strobe time Wait time Unit V V V V mA mA ℃ ℃ Conditions Min. 4.5 0.7·VDD 0 0 Typ. 5 Max. 5.5 VDD 0.3xVDD VDD-35 Unit V V V V (Ta=0 to 70℃, VDD=4.5 to 5.5V, VSS=0V, VEE=VDD-35V) Parameter High-level output voltage Low-level output voltage Low-level output voltage High-level output current AC Characteristics Rating -0.5 to +7.0 VDD +0.5 to VDD -40 -0.5 to VDD +0.5 VEE-0.5 to VDD +0.5 +15 -40(grid) –15 (segment) -25 to +85 -50 to +125 (TA=0 to +70℃,VSS=0V) Symbol VDD VIH VIL VEE DC Characteristics (TA=25℃,VSS=0V ) Conditions LED1-LED5,IOH1=-1mA LED1-LED5,IOL1=12mA DOUT,IOL2=2mA VO=VDD-2V,Seg1 to Seg12 VO=VDD-2V,Grid 1 to Grid8, Seg13/Grid16 to Seg20/Grid9 VO=VDD-35V, driver off Driver output Min. 0.9VDD Typ. Max. -3 Unit V V V mA -15 mA 1 0.4 50 0.7VDD 100 Min. 350 Typ. 500 -10 150 0.3VDD μA kΩ V V (Ta=0 to +70℃,VDD=4.5 to 5.5 V) Symbol fOSC fmax. PWCLK PWSTB tSETUP tHOLD tCLK-STB tWAIT Conditions R=51 kΩ Duty=50% CLK↑→STB↑ CLK↑→CLk↓(Note) 500 1 100 100 1 1 Max. 650 1 Unit KHZ MHZ ns µs ns ns µs µs Note: Refer to page 8. Anachip Corp. www.anachip.com.tw Rev. A5 Dec 29, 2003 4/11 AD6311 1/8- to 1/16 Duty VFD Controller/Driver Function Description 1.0 Command A command sets the display mode and status of the VFD driver. The first 1 byte input to the AD6311 through the Din pin after the STB pin has fallen is regarded as a command. If STB is made high while a command/data is transmitted, serial communication is initialized, and the command/data being transmitted is invalid (however, the command/data already transmitted remains valid). 1.1 Display mode setting command This command initializes the AD6311 and selects the number of segments and number of grids (8 grid & 20 segments to 16 grid & 12 segments). When this command is executed, display is forcibly turned off, and key scanning is also stopped. To resume display, a display ON command must be executed. If the same mode is selected, however, nothing is performed. LSB MSB 0 0 - - b3 b2 b1 b0 Selects display mode 0xxx : 8 digits, 20 segments 1000: 9 digits, 19 segments 1001: 10 digits, 18 segments 1010: 11 digits, 17 segments 1011: 12 digits, 16 segments 1100: 13 digits, 15 segments 1101: 14 digits, 14 segments 1110: 15 digits, 13 segments 1111: 16 digits, 12 segments Don't care On power application, the 16-digit, 12-segment mode is selected. 1.2 Data setting command This command sets data write and data read modes. On power application, the normal operation mode and address increment mode are set. MSB 0 LSB 1 - - Don't care b3 b2 b1 b0 Sets data write and read modes. 00: Writes data to display memory. 01: Writes data to LED port. 10: Reads key data. 11: Reads SW data. Sets address increment mode (display memory). 0: Incremenets address after data has been written. 1: Fixes address. Sets test mode 0: Normal operation 1: Test mode Anachip Corp. www.anachip.com.tw Rev. A5 Dec 29, 2003 5/11 AD6311 1/8- to 1/16 Duty VFD Controller/Driver 1.3 Address setting command This command sets an address of the display memory. If address 30H or higher is set, the data is ignored, until a correct address is set. On power application, the address is set to 00H. MSB 1 LSB 1 b5 b4 b3 b2 b1 b0 Address (00H-2FH) 1.4 Display control command MSB LSB 1 0 - - b3 b2 b1 b0 Sets dimming quantity. 000: Sets pulse width to 1/16. 001: Sets pulse width to 2/16. 010: Sets pulse width to 4/16. 011: Sets pulse width to 10/16. 100: Sets pulse width to 11/16. 101: Sets pulse width to 12/16. 110: Sets pulse width to 13/16. 111: Sets pulse width to 14/16. Don't care Tums on/off display. 0: Display off (key scan continues ) 1: Display on On power application, the 1/16-pulse width is set, the display is turned off and key scanning is stopped. 2.0 Display RAM Address and Display Mode The display RAM stores the data transmitted from an external device to the AD6311 through the serial interface, and is assigned addresses as follows, in units of 8 bits: Seg8 Seg1 Seg4 00 HU 00 HL 03 HL 03 HU 06 HL 06 HU 09 HL 09 HU 0 CHL 0 CHU 0 FHL 0 FHU 12 HL 12 HU 15 HL 15 HU 18 HL 18 HU 1 BHL 1 BHU 1 EHL 1 EHU 21 HL 21 HU 24 HL 24 HU 27 HL 27 HU 2 AHL 2 AHU 2 DHL 2 DHU b0 XX HL b3 b4 XXHU Seg12 01 HL 04 HL 07 HL 0 AHL 0 DHL 10 HL 13 HL 16 HL 19 HL 1 CHL 1 FHL 22 HL 25 HL 28 HL 2 BHL 2 EHL Seg16 01 HU 04 HU 07 HU 0 AHU 0 DHU 10 HU 13 HU 16 HU 19 HU 1 CHU 1 FHU 22 HU 25 HU 28 HU 2 BHU 2 EHU 02 HL 05 HL 08 HL 0 BHL 0 EHL 11 HL 14 HL 17 HL 1 AHL 1 DHL 20 HL 23 HL 26 HL 29 HL 2 CHL 2 FHL Seg20 GRID1 GRID2 GRID3 GRID4 GRID5 GRID6 GRID7 GRID8 GRID9 GRID10 GRID11 GRID12 GRID13 GRID14 GRID15 GRID16 b7 Anachip Corp. www.anachip.com.tw Rev. A5 Dec 29, 2003 6/11 AD6311 1/8- to 1/16 Duty VFD Controller/Driver Lower 4 bits Higher 4 bits Only the lower 4 bits of the addresses assigned to Seg17 through Seg20 are valid, and the higher 4 bits are ignored. 3.0 LED Port Data is written to the LED port by a write command, starting from the least significant bit of the port. When a bit of this port is 0, the corresponding LED lights; when the bit is 1, the LED goes off . The data of bits 6 through 8 is ignored. MSB - LSB - - b4 b3 b2 b1 b0 LED1 Don't care LED2 LED3 LED4 LED5 On power application, all the LEDs remain dark. 4.0 Key Matrix and Key-Input data Storage RAM The key matrix is of 12×4 configuration, as shown below. KEY1 KEY2 KEY3 Seg12/KS12 Seg11/KS11 Seg10/KS10 Seg9/KS9 Seg8/KS8 Seg7/KS7 Seg6/KS6 Seg5/KS5 Seg4/KS4 Seg3/KS3 Seg2/KS2 Seg1/KS1 KEY4 The data of each key is stored as illustrated below, and is read by a read command, starting from the least significant bit. When the most significant bit of data (Seg12 b7) has been read, the least significant bit of the next data (Seg1 b0) is read. KEY1...KEY4 KEY1...KEY4 Seg1/KS1 Seg2/KS2 Seg3/KS3 Seg4/KS4 Seg5/KS5 Seg6/KS6 Seg7/KS7 Seg8/KS8 Seg9/KS9 Seg10/KS10 Seg11/KS11 Seg12/KS12 b0--------b3 b4--------b7 Anachip Corp. www.anachip.com.tw Reading sequence Rev. A5 Dec 29, 2003 7/11 AD6311 1/8- to 1/16 Duty VFD Controller/Driver 5.0 SW Data The SW data is read by a read command, starting from the least significant bit. Bits 5 through 8 of the SW data are 0. MSB LSB 0 0 0 0 b3 b2 b1 b0 SW1 SW2 SW3 SW4 Timing Diagram (1) Serial Communication Format Reception (command/write data) If data continues STB b0 DIN CLK b1 1 b2 2 b6 3 b7 7 8 Transmission (read data) STB DIN b0 b1 b2 b3 b4 b5 b6 b7 CLK 1 2 3 4 5 6 7 8 DOUT Data reading command is set. tWAIT (Note) 1 2 3 4 5 6 b0 b1 b2 b3 b4 b5 Data reading starts. Because the DOUT pin is an N-ch, open-drain output pin, be sure to connect an external pull-up resistor to this pin (1kΩ to 10 kΩ). Note : When data is read, a wait time tWAIT of 1 μs is necessary since the rising of the eighth clock that has set the command, until the falling of the first clock that has read the data. Anachip Corp. www.anachip.com.tw Rev. A5 Dec 29, 2003 8/11 AD6311 1/8- to 1/16 Duty VFD Controller/Driver (2) Key Scanning and Display Timing TDISP ≅ 500μs SEG Output Key scan data DIG1 DIG2 DIG3 DIGn DIG1 Grid1 Grid2 1/16 TDISP Gird3 Gridn 1 frame = TDISP× (n+1) One cycle of key scanning consists of two frames, and data of 12× 4 matrices is stored in RAM. AC characteristic waveform fosc OSC 50% PWSTB STB CLK PWCLK PWCLK tSETUP tHOLD tCLK-STB DIN tPZL tPLZ DOUT Sn/Gn 90% tTZH tTHZ 10% Anachip Corp. www.anachip.com.tw Rev. A5 Dec 29, 2003 9/11 AD6311 1/8- to 1/16 Duty VFD Controller/Driver Applications Updating display memory by incrementing address STB CLK DIN Command 1 Command 2 Command 3 Data 1 Data n Command 4 Command 1: sets display mode Command 2: sets data(write data to display memory) Command 3: sets address Data 1 to n: transfers display data (48 bytes max.) Command 4: controls display Updating specific display memory STB CLK DIN Command 1 Command 2 Data Command 2 Data Command 1: sets data Command 2: sets address Data: display data Anachip Corp. www.anachip.com.tw Rev. A5 Dec 29, 2003 10/11 AD6311 1/8- to 1/16 Duty VFD Controller/Driver Package Information 52 pins QFP dimension Unit: mm 17.2 ± 0.5 2.7(MAX.) 14.0 ± 0.5 39 27 40 26 14.0 17.2 ± 0.5 ± 0.5 52 14 1 13 0.15 TYP. 1.6 TYP. 0.4 TYP. 1.0 TYP. 0.88 TYP. Marking Information Top view Part Number AC AD6311 X XX XX XXX Logo Blank: Nomal F: Lead Free Package ID code: internal Nth week: 01~52 Year: "01" = 2001 "02" = 2002 QFP52 Anachip Corp. www.anachip.com.tw Rev. A5 Dec 29, 2003 11/11