PT6313-S VFD Driver/Controller IC DESCRIPTION PT6313-S is a Vacuum Fluorescent Display (VFD) Controller driven on a 1/4 to 1/8 duty factor. Eight segment output lines, 4 grid output lines, 4 segment/grid output drive lines, one display memory, control circuit, key scan circuit are all incorporated into a single chip to build a highly reliable peripheral device for a single chip micro computer. Serial data is fed to PT6313-S via a three-line serial interface. It is housed in a 28 pins, SOP. APPLICATION FEATURES • • • • • • • • CMOS Technology Low Power Consumption Key Scanning (8 x 2 matrix) Multiple Display Modes: (8 Segments, 8 Digits to 12 Segments, 4 Digits) 8-Step Dimming Circuitry Serial Interface for Clock, Data Input, Data Output, Strobe Pins No External Resistors Needed for Driver Outputs Available in 28 pins, SOP • Microcomputer Peripheral Devices BLOCK DIAGRAM Tel: 886-66296288‧Fax: 886-29174598‧ http://www.princeton.com.tw‧2F, No. 233-1, Baociao Rd., Sindian Dist., New Taipei City 23145, Taiwan PT6313-S APPLICATION CIRCUIT Note: The capacitor (0.1µF) connected between the GND and the VDD pins must be located as close as possible to the PT6313-S chip. V1.3 2 June 2013 PT6313-S ORDER INFORMATION Valid Part Number PT6313-S Package Type 28pins, SOP, 300mil Top Code PT6313-S PIN CONFIGURATION V1.3 3 June 2013 PT6313-S PIN DESCRIPTION Pin Name I/O CLK I STB I K1 to K2 I VSS VDD - SG1/KS1 to SG8/KS8 O VEE SG9/GR8 to SG12/GR5 GR4 to GR1 O O OSC I DOUT O DIN I V1.3 Description Clock Input Pin This pin reads serial data at the rising edge and outputs data at the falling edge. Serial Interface Strobe Pin The data input after the STB has fallen is processed as a command. When this in is “HIGH”, CLK is ignored. Key Data Input Pins The data inputted to these pins is latched at the end of the display cycle. Logic Ground Pin Logic Power Supply High-Voltage Segment Output Pins Also acts as the Key Source. Pull-Down Level High-Voltage Segment Output Pins High-Voltage Grid Output Pins Oscillator Input Pin A resistor is connected to this pin to determine the oscillation frequency. Data Output Pin (N-Channel, Open-Drain) This pin outputs serial data at the falling edge of the shift clock (starting from the lower bit). Data Input Pin This pin inputs serial data at the rising edge of the shift clock (starting from the lower bit). 4 Pin No. 1 2 3, 4 5, 25 6, 24 7 to 14 15 16 to 19 20 to 23 26 27 28 June 2013 PT6313-S FUNCTION DESCRIPTION COMMANDS Commands determine the display mode and status of PT6313-S. A command is the first byte (b0 to b7) inputted to PT6313-S via the DIN Pin after STB Pin has changed from “HIGH” to “LOW” State. If for some reason the STB Pin is set to “HIGH” while data or commands are being transmitted, the serial communication is initialized, and the data/commands being transmitted are considered invalid. COMMAND 1: DISPLAY MODE SETTING COMMANDS PT6313-S provides 4 display mode settings as shown in the diagram below: As stated earlier a command is the first one byte (b0 to b7) transmitted to PT6313-S via the DIN Pin when STB is “LOW”. However, for these commands, the bits 4 to 6 (b3 to b5) are ignored, bits 7 & 8 (b6 to b7) are given a value of “0”. The Display Mode Setting Commands determine the number of segments and grids to be used (1/4 to 1/8 duty, 12 to 8 segments). When Power is turned “ON”, the 8-digit, 8-segment mode is selected. MSB 0 0 - - - b2 Not Relevant b1 LSB b0 Display Mode Settings: 000: 4 digits, 12 segments 001: 5 digits, 11 segments 010: 6 digits, 10 segments 011: 7 digits, 9 segments 100: 8 digits, 8 segments DISPLAY MODE AND RAM ADDRESS Data transmitted from an external device to PT6313-S via the serial interface are stored in the Display RAM and are assigned addresses. The RAM Addresses of PT6313-S are given below in 8 bits unit. SG1 SG4 SG5 00HL 02HL 04HL 06HL 08HL 0AHL 0CHL 0EHL 00HU 02HU 04HU 06HU 08HU 0AHU 0CHU 0EHU b0 V1.3 SG8 SG9 SG12 01HL 03HL 05HL 07HL 09HL 0BHL 0DHL 0FHL b3 b4 b7 xxHL xxHU Lower 4 bits Higher 4 bits 5 DIG1 DIG2 DIG3 DIG4 DIG5 DIG6 DIG7 DIG8 June 2013 PT6313-S COMMAND 2: DATA SETTING COMMANDS The Data Setting Commands executes the Data Write or Data Read Modes for PT6313-S. The Data Setting Command, the bits 5 and 6 (b4, b5) are ignored, bit 7 (b6) is given the value of “1” while bit 8 (b7) is given the value of “0”. Please refer to the diagram below. When power is turned ON, the bit 4 to bit 1 (b3 to b0) are given the value of “0”. MSB 0 1 - - b3 Not Relevant b2 b1 LSB b0 Data Write & Read Mode Settings: 00: Write Data to Display Mode 10: Read Key Data Address Increment Mode Settings (Display Mode): 0: Increment Address after Data has been written 1: Fixed Address Mode Settings: 0: Normal Operation Mode 1: Test Mode PT6313-S KEY MATRIX & KEY INPUT DATA STORAGE RAM PT6313-S Key Matrix consists of 8 x 2 array as shown below: Each data inputted by each key are stored as follows. They are read by a READ Command, starting from the last significant bit. When the most significant bit of the data (SG8, b7) has been read, the least significant bit of the next data (SG1, b0) is read. K1…………K1 SG1/KS1 SG5/KS5 b0………….b1 V1.3 K2…………K3 SG2/KS2 SG6/KS6 b2………….b3 K4…………K5 SG3/KS3 SG7/KS7 b4………….b5 6 K6……………K7 SG4/KS4 SG8/KS8 b6…………….b7 Reading Sequence June 2013 PT6313-S COMMAND 3: ADDRESS SETTING COMMANDS Address Setting Commands are used to set the address of the display memory. The address is considered valid if it has a value of “00H” to “0FH”. If the address is set to 10H or higher, the data is ignored until a valid address is set. When power is turned ON, the address is set at “00H”. Please refer to the diagram below. MSB 1 1 0 0 b3 b2 b1 LSB b0 Address: 00H to 0FH COMMAND 4: DISPLAY CONTROL COMMANDS The Display Control Commands are used to turn ON or OFF a display. It also used to set the pulse width. Please refer to the diagram below. When the power is turned ON, a 1/16 pulse width is selected and the displayed is turned OFF. MSB 1 0 - - b3 Not Relevant b2 b1 LSB b0 Dimming Quantity Settings: 000: Pulse width = 1/16 001: Pulse width = 2/16 010: Pulse width = 4/16 011: Pulse width = 10/16 100: Pulse width – 11/16 101: Pulse width = 12/16 110: Pulse width = 13/16 111: Pulse width = 14/16 Display Settings: 0: Display Off 1: Display On V1.3 7 June 2013 PT6313-S SCANNING AND DISPLAY TIMING The Key Scanning and display timing diagram is given below. The data of the 8 x 2 matrix is stored in the RAM. V1.3 8 June 2013 PT6313-S SERIAL COMMUNICATION FORMAT The following diagram shows the PT6313-S serial communication format. The DOUT Pin is an N-channel, open-drain output pin; therefore, it is highly recommended that an external pull-up resistor (1KΩ to 10KΩ) must be connected to DOUT. RECEPTION (DATA/COMMAND WRITE) TRANSMISSION (DATA READ) where: twait (waiting time) > 1µs It must be noted that when the data is read, the waiting time (twait) between the rising of the eighth clock that has set the command and the falling of the first clock that has read the data is greater or equal to 1µs V1.3 9 June 2013 PT6313-S SWITCHING CHARACTERISTIC WAVEFORM PT6313-S Switching Characteristics Waveform is given below. where: PW CLK (Clock Pulse Width) ≥ 400ns t setup (Data Setup Time) ≥ 100ns tCLK-STB (Clock - Strobe Time) ≥ 1µs tTZH (Grid Rise Time) ≤ 0.5µs (VDD=5V) tTZH (Grid Rise Time) ≤ 1.0µs (VDD=3.3V) tTZH (Segment Rise Time) ≤ 2.0µs (VDD=5V) tTZH (Segment Rise Time) ≤ 3.0µs (VDD=3.3V) fosc=Oscillation Frequency V1.3 PW STB (Strobe Pulse Width) ≥ 1µs thold (Data Hold Time) ≥ 100ns tTHZ (Fall Time) ≤ 150µs t PZL (Propagation Delay Time) ≤ 100ns tPLZ (Propagation Delay Time) ≤ 400ns 10 June 2013 PT6313-S APPLICATIONS Display memory is updated by incrementing addresses. Please refer to the following diagram. where: Command 1: Display Mode Setting Command Command 2: Data Setting Command Command 3: Address Setting Command Data 1 to n: Transfer Display Data (16 Bytes max.) Command 4: Display Control Command The following diagram shows the waveforms when updating specific addresses. where: Command 2: Data Setting Command Command 3: Address Setting Command Data: Display Data V1.3 11 June 2013 PT6313-S RECOMMENDED SOFTWARE FLOWCHART Notes: 1. Command 1: Display Mode Commands 2. Command 2: Data Setting Commands 3. Command 3: Address Setting Commands 4. Command 4: Display Control Commands 5. When IC power is applied for the first time, the contents of the Display RAM are not defined; thus, it is strongly suggested that the contents of the Display RAM must be cleared during the initial setting. V1.3 12 June 2013 PT6313-S ABSOLUTE MAXIMUM RATINGS (Unless otherwise stated, Ta=25℃, GND=0V) Parameter Logic Supply Voltage Driver Supply Voltage Logic Input Voltage VFD Driver Output Voltage VFD Driver Output Current Operating Temperature Storage Temperature Symbol VDD VEE VI VO IOVFD Topr Tstg Ratings -0.5 to +7 VDD +0.5 to VDD -40 -0.5 to VDD +0.5 VEE -0.5 to VDD +0.5 -40 (Grid) -15 (Segment) -40 to +85 -40 to +150 Unit V V V V mA ℃ ℃ RECOMMENDED OPERATING RANGE (Unless otherwise stated, Ta=-20 to +70℃, GND=0V) Parameter Logic Supply Voltage High-Level Input Voltage Low-Level Input Voltage Driver Supply Voltage V1.3 Symbol VDD VIH VIL VEE 13 Min. 3.0 0.7VDD 0 VDD -35 Ratings Typ. 5 - Max. 5.5 VDD 0.3VDD 0 Unit V V V V June 2013 PT6313-S ELECTRICAL CHARACTERISTICS (Unless otherwise stated, VDD=5V, GND=0V, VEE=VDD-35 V, Ta=25℃) Parameter Symbol Test Condition DOUT, Low-Level Output Voltage VOLDOUT IOLDOUT=4mA VO=VDD -2V High-Level Output Current IOHSG SG1/KS1 to SG8/KS8 VO=VDD -2V High-Level Output Current IOHGR GR1 to GR4, SG9/GR8 to SG12/GR5 High-Level Input Voltage VIH Low-Level Input Voltage VIL Oscillation Frequency fosc R=68KΩ Input Current II VI=VDD or VSS Dynamic Current Consumption IDDdyn Under no load Display OFF (Unless otherwise stated, VDD=3.3V, GND=0V, VEE=VDD-35 V, Ta=25℃) Parameter Symbol Test Condition DOUT, Low-Level Output Voltage VOLDOUT IOLDOUT=4mA VO=VDD -2V High-Level Output Current IOHSG SG1/KS1 to SG8/KS8 VO=VDD -2V High-Level Output Current IOHGR GR1 to GR4, SG9/GR8 to SG12/GR5 High-Level Input Voltage VIH Low-Level Input Voltage VIL Oscillation Frequency fosc R=68KΩ Input Current II VI=VDD or VSS Dynamic Current Consumption IDDdyn Under no load Display OFF V1.3 14 Min. Typ. Max. Unit - - 0.4 V -3 - - mA -15 - - mA 0.7VDD 350 - 500 - VDD 0.3VDD 650 ±1 5 V V KHz μA mA Min. Typ. Max. Unit - - 0.4 V -1.5 - - mA -6 - - mA 0.7VDD 350 - 500 - VDD 0.3VDD 650 ±1 3 V V KHz μA mA June 2013 PT6313-S PACKAGE INFORMATION 28-PIN, SOP, 300MIL Symbol A A1 b c D E E1 e L θ Min. 0.10 0.31 0.20 Nom. 17.90 BSC 10.30 BSC 7.50 BSC 1.27 BSC - 0.38 0° Max. 2.65 0.30 0.51 0.33 1.27 8° Notes: 1. All dimensions are in millimeters. 2. Refer to DEDEC MS-013AE V1.3 15 June 2013 PT6313-S IMPORTANT NOTICE Princeton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and to discontinue any product without notice at any time. PTC cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a PTC product. No circuit patent licenses are implied. Princeton Technology Corp. 2F, 233-1, Baociao Road, Sindian Dist., New Taipei City 23145, Taiwan Tel: 886-2-66296288 Fax: 886-2-29174598 http://www.princeton.com.tw V1.3 16 June 2013