Product Datasheet 2.1.1 Conan® OCC8001-02 Electrical Bypass RX Network Receiver Transmitter SR0 Source Data In 0 SPDIF In Source Data Out 0 SPDIF Out SX0 SR1 Source Data In 1 Source Data Out 1 SX1 SR2 Source Data In 2 Source Data Out 2 SX2 Source Data Router XTO Oscillator PLL XTI FILT VREF Clock Manager Audio Sync Control Unit VDDD GNDD I2C/SPI Interface For SPI /CS For I2C : AD1 SDIN AD0 RMCK FSY SCK /RST Control Port SDOUT SCL SDA SCL TX /INT ERROR SER IN SER OUT Block Diagram VDDA GNDA THE D2B PROTOCOL The Digital Data Bus (D2B) is a networking protocol for automotive multimedia data communication integrating digital audio, video and other high data rate synchronous or asynchronous signals, with the control data for network management protocols and APIs. The protocol enables robust single cable interconnection and compatible interoperation of in-car AV multimedia and ITS devices, such as Radio Head Units, CD Changer, CD-ROM, GPS Navigation, Voice Control, Car Telephones, TV and others. LCD DISPLAY MOBILE TELEPHONE RADIO HEAD-UNIT GPS ENGINE DVD PLAYER VOICE I/O DSP AMPLIFIER VEHICLE EMERGENCY SYSTEM (VEMS) FIXED TELEPHONE HANDSET CD-CHANGER Fully compliant with D2B Mode0 Protocol 4.2336Mbps source data rate (equivalent to 3 x 16bit stereo audio channels) Integration of source and control data Multiple source data channels SPDIF audio port I2C and SPI compatible control port Flexible source data routing Implements all low-level communication tasks: Communication Protocol (subframes, synchronisation,...) Communication Management (CRC, ACK, NAK, retries,...) Transparent channels Easy hardware and software implementation Few external components required CONAN® - OCC8001-02 The OCC8001-02 transceiver is a pin compatible successor of the OCC8001-01 with identical functionality, featuring decreased power and reduced EMI The CONAN® is an advanced CMOS device which enhances network design by integrating source data routing and communication protocol management. handles multiple source data channels via common serial interface standards, CONTROL PORT Device control is handled via the control port, which can be configured as either an I2C or SPI compliant interface. The choice of interface is specified during hardware resets. NETWORK INTERFACE Data is organized in frames which are transmitted at the system sampling frequency. Frames contain source and control information and are further divided into sub-frames of 8 bytes fields. At the physical level, data is transferred as serial bits with biphase encoding. Control data is constructed into a control frame, which is transferred at a rate of two bits per sub-frame. The control frame comprises 128 bits and requires a block of 48 frames to transmit. SOURCE DATA PORTS Six source data ports are provided, giving the flexibility for multiple data Electrical Bypass Source Data Bypass L RX 64-bit input shift register L R D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 10 11 12 13 14 15 D8 D9 10 11 12 13 14 15 L SR0 32-bit input shift register 32-bit input shift register R R 32-bit input shift register D0 D1 D2 D3 D0 D1 D2 D3 D4 D5 D6 D7 D4 D5 D6 D7 D0 D1 D2 D3 D0 D1 D2 D3 D4 D5 D6 D7 L SR2 64-bit output shift register TX L L SR1 R D4 D5 D6 D7 D0 D1 D2 D3 R D0 D1 D2 D3 D4 D5 D6 D7 D4 D5 D6 D7 R 32-bit output shift register SX0 L R 32-bit output shift register SX1 L R 32-bit output shift register SX2 CONAN® RIT Table sources and destinations to be handled by a single CONAN®. Dim A A1 B C D E E* H H* L a All data ports share a common frame synchronization and serial bit clock. Data can be arranged as Philips I2S, Sony or Matsushita, 16 or 24 bit serial formats. Additionally, SR0 and SX0 can be configured for operation as an IEC-958 (or SPDIF) interface. Source and destination data is routed between the source data ports and the network interface via the Routing Information Table. This allows all data bytes coming from either the network receiver or source input ports to be rearranged, mixed and re-directed to the network transmitter or source output ports. Min. (mm) Max. (mm) 2.35 2.65 0.10 0.30 0.35 0.49 0.23 0.32 17.70 18.10 7.40 7.60 1.27 10.00 10.65 0.25 0.75 0.40 1.27 0 8 a D2B Protocol Data Rate @ ƒs 44.1kHz Mode0 Gross Data Rate Synchronous Data Control Data Max. 11.2 Mb/s Max. 4.6 Mb/s Max. 176 Kb/s Manchester Ring 24 >80pS/node 100 kHz 100 kHz +/- 4 kV HB model +/- 400 V M model <500mW @ 5.5V 5V ± 10% 0 0 -40 C to +85 C 28 SOIC Line Coding Topology Max. nr. of Nodes Ultra Low Jitter Control Port I2C SPI ESD Protection Power Consumption Supply Voltage Temperature Range Package C L Order-information for Conan© Pin 1 B Pin 28 CCE Part: Conan® OCC8001-02 Order number: 2-02-001-01 For further information on any other C&C Electronics products, please visit our Web site or contact us: A1 E A H XXYYZZZ E* OCC8001-2 CONAN D http://www.candc.co.uk Communication & Control Electronics Limited 2 Occam Court, Occam Road The Surrey Research Park Guildford, Surrey. GU2 7YQ United Kingdom Tel: +44-1483-540-222 Fax: +44-1483-540-200 Email: [email protected] ® CONAN Package Outline © Copyright 1998-2000 Communication & Control Electronics Limited Proprietary. All Rights reserved. The C&C Electronics logo, the word 'Conan', the word ‘Super Conan’, the word ‘Cayuga’ and the Conan and Super Conan logos are registered trademarks of C&C Electronics. The word 'D2B' and the D2B logo are trademarks of Philips Electronics NV. All other trademarks used are proprietary of their respective owners. C&C Electronics reserves the right to change this product and its specification without prior notice.