TPS62270 TPS62273 www.ti.com................................................................................................................................................... SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008 2.25 MHz 400-mA Step Down Converter With Selectable VOUT FEATURES 1 • • • • • • • • • High Efficiency Step Down Converter Output Current up to 400 mA VIN Range From 2V to 6V for Li-Ion Batteries With Extended Voltage Range 2.25 MHz Fixed Frequency Operation Pin-Selectable Fixed Output Voltage Power Save Mode for Highest Efficiency Automatic transition between PFM and PWM Mode Voltage Positioning in PFM Mode Typical 15-µA Quiescent Current 100% Duty Cycle for Lowest Dropout Available in 2×2×0,8 mm SON Package Allows <1 mm Solution Height APPLICATIONS • • • • • • VIN = 2 V to 6 V VIN CIN 4.7 mF With an input voltage range of 2.0 V to 6 V the device supports Li-Ion batteries with extended voltage range, and is ideal to power portable applications like mobile phones and other portable equipment. The TPS62270 operates at 2.25 MHz fixed switching frequency and enters Power Save Mode operation at light load currents to maintain high efficiency over the entire load current range. The Power Save Mode is optimized for low output voltage ripple. With the VSEL pin, two different fixed output voltages can be selected. This function features a dynamic voltage scaling for low power processor cores. The TPS62270 is available in a 2 mm × 2 mm, 6-pin SON package. L 2.2 mH VOUT 0.9 V / 1.15 V up to 400 mA SW EN GND The TPS62270 device is a high efficiency synchronous step down DC-DC converter optimized for battery powered portable applications. It provides up to 400 mA output current from a single Li-Ion cell. In the shutdown mode, the current consumption is reduced to less than 1µA. TPS62270 allows the use of small inductors and capacitors to achieve a small solution size. Low Power Processor Supply Cell Phones, Smart-phones Navigation Systems Low Power DSP Supply Portable Media Players Digital Cameras TPS62270DRV DESCRIPTION FB COUT 10 mF COUT VIN CIN U1 VOUT 3.3mm • • • L1 1.15 V 0.9 V VSEL GND 6.5 mm Total area 21.5 mm² 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007–2008, Texas Instruments Incorporated TPS62270 TPS62273 SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION –40°C to 85°C (1) (2) VSEL = 1 VSEL = 0 PACKAGE DESIGNATOR ORDERING(1) TPS62270 1.15 V 0.9 V DRV TPS62270DRV CCX TPS62273 3.3V 2.5V DRV TPS62273DRV CGW PART NUMBER (1) TA OUTPUT VOLTAGE (2) PACKAGE MARKING The DRV (SON2x2) package is available in tape on reel. Add R suffix to order quantities of 3000 parts per reel, add T suffix to order quantities of 250 parts per reel. contact TI for other fixed output voltage options. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) Input voltage range (2) Voltage range at EN, VSEL Voltage on SW Peak output current ESD rating (3) VALUE UNIT –0.3 to 7 V –0.3 to VIN +0.3, ≤7 V –0.3 to 7 V Internally limited A HBM Human body model 2 CDM Charge device model 1 Machine model kV 200 V TJ Maximum operating junction temperature –40 to 125 °C Tstg Storage temperature range –65 to 150 °C (1) (2) (3) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. DISSIPATION RATINGS PACKAGE RθJA POWER RATING FOR TA ≤ 25=C DERATING FACTOR ABOVE TA = 25°C DRV 76°C/W 1300 mW 13 mW/°C RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VIN Supply Voltage 2.0 6 V TA Operating ambient temperature –40 85 °C TJ Operating junction temperature –40 125 °C 2 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 TPS62270 TPS62273 www.ti.com................................................................................................................................................... SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008 ELECTRICAL CHARACTERISTICS Over full operating ambient temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply for condition VIN = EN = 3.6V. External components CIN = 4,7µF 0603, COUT = 10µF 0603, L = 2.0µH, refer to parameter measurement information. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY VIN Input voltage range 2 6 2.5 V ≤ VIN ≤ 6 V 400 2.0 V ≤ VIN ≤ 2.5 V 150 IOUT Output current IOUT = 0 mA, device not switching 15 IQ Operating quiescent current IOUT = 0 mA, device switching with no load, VOUT = 1.15V 18 ISD Shutdown current EN = GND UVLO Undervoltage lockout threshold 0.1 Falling 1.85 Rising 1.95 V mA µA 1 µA V ENABLE, VSEL VIH High level input voltage, EN, VSEL 2 V ≤ VIN ≤ 6 V 1 VIN VIL Low Level Input Voltage, EN, VSEL 2 V ≤ VIN ≤ 6 V 0 0.4 V IIN Input bias Current, EN, VSEL EN, VSEL = GND or VIN 0.01 1.0 µA High side MOSFET on-resistance VIN = VGS = 3.6V, TA = 25°C 240 480 mΩ Low side MOSFET on-resistance VIN = VGS = 3.6V, TA = 25°C 180 380 mΩ Forward current limit MOSFET high-side and low side VIN = VGS = 3.6 V 0.7 0.84 A Thermal shutdown Increasing junction temperature 140 Thermal shutdown hysteresis Decreasing junction temperature 20 V POWER SWITCH RDS(on) ILIMF TSD 0.56 °C OSCILLATOR fSW 2 V ≤ VIN ≤ 6 V Oscillator frequency 2 2.25 2.5 VSEL = 1 1.13 1.15 1.16 7 VSEL = 0 0.88 6 0.9 0.91 4 VSEL = 1 3.23 3.3 3.37 VSEL = 0 2.45 2.5 2.55 MHz OUTPUT TPS62270 VOUT Output voltage PWM TPS62273 VOUT Output voltage in PFM mode, voltage positioning PWM operation, 2 V ≤ VIN ≤ 6 V, FB pin connected to VOUT (1) PWM operation, FB pin connected to VOUT (1) Device in PFM mode VSEL = 1 1.16 VSEL = 0 0.91 VSEL = 1 3.34 VSEL = 0 2.53 tStart Start-up time Time from active EN to reach 95% of VOUT 500 tRamp VOUT ramp up time Time to ramp from 5% to 95% of VOUT 250 Ilkg Leakage Current into SW pin VIN = 3.6 V, VIN = VOUT = VSW, EN = GND (2) 0.1 (1) (2) V V µs µs 1 µA For VIN = VOUT + 0.6 V In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin. Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 Submit Documentation Feedback 3 TPS62270 TPS62273 SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008................................................................................................................................................... www.ti.com PIN ASSIGNMENTS 1 VSEL 2 FB 3 GND 6 Po Pa we d r SW 5 VIN 4 EN Top view DRV package TERMINAL FUNCTIONS TERMINAL NAME I/O DESCRIPTION NO. (SON) VIN 5 PWR VIN power supply pin. GND 6 PWR GND supply pin EN 4 I SW 1 OUT FB 3 I Feedback Pin for the internal regulation loop. Connect the external resistor divider to this pin. In case of fixed output voltage option, connect this pin directly to the output capacitor VSEL 2 I Voltage Select input. Please refer to table ordering information for available output voltage selections. This is the enable pin of the device. Pulling this pin to low forces the device into shutdown mode. Pulling this pin to high enables the device. This pin must be terminated. This is the switch pin and is connected to the internal MOSFET switches. Connect the inductor to this terminal FUNCTIONAL BLOCK DIAGRAM VIN Current Limit Comparator Thermal Shutdown VIN Undervoltage Lockout 1.8V Limit High Side EN PFM Comparator Reference 0.6V VREF FB VREF +1% VSEL Softstart VOUT RAMP CONTROL Gate Driver Anti Shoot-Through Control Stage Error Amp. SW1 VREF Integrator FB RI 1 FB PWM Comp. Limit Low Side RI3 RI..N Zero-Pole AMP. Internal Voltage Setting Network Sawtooth Generator GND Current Limit Comparator 2.25 MHz Oscillator GND 4 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 TPS62270 TPS62273 www.ti.com................................................................................................................................................... SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008 PARAMETER MEASUREMENT INFORMATION TPS6227XDRV VIN VIN CIN L 2.2 mH SW COUT EN 4.7 mF VOUT up to 400 mA 10 mF FB GND High VSEL Low L: MIPSA2520D2R2 2.0 mH CIN: GRM188R60J106M 4.7 mF COUT: GRM188R60J106M 10 mF TYPICAL CHARACTERISTICS Table of Graphs Figure Efficiency vs Output Current Figure 1 Efficiency vs Output Current Figure 2 Output voltage vs Output Current Figure 3 Output Voltage vs Output Current Figure 4 Output Voltage vs Output Current Figure 5 Output Voltage vs Output Current Figure 6 Output Voltage vs Output Current Figure 7 Output Voltage vs Output Current Figure 8 PWM Mode Operation Figure 9 PFM Mode Operation Figure 10 Load Transient Response PFM Mode Figure 11 Load Transient Response PFM/PWM Mode Figure 12 Load Transient Response PFM/PWM Mode Figure 13 VSEL Output Voltage Response Figure 14 Startup in 10 Ω Load at 1.15 V Output Voltage Figure 15 Startup in 100 Ω Load at 0.9 V Output Voltage Figure 16 Quiescent Current vs Input Voltage Figure 17 Shutdown Current vs Input Voltage Figure 18 Static Drain Source On-state Resistance vs Input Voltage Figure 19 Static Drain Source On-state Resistance vs Input Voltage Figure 20 Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 Submit Documentation Feedback 5 TPS62270 TPS62273 SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008................................................................................................................................................... www.ti.com EFFICIENCY vs OUTPUT CURRENT 100 100 VO = 1.15 V VI = 2.7 V 90 80 EFFICIENCY vs OUTPUT CURRENT 80 VI = 2.3 V 70 VI = 5 V Efficiency - % Efficiency - % 70 60 VI = 4.2 V 50 VI = 3.6 V 40 VI = 3.3 V 30 VI = 3.3 V VI = 2.7 V VI = 2.3 V 60 VI = 5 V 50 VI = 4.2 V 40 VI = 3.6 V 30 20 VO = 1.15 V, VSEL = VI, 20 VO = 0.9 V, VSEL = VI, 10 L = 2 mH MIPSA2520D2R2, CO = 10 mF 10 L = 2 mH MIPSA2520D2R2, CO = 10 mF 0 0.00001 0.0001 0.01 0.1 0.001 IO - Output Current - A 0 0.00001 1 0.001 0.01 0.1 IO - Output Current - A Figure 2. OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs OUTPUT CURRENT VI = 4.2 V VI = 2.3 V VI = 2.7 V VI = 5 V VO - Output Voltage (DC) - V VI = 3.6 V PFM MODE, Voltage Positioning VI = 3.3 V 1.15 VI = 3.6 V VI = 4.2 V VI = 5 V VI = 2.3 V VI = 2.7 V VI = 3.3 V VO = 1.15 V, TA = -40°C VO = 1.15 V, TA = 25°C 1.1 0.00001 0.0001 0.01 0.1 0.001 IO - Output Current - A 1 1.1 0.00001 0.0001 Figure 3. 6 1 1.2 PFM MODE, Voltage Positioning 1.15 0.0001 Figure 1. 1.2 VO - Output Voltage (DC) - V VO = 0.9 V 90 Submit Documentation Feedback 0.001 0.01 IO - Output Current - A 0.1 1 Figure 4. Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 TPS62270 TPS62273 www.ti.com................................................................................................................................................... SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008 OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs OUTPUT CURRENT 1.2 0.930 PFM MODE, Voltage Positioning VI = 3.6 V VI = 4.2 V VI = 2.3 V V = 2.7 V I VI = 3.3 V 1.15 0.0001 0.001 0.01 IO - Output Current - A 0.1 VI = 5 V 0.910 VI = 2.3 V V = 2.7 V I VI = 3.3 V 0.900 0.890 VO = 0.9 V, TA = 25°C 0.870 0.00001 1 0.0001 0.001 0.01 IO - Output Current - A Figure 5. Figure 6. OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs OUTPUT CURRENT 0.1 1 0.930 0.930 PFM MODE, Voltage Positioning PFM MODE, Voltage Positioning VI = 3.6 V 0.920 VI = 3.6 V VI = 4.2 V 0.910 VI = 2.3 V VI = 2.7 V VI = 3.3 V 0.900 0.890 0.880 0.870 0.00001 0.1 0.910 VI = 2.3 V VI = 2.7 V VI = 5 V VI = 3.3 V 0.900 0.890 0.880 VO = 0.9 V, TA = -40°C 0.0001 0.001 0.01 IO - Output Current - A VI = 4.2 V 0.920 VI = 5 V VO - Output Voltage (DC) - V VO - Output Voltage (DC) - V VI = 4.2 V 0.880 VO = 1.15 V, TA = 85°C 1.1 0.00001 VI = 3.6 V 0.920 VI = 5 V VO - Output Voltage (DC) - V VO - Output Voltage (DC) - V PFM MODE, Voltage Positioning 1 0.870 0.00001 VO = 0.9 V, TA = 85°C 0.0001 Figure 7. 0.001 0.01 IO - Output Current - A 0.1 1 Figure 8. Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 Submit Documentation Feedback 7 TPS62270 TPS62273 SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008................................................................................................................................................... www.ti.com PWM MODE OPERATION VIN = 3.6 V, VOUT = 1.15 V, IOUT = 150 mA VOUT 50 mV/Div PFM MODE OPERATION VIN = 3.6 V, VOUT = 1.15 V, IOUT = 10 mA VOUT 50 mV/Div SW 2 V/Div SW 2 V/Div IL 200 mA/Div IL 200 mA/Div Time base - 5 ms/Div Time base - 1 ms/Div Figure 9. Figure 10. LOAD TRANSIENT RESPONSE PFM MODE LOAD TRANSIENT RESPONSE PFM/PWM MODE VIN = 3.6 V, VOUT = 0.9 V, IOUT = 5 mA to 50 mA VOUT 50 mV/Div IOUT 50 mA/Div 50 mA VIN = 3.6 V, VOUT = 0.9 V, IOUT = 150 mA to 200 mA VOUT 50 mV/Div Voltage Positioning IOUT 200 mA/Div 200 mA 50 mA 5 mA IL 200 mA/Div IL 200 mA/Div Time base - 50 ms/Div Time base - 20 ms/Div Figure 11. 8 Submit Documentation Feedback Figure 12. Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 TPS62270 TPS62273 www.ti.com................................................................................................................................................... SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008 LOAD TRANSIENT RESPONSE PFM/PWM MODE VOUT 50 mV/Div VSEL OUTPUT VOLTAGE RESPONSE VIN = 3.6 V, VOUT = 1.15 V, IOUT = 50 mA to 200 mA Voltage Positioning 1.15 V/86 mA VIN = 3.6 V, VOUT = 0.9 V/1.15 V, RLOAD = 13.3 W VOUT 100 mV/Div 1.15 V IOUT 200 mA/Div 0.9 V/68 mA 200 mA VSEL 500 mV/Div 50 mA IL 200 mA/Div IL 500 mA/Div Time base - 20 ms/Div Time base - 20 ms/Div Figure 13. Figure 14. STARTUP IN 10 Ω LOAD AT 1.15 V OUTPUT VOLTAGE STARTUP IN 100 Ω LOAD AT 0.9 V OUTPUT VOLTAGE EN 2 V/Div EN 2 V/Div SW 2 V/Div SW 2 V/Div VOUT 1 V/Div VIN = 3.6 V, VOUT = 0.9 V, VOUT 1 V/Div VIN = 3.6 V, VOUT = 1.15 V, IIN 20 mA/Div RLOAD = 100 W, VSEL = GND IIN 20 mA/Div RLOAD = 10 W, VSEL = VIN Time base - 100 ms/Div Time base - 100 ms/Div Figure 15. Figure 16. Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 Submit Documentation Feedback 9 TPS62270 TPS62273 SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008................................................................................................................................................... www.ti.com QUIESCENT CURRENT vs INPUT VOLTAGE SHUTDOWN CURRENT vs INPUT VOLTAGE 20 0.8 EN = VIN, Devise Not Switching EN = GND IQ - Quiescent Current - mA 18 ISD - Shutdown Current into VIN - mA TA = 85ºC 16 TA = 25ºC 14 TA = -40ºC 12 10 8 2 2.5 3 3.5 4 4.5 5 VIN - Input Voltage - V 5.5 0.7 0.6 TA = 85ºC 0.5 0.4 0.3 0.2 TA = 25ºC 0 2 6 2.5 3 3.5 4 4.5 5 VIN - Input Voltage - V STATIC DRAIN SOURCE ON-STATE RESISTANCE vs INPUT VOLTAGE 0.8 0.7 TA = 85ºC TA = 25ºC 0.4 0.3 0.2 TA = -40ºC 0.1 0 2 2.5 3 3.5 4 VIN - Input Voltage - V 4.5 5 0.4 Low Side Switch 0.35 0.3 TA = 85ºC 0.25 TA = 25ºC 0.2 0.15 0.1 TA = -40ºC 0.05 0 2 2.5 Figure 19. 10 Submit Documentation Feedback 6 STATIC DRAIN SOURCE ON-STATE RESISTANCE vs INPUT VOLTAGE High Side Switch 0.5 5.5 Figure 18. RDS(on) - Static Drain-Source On-State Resistance - W RDS(on) - Static Drain-Source On-State Resistance - W Figure 17. 0.6 TA = -40ºC 0.1 3 3.5 4 VIN - Input Voltage - V 4.5 5 Figure 20. Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 TPS62270 TPS62273 www.ti.com................................................................................................................................................... SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008 DETAILED DESCRIPTION OPERATION The TPS62270 step down converter operates with typically 2.25 MHz fixed frequency pulse width modulation (PWM) at moderate to heavy load currents. At light load currents the converter automatically enters Power Save Mode and operates then in PFM mode. During PWM operation the converter use a unique fast response voltage mode controller scheme with input voltage feed-forward to achieve good line and load regulation allowing the use of small ceramic input and output capacitors. At the beginning of each clock cycle initiated by the clock signal, the High Side MOSFET switch is turned on. The current flows now from the input capacitor via the High Side MOSFET switch through the inductor to the output capacitor and load. During this phase, the current ramps up until the PWM comparator trips and the control logic will turn off the switch. The current limit comparator will also turn off the switch in case the current limit of the High Side MOSFET switch is exceeded. After a dead time preventing shoot through current, the Low Side MOSFET rectifier is turned on and the inductor current will ramp down. The current flows now from the inductor to the output capacitor and to the load. It returns back to the inductor through the Low Side MOSFET rectifier. The next cycle will be initiated by the clock signal again turning off the Low Side MOSFET rectifier and turning on the on the High Side MOSFET switch. Power Save Mode If the load current decreases, the converter will enter Power Save Mode operation automatically. During Power Save Mode the converter skips switching and operates with reduced frequency in PFM mode with a minimum quiescent current to maintain high efficiency. The transition from PWM mode to PFM mode occurs once the inductor current in the Low Side MOSFET switch becomes zero, which indicates discontinuous conduction mode. During the Power Save Mode the output voltage is monitored with a PFM comparator. As the output voltage falls below the PFM comparator threshold of VOUT +1%, the device starts a PFM current pulse. For this the High Side MOSFET switch will turn on and the inductor current ramps up. After the On-time expires the switch will be turned off and the Low Side MOSFET switch will be turned on until the inductor current becomes zero. The converter effectively delivers a current to the output capacitor and the load. If the load is below the delivered current the output voltage will rise. If the output voltage is equal or higher than the PFM comparator threshold, the device stops switching and enters a sleep mode with typical 15µA current consumption. In case the output voltage is still below the PFM comparator threshold, further PFM current pulses will be generated until the PFM comparator threshold is reached. The converter starts switching again once the output voltage drops below the PFM comparator threshold. With a fast single threshold comparator, the output voltage ripple during PFM mode operation can be kept very small. The PFM Pulse is timing controlled, which allows to modify the charge transferred to the output capacitor by the value of the inductor. The resulting PFM output voltage ripple depends in first order on the size of the output capacitor and the inductor value. Increasing output capacitor values and/or inductor values will minimize the output ripple. The PFM mode is left and PWM mode entered in case the output current can not longer be supported in PFM mode. Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 Submit Documentation Feedback 11 TPS62270 TPS62273 SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008................................................................................................................................................... www.ti.com Output voltage Voltage Positioning Vout +1% PFM Comparator threshold Light load PFM Mode Vout (PWM) moderate to heavy load PWM Mode Figure 21. Power Save Mode 100% Duty Cycle Low Dropout Operation The device starts to enter 100% duty cycle Mode once the input voltage comes close the nominal output voltage. In order to maintain the output voltage, the High Side MOSFET switch is turned on 100% for one or more cycles. With further decreasing VIN the High Side MOSFET switch is turned on completely. In this case the converter offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to achieve longest operation time by taking full advantage of the whole battery voltage range. The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be calculated as: Vinmin = Voutmax + loutmax × (RDS(on)max + RL) With Ioutmax = maximum output current plus inductor ripple current RDS(on)max = maximum P-channel switch RDS(on). RL = DC resistance of the inductor Voutmax = nominal output voltage plus maximum output voltage tolerance Under-Voltage Lockout The under voltage lockout circuit prevents the device from malfunctioning at low input voltages and from excessive discharge of the battery and disables the output stage of the converter. The under-voltage lockout threshold is typically 1.85V with falling VIN. Output Voltage Selection VSEL The VSEL pin features output voltage selection. The output voltages are set with an internal high precision feedback divider network. No further external components for output voltage setting or compensation are required. This features smallest solution size. Connecting the VSEL pin to an external logic control signal allows simple dynamic voltage scaling for low power processors cores. During operation of the device, the output voltage can be changed with VSEL pin. This allows setting the core voltage of an processor according to its operating mode and helps to optimize power consumption. Table 1 shows an overview of the selectable output voltages. 12 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 TPS62270 TPS62273 www.ti.com................................................................................................................................................... SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008 Table 1. VSEL Output Voltage Selection DEVICE OUTPUT VOLTAGE VOUT VSEL = low VSEL = high TPS62270 0.9 V 1.15 V TPS62273 2.5V 3.3V Enable The device is enabled setting EN pin to high. During the start up time tStart up the internal circuits are settled. Afterwards the device activates the soft start circuit. The EN input can be used to control power sequencing in a system with various DC/DC converters. The EN pin can be connected to the output of another converter, to drive the EN pin high and getting a sequencing of supply rails. Soft Start The TPS62270 has an internal soft start circuit that controls the ramp up of the output voltage. The output voltage ramps up from 5% to 95% of its nominal value within typ. 250µs. This limits the inrush current in the converter during start up and prevents possible input voltage drops when a battery or high impedance power source is used. The Soft start circuit is enabled after the start up time tStart up has expired. Short-Circuit Protection The High Side and Low Side MOSFET switches are short-circuit protected with maximum output current = ILIMF. Once the High Side MOSFET switch reaches its current limit, it is turned off and the Low Side MOSFET switch is turned on. The High Side MOSFET switch can only turn on again, once the current in the Low Side MOSFET switch decreases below its current limit. Thermal Shutdown As soon as the junction temperature, TJ, exceeds 150°C (typical) the device goes into thermal shutdown. In this mode, the High Side and Low Side MOSFETs are turned-off. The device continues its operation when the junction temperature falls below the thermal shutdown hysteresis. Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 Submit Documentation Feedback 13 TPS62270 TPS62273 SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008................................................................................................................................................... www.ti.com APPLICATION INFORMATION TPS62270DRV VIN = 2 V to 6 V VIN CIN VOUT 0.9 V / 1.15 V up to 400 mA SW COUT EN 10 mF 4.7 mF GND L 2.2 mH FB 1.15 V 0.9 V VSEL Figure 22. TPS62270DRV Application Circuit OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR) The TPS62270 is designed to operate with inductors in the range of 1.5µH to 4.7µH and with output capacitors in the range of 4.7µF to 22µF. The part is optimized for operation with a 2.2µH inductor and 10µF output capacitor. Larger or smaller inductor values can be used to optimize the performance of the device for specific operation conditions. For stable operation, the L and C values of the output filter may not fall below 1µH effective inductance and 3.5µF effective capacitance. Inductor Selection The inductor value has a direct effect on the ripple current. The selected inductor has to be rated for its dc resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VI or VO. The inductor selection has also impact on the output voltage ripple in PFM mode. Higher inductor values will lead to lower output voltage ripple and higher PFM frequency, lower inductor values will lead to a higher output voltage ripple but lower PFM frequency. Equation 1 calculates the maximum inductor current under static load conditions. The saturation current of the inductor should be rated higher than the maximum inductor current as calculated with Equation 2. This is recommended because during heavy load transient the inductor current will rise above the calculated value. DI L + Vout 1 * Vout Vin L I Lmax + I outmax ) ƒ (1) DI L 2 (2) With: f = Switching Frequency (2.25 MHz typical) L = Inductor Value ΔIL = Peak to Peak inductor ripple current ILmax = Maximum Inductor current A more conservative approach is to select the inductor current rating just for the maximum switch current of the corresponding converter. Accepting larger values of ripple current allows the use of low inductance values, but results in higher output voltage ripple, greater core losses, and lower output current capability. The total losses of the coil have a strong impact on the efficiency of the DC/DC conversion and consist of both the losses in the dc resistance (R(DC)) and the following frequency-dependent components: • The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies) • Additional losses in the conductor from the skin effect (current displacement at high frequencies) • Magnetic field losses of the neighboring windings (proximity effect) • Radiation losses 14 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 TPS62270 TPS62273 www.ti.com................................................................................................................................................... SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008 Table 2. List of Inductors DIMENSIONS [mm3] INDUCTOR TYPE SUPPLIER 2.5 × 2.0 × 1.0 MIPS2520 FDK 2.5 × 2.0 × 1.2 MIPSA2520 FDK 2.5 × 2.0 × 1.0 KSLI-252010AG2R2 Hitachi Metals 2.5 × 2.0 × 1.2 LQM2HPN2R2MJ0L Murata Output Capacitor Selection The advanced fast-response voltage mode control scheme of the TPS62270 allows the use of tiny ceramic capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies. At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated as: 1 * Vout 1 Vin I RMSCout + Vout ƒ L 2 Ǹ3 (3) At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the output capacitor: DVout + Vout 1 * Vout Vin L ƒ ǒ8 1 Cout ƒ Ǔ ) ESR (4) At light load currents the converter operates in Power Save Mode and the output voltage ripple is dependent on the output capacitor and inductor value. Larger output capacitor and inductor values minimize the voltage ripple in PFM mode and tighten DC output accuracy in PFM mode. Input Capacitor Selection An input capacitor is required for best input voltage filtering, and minimizing the interference with other circuits caused by high input voltage spikes. For most applications, a 4.7µF to 10µF ceramic capacitor is recommended. Because ceramic capacitor loses up to 80% of its initial capacitance at 5 V, it is recommended that 10µF input capacitors be used for input voltages >4.5V. The input capacitor can be increased without any limit for better input voltage filtering. Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output or VIN step on the input can induce ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop instability or could even damage the part by exceeding the maximum ratings. Table 3. List of Capacitors CAPACITANCE TYPE SIZE mm3 SUPPLIER 4.7 µF GRM188R60J475K 0603: 1.6 × 0.8 × 0.8 mm3 Murata 10 µF GRM188R60J106M69D 0603: 1.6 × 0.8 × 0.8 mm3 Murata Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 Submit Documentation Feedback 15 TPS62270 TPS62273 SLVS799B – NOVEMBER 2007 – REVISED JUNE 2008................................................................................................................................................... www.ti.com LAYOUT CONSIDERATIONS As for all switching power supplies, the layout is an important step in the design. Proper function of the device demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If the layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues as well as EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use wide and short traces for the main current paths. The input capacitor should be placed as close as possible to the IC pins as well as the inductor and output capacitor. Connect the GND Pin of the device to the Power Pad of the PCB and use this Pad as a star point. Use a common Power GND node and a different node for the Signal GND to minimize the effects of ground noise. Connect these ground nodes together to the Power Pad (star point) underneath the IC. Keep the common path to the GND PIN, which returns the small signal components and the high current of the output capacitors as short as possible to avoid ground noise. The FB line should be connected right to the output capacitor and routed away from noisy components and traces (e.g., SW line). COUT VOUT U1 GND 3.3mm VIN CIN L1 Total area 21.5 mm² 6.5 mm Figure 23. Suggested Board Layout 16 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62273 PACKAGE OPTION ADDENDUM www.ti.com 11-Jul-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS62270DRVR ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62270DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62270DRVT ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62270DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62273DRVR ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62273DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62273DRVT ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS62273DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 4-Jul-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing TPS62270DRVR SON DRV 6 SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS62270DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS62273DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS62273DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 4-Jul-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS62270DRVR SON DRV 6 3000 195.0 200.0 45.0 TPS62270DRVT SON DRV 6 250 195.0 200.0 45.0 TPS62273DRVR SON DRV 6 3000 195.0 200.0 45.0 TPS62273DRVT SON DRV 6 250 195.0 200.0 45.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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