SN75186 QUADRUPLE DRIVER/RECEIVER WITH LOOPBACK SLLS068C – FEBRUARY 1990 – REVISED MAY 1995 D D D D D D D D Meets or Exceeds the Requirements of ANSI EIA / TIA-232-E and ITU Recommendation V.28 Four Independent Drivers and Receivers Loopback Mode Functionally Self-Tests Drivers and Receivers Without Disconnection From Line Driver Slew Rate Limited to 30 V/µs Max Built-In Receiver 1-µs Noise Filter Internal Thermal Overload Protection EIA/ TIA-232-E Inputs and Outputs Withstand ± 30 V Low Supply Current . . . 2.5 mA Typ ESD Protection Exceeds 4000 V Per MIL-STD-833C Method 3015 DW PACKAGE (TOP VIEW) 3A 3Z 3LB 4A 4Z 4LB VEE GND 4B 4Y 3B 3Y 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 2LB 2Z 2A 1LB 1Z 1A VCC2 VCC1 1Y 1B 2Y 2B FN PACKAGE (TOP VIEW) 1Z 1A VCC2 NC NC VCC1 NC description The SN75186 is a low-power bipolar device containing four driver/receiver pairs designed to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE). Additionally, the SN75186 has a loopback mode that can be used by a data communication system to perform a functional self-test on each driver/receiver pair, removing the need to locally disconnect cables and install a loopback connector. Flexibility of control is ensured by each driver/receiver pair having its own loopback control input. The SN75186 is designed to conform to standards ANSI EIA/ TIA-232-E and ITU Recommendation V.28. 4 5 3 2 1 28 27 26 25 6 24 7 23 8 22 9 21 10 20 11 19 12 13 14 15 16 17 18 4A 4Z 4LB NC VEE 1LB 2A 2Z 2LB 3A 3Z 3LB 1Y 1B 2Y 2B 3Y 3B 4Y GND 4B D NC – No internal connection The maximum slew rate is limited to 30 V/µs at the driver outputs, and the SN75186 drives a capacitive load of 2500 pF at 20 kBaud. The receivers have input filters that disregard input noise pulses shorter than 1 µs. The SN75186 is a robust device capable of withstanding ± 30 V at driver outputs and at receiver inputs whether powered or unpowered. This device has an internal ESD protection rated at 4 kV to prevent functional failures. The SN75186 is characterized for operation from 0°C to 70°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN75186 QUADRUPLE DRIVER/RECEIVER WITH LOOPBACK SLLS068C – FEBRUARY 1990 – REVISED MAY 1995 Function Tables EACH RECEIVER INPUTS LOOPBACK LB A B† H X H L H X L H L L X L L H X H INPUT DE EACH DRIVER LOOPBACK LB INPUT A OUTPUT Y† H H L H L H L X L † Voltages are EIA / TIA-232-E, and V.28 levels H = high level, L = low level, X = irrelevant logic symbol‡ 1LB 2LB 3LB 4LB 1A 1Z 2A 2Z 3A 3Z 4A 4Z 21 24 3 6 logic diagram, each driver/receiver pair (positive logic) G3 1 1V5 1 22 2 2V6 6 1 2 3 3V7 7 4 5 Y G4 20 2 A G2 19 23 Driver G1 3 4 4V8 8 4 16 15 14 13 12 11 10 9 1Y LB 1B Z 2Y B Receiver 2B 3Y 3B 4Y 4B ‡ This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW package. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75186 QUADRUPLE DRIVER/RECEIVER WITH LOOPBACK SLLS068C – FEBRUARY 1990 – REVISED MAY 1995 schematics of inputs and outputs EQUIVALENT RECEIVER INPUT EQUIVALENT RECEIVER OUTPUT VCC2 VCC1 VCC2 ESD Protection 45 V 8V 4 kΩ 2 kΩ GND B Input 2 kΩ ESD Protection Z Output 8V 45 V ESD Protection 1.2 x VBE 100 kΩ GND VEE GND VEE EQUIVALENT DRIVER AND LOOPBACK INPUT EQUIVALENT DRIVER OUTPUT VCC1 VCC1 30 Ω 8V 8V ESD Protection GND Output Internal 1.4-V Ref to GND A Input 3 pF 5 kΩ D1 8V ESD Protection GND GND ESD Protection 8V 30 Ω 8V VEE VEE All component values shown are nominal. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN75186 QUADRUPLE DRIVER/RECEIVER WITH LOOPBACK SLLS068C – FEBRUARY 1990 – REVISED MAY 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V Supply voltage, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Supply voltage, VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 15 V Receiver input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 V to 30 V Driver input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (VEE + 2 V) to VCC1 Loopback input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 7 V Driver output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 V to 30 V Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Case temperature for 10 seconds: FN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DW package . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltages are with respect to the network ground terminal. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING DW 1350 mW 10.8 mW/°C 864 mW FN 1400 mW 11.2 mW/°C 896 mW recommended operating conditions MIN NOM MAX UNIT Supply voltage, VCC1 10.8 12 13.2 V Supply voltage, VCC2 4.5 5 5.5 V –10.8 –12 –13.2 V VCC2 ± 30 V Supply voltage, VEE Input voltage, VI Driver and loopback Input voltage, VI (see Note 2) Receiver High-level input voltage, VIH Driver and loopback Low-level input voltage, VIL Driver and loopback Output voltage powered on or off, VO Driver High-level output current, IOH Receiver Low-level output current, IOL Receiver Operating free-air temperature, TA 0 2 V 0.8 0 V V ± 30 V –4 mA 4 mA 70 °C NOTE 2: If all receiver inputs are held at ± 30 V, the thermal dissipation limit of the package may be exceeded. The thermal shutdown may not protect the device, as this dissipation occurs in the receiver input resistors. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75186 QUADRUPLE DRIVER/RECEIVER WITH LOOPBACK SLLS068C – FEBRUARY 1990 – REVISED MAY 1995 DRIVER SECTION electrical characteristics over full recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS RL = 3 kΩ, MIN VOH VOL High-level output voltage Low-level output voltage‡ VOH(LB) High-level output voltage in loopback mode‡§¶ IIH High-level input current (driver and loopback inputs)# IIL Low-level input current (driver and loopback inputs)# VOS(H) High-level short-circuit output current VI = 0.8 V, VO = 0, See Note 3 and Figure 1 – 10 VOS(L) Low-level short-circuit output current VI = 2 V, VO = 0, See Note 3 and Figure 1 10 ICC1 Supply current from VCC1 No load ICC1(LB) Supply current from VCC1 with loopback on No load, IEE Supply current from VEE No load IEE(LB) Supply current from VEE with loopback on No load, LB at 0.8 V ICC2 Supply current from VCC2 No load, ICC2(LB) Supply current from VCC2 with loopback on No load, See Note 5 VI = 0, LB at 0.8 V, ro Output resistance VCC1 = VEE = VCC2 = 0, See Note 4 TYP† MAX 7 UNIT See Figure 1 RL = 3 kΩ, VIL = 0.8 V, VIH = 2 V, V See Figure 1 –7 V RL = 3 kΩ, LB at 0.8 V, VIL = 0.8 V –7 V VI = 5 V, See Figure 2 100 µA – 100 µA – 20 – 35 mA 20 35 mA 2.5 4 mA 10 mA –4 mA – 10 mA LB at 0.8 V – 2.5 See Note 5 – 10 – 100 µA VI = 0, – 10 – 100 µA VO = – 2 V to 2 V, 0.3 5 kΩ † All typical values are at TA = 25°C. ‡ The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic levels only. § This is the most positive level to which the driver output rises when the device is in the loopback mode and the driver input is at a low level. ¶ The loopback mode should be entered only when the driver output is in the low (marking) state. # Unused driver inputs should be tied to 0 V or VCC2; unused loopback inputs should be tied to VCC2. NOTES: 3. Minimum IOS(H) and IOS(L) are specified at VO = 0, as this more accurately describes the output current needed to dynamically drive capacitive lines. A minimum of ±10 mA is sufficient to drive 2500 pF in parallel with 3 kΩ at a slew rate of 4 V/µs ( in accordance with EIA / TIA-232-E and V.28). 4. Test conditions are those specified by EIA / TIA-232-E. 5. Without a load and VI = 0, the worst-case conditions, VCC2 sources a small current originating from VCC1 giving ICC2 supply current a negative sign. When a receiver has an output load, VCC2 sinks static and dynamic supply currents to meet load requirements. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN75186 QUADRUPLE DRIVER/RECEIVER WITH LOOPBACK SLLS068C – FEBRUARY 1990 – REVISED MAY 1995 switching characteristics over full recommended ranges of supply voltages and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS tPLH Propagation delay time, low- to high-level output tPHL Propagation delay time, high- to low-level output MIN TYP† MAX 0.6 5 µs 0.8 5 µs 0.2 1 µs 30 V/µs UNIT RL = 3 kΩ to 7 kΩ,, See Figure 3 CL = 15 pF,, | tPLH – tPHL | RL = 3 kΩ to 7 kΩ, CL = 15 pF to 2500 pF Output slew rate RL = 3 kΩ to 7 kΩ, CL = 15 pF to 2500 pF tpd(ILB) Propagation delay time going into loopback mode ‡ RL = 3 kΩ to 7 kΩ, See Note 6 and Figure 7 3 50 µs tpd(OLB) Propagation delay time going out of loopback mode § RL = 3 kΩ to 7 kΩ, See Note 6 and Figure 7 3 50 µs tsk SR 4 tpd(LB) Propagation delay time in loopback mode ¶ RL = 3 kΩ to 7 kΩ, See Note 6 and Figure 8 3 15 µs tsk Skew time in loopback mode RL = 3 kΩ to 7 kΩ, See Note 6 4 10 µs † All typical values are at TA = 25°C. ‡ This is the delay between entering the loopback mode and when the data on the receiver output becomes valid. § This is the worst-case (rising or falling edges) total propagation delay between driver input and receiver output when in the loopback mode. ¶ This is the magnitude of the difference between the propagation delay time of the rising and falling edges of tpd(LB). NOTE 6: Skew time is the magnitude of the difference between tPHL and tPLH and is measured with a 0-to-3-V input pulse. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75186 QUADRUPLE DRIVER/RECEIVER WITH LOOPBACK SLLS068C – FEBRUARY 1990 – REVISED MAY 1995 RECEIVER SECTION electrical characteristics over full recommended ranges of supply voltages and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIT+ VIT– Positive-going input threshold voltage See Figure 5 1.3 2 2.5 V Negative-going input threshold voltage See Figure 5 0.5 1 1.7 V Vhys Input hysteresis voltage (VIT+ – VIT–) 0.5 1 1.5 V IOH = – 20 µA See Note 7 and Figure 5 VOH High level output voltage High-level VI = – 3 V or inputs open, IOH = – 4 mA, VOL Low level output voltage Low-level IOL = 4 mA,, See Figure 5 VI = 3 V,, IOS(H) Short-circuit output current at high level IOS(L) Short-circuit output current at low level VOH = 0, VOL = VCC2, See Figure 4 See Figure 4 ri VI ≤ 25 V VI = 3 V to 25 V Input resistance 3.5 V 2.4 04 0.4 V – 20 – 60 mA 20 60 mA 3 7 kΩ † All typical values are at TA = 25°C. NOTE 7: If the inputs are left unconnected, the receiver interprets this as a low input and the receiver outputs will remain in the high state. switching characteristics over full recommended ranges of supply voltages and operating free-air temperature (unless otherwise noted) PARAMETER tPLH tPHL tTLH tTHL TEST CONDITIONS Propagation delay time, low- to high-level output Propagation delay time, high- to low-level output Transition time, low- to high-level output‡ Transition time, high- to low-level output‡ See Figure 6 CL = 50 pF, pF See Figure 6 MIN TYP† MAX 2 6 µs UNIT 2 6 µs 200 300 ns 50 300 ns tsk tPLH – tPHL 0.1 1 µs tw Maximum pulse duration assumed to be noise§ Pulse amplitude = 5 V 1 2 4 µs † All typical values are at TA = 25°C. ‡ Transition times are measured between 10% and 90% points on output waveform. § The receiver will ignore any positive- or negative-going pulse whose duration is less than the minimum value of tw and accept any positive- or negative-going pulse whose duration is greater than the maximum value of tw. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN75186 QUADRUPLE DRIVER/RECEIVER WITH LOOPBACK SLLS068C – FEBRUARY 1990 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION IOS(L) VCC1 VCC2 VCC1 or GND – IOS(H) VI A Y VEE or GND VO RL = 3 kΩ VEE Figure 1. Driver Test Circuit, VOH, VOL, IOS(L), IOS(H) VCC1 VCC2 IIH VI A Y – IIL VI VEE Figure 2. Driver and Loopback Test Circuit, IIL, IIH VCC1 VCC2 3V Input Pulse Generator (see Note A) Input A 1.5 V 1.5 V 0V A tPHL Y RL CL (see Note B) VEE Output Y tPLH 3V 50% –3 V tf 3V tr DRIVER VOLTAGE WAVEFORMS (see Note C) DRIVER TEST CIRCUIT NOTES: A. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω. B. CL includes probe and jig capacitance. 6V C. Slew rate = t r or tf Figure 3. Driver Test Circuit and Voltage Waveforms 8 50% –3 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 VOH SN75186 QUADRUPLE DRIVER/RECEIVER WITH LOOPBACK SLLS068C – FEBRUARY 1990 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION VCC1 VCC2 – IOS(H) Z B VI IOS(L) VCC2 VEE Figure 4. Receiver Test Circuit, IOS(H), IOS(L) VCC1 VCC2 VIT, VI Z B VOL IOL – IOH VOH VEE Figure 5. Receiver Test Circuit, VIT, VOL, VOH VCC1 VCC2 5V Input Pulse Generator (see Note A) Input B 50% 50% –5 V B Z CL VEE tPLH tPHL Output Z (see Note B) 90% 50% 10% tTHL TEST CIRCUIT 50% 10% 90% VOH VOL tTLH VOLTAGE WAVEFORMS NOTES: A. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 6. Receiver Propagation and Transition Times POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SN75186 QUADRUPLE DRIVER/RECEIVER WITH LOOPBACK SLLS068C – FEBRUARY 1990 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION Input A Y Pulse Generator (see Note A) Loopback Input LB 50% 50% tpd(ILB) LB tpd(OLB) Receiver Output Z B = High 50% 50% VOLTAGE WAVEFORMS TEST CIRCUIT NOTES: A. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 7. Loopback Entry and Exit Propagation Times Input Driver Pulse Generator (see Note A) A Y Driver Input A Z Receiver Output Z Receiver tpd(LB) 50% 50% VOLTAGE WAVEFORMS TEST CIRCUIT NOTES: A. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 8. Loop Propagation Times in Loopback Mode 10 50% tpd(LB) LB = Low B 50% POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75186 QUADRUPLE DRIVER/RECEIVER WITH LOOPBACK SLLS068C – FEBRUARY 1990 – REVISED MAY 1995 PRINCIPLES OF OPERATION In normal operation, the SN75186 acts as four independent drivers and receivers; the loopback mode is held off by keeping logic inputs LB high. Taking a particular LB input low activates the loopback mode in the corresponding driver/receiver pair. This causes the output from that driver to be fed back to the input of its receiver through dedicated internal loopback circuitry. Data from the receiver output can then be compared, by a communication system, with the data transmitted to the driver to determine if the functional operation of the driver and receiver together is correct. In the loopback mode, external data at the input of the receiver is ignored and the driver does not transmit data onto the line. Extraneous data is prevented internally from being sent by the driver in the loopback mode by clamping its output to a level below the maximum interface voltage, – 5 V, or the EIA / TIA-232-E marking state. Below this marking level, a reduced 1.5-V output amplitude is used at the driver output. This signal is detected by an on-chip loopback comparator and fed to the input stage of the receiver to complete the loop. Line faults external to the SN75186 are detected in addition to device failures. These line faults include short circuits to ground and to external supply voltages that are greater than (VEE + 7 V) and less than VEE typically. For example, with VEE = –12 V, line short circuits to voltages greater than – 5 V and less than –12 V will be detected. The loopback mode should be entered only when the driver output is low, that is, the marking state of EIA / TIA-232-E. Loopback should not be entered when the driver output is in a high state as this may cause a low-level, nondamaging oscillation at the driver output. When in the loopback mode, approximately 95% of the SN75186 circuit is functionally checked. There exists some low probability of fault mechanisms in circuitry not being checked in the loopback mode. To reduce the chances of undetected failure, the unchecked circuitry has been designed to be more robust than that within the loopback test loop. The areas where special attention has been paid are the receiver input potential divider and resistors, the driver output blocking diode (D1), and parts of the driver clamp circuit. Protection of the SN75186 is achieved by means of driver output current limits and a thermal trip. Although this device can withstand ± 30 V at its receiver input, package thermal dissipation limitations have to be taken into consideration if more than one receiver is connected simultaneously. This is due to the possible dissipation in the 3-kΩ minimum input resistors, which is not under the control of the thermal trip. Although the supply current is higher in the loopback mode than in normal operation, the total power dissipation is not sufficient under normal worst-case conditions (of receiver input VI = 15 V + 10%, receiver output voltage = 2.4 V at 4 mA, driver load of 3 kΩ) to cause the thermal limiting circuitry to trip. If the SN75186 goes into thermal trip, the output of the driver goes to a high-impedance state and the receiver output is held in a logic-high marking state. Both driver and receiver outputs maintain a marking state and do not allow indeterminate conditions to exist. The standards specify a minimum driver output resistance to ground of 300 Ω when the device is powered off. To fully comply with EIA / TIA-232-E power-off fault conditions, many drivers need diodes in series with each supply voltage to prevent reverse current flow and driver damage. The SN75186 overcomes this need by providing a high-impedance driver output of typically 5 kΩ under power-off conditions through the use of the equivalent of these series diodes in the driver output circuit. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1998, Texas Instruments Incorporated