SN65ALS180, SN75ALS180 DIFFERENTIAL DRIVER AND RECEIVER PAIRS SLLS052E – AUGUST 1987 – REVISED OCTOBER 1998 D D D D D D D D D D D D D D D D OR N PACKAGE (TOP VIEW) Meet or Exceed the Requirements of TIA/EIA-422-B, TIA/EIA-485-A† and ITU Recommendation V.11 High-Speed Advanced Low-Power Schottky Circuitry Designed for 25-MBaud Operation in Both Serial and Parallel Applications Low Skew Between Devices . . . 6 ns Max Low Supply-Current Requirements . . . 30 mA Max Individual Driver and Receiver I/O Pins With Dual VCC and Dual GND Wide Positive and Negative Input/Output Bus Voltage Ranges Driver Output Capacity . . . ±60 mA Thermal Shutdown Protection Driver Positive- and Negative-Current Limiting Receiver Input Impedance . . . 12 kΩ Min Receiver Input Sensitivity . . . ±200 mV Max Receiver Input Hysteresis . . . 60 mV Typ Operate From a Single 5-V Supply Glitch-Free Power-Up and Power-Down Protection NC R RE DE D GND GND 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC VCC A B Z Y NC NC – No internal connection description The SN65ALS180 and SN75ALS180 differential driver and receiver pairs are monolithic integrated circuits designed for bidirectional data communication on multipoint bus-transmission lines. They are designed for balanced transmission lines and meet TIA/EIA-422-B, TIA/EIA-485-A, and ITU Recommendation V.11. The SN65ALS180 and SN75ALS180 combine a 3-state differential line driver and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively, that can be externally connected together to function as a direction control. The driver differential outputs and the receiver differential inputs are connected to separate terminals for greater flexibility and are designed to offer minimum loading to the bus when the driver is disabled or VCC = 0. These ports feature wide positive and negative common-mode voltage ranges, making the device suitable for party-line applications. The SN65ALS180 is characterized for operation from –40°C to 85°C. The SN75ALS180 is characterized for operation from 0°C to 70°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. † These devices meet or exceed the requirements of TIA/EIA-485-A, except for the Generator Contention Test (para. 3.4.2) and the Generator Current Limit (para. 3.4.3). The applied test voltage ranges are –6 V to 8 V for the SN75ALS180 and –4.5 V to 8 V for the SN65ALS180. Copyright 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN65ALS180, SN75ALS180 DIFFERENTIAL DRIVER AND RECEIVER PAIRS SLLS052E – AUGUST 1987 – REVISED OCTOBER 1998 Function Tables DRIVER OUTPUTS INPUT D ENABLE DE H H H L L H L H X L Z Z Y Z RECEIVER DIFFERENTIAL INPUTS A–B ENABLE RE OUTPUT R VID ≥ 0.2 V –0.2 V < VID < 0.2 V L H L ? VID ≤ –0.2 V X L L H Z Open L H H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off) logic symbol† DE D RE R 4 EN1 5 9 1 10 1 3 12 EN2 2 11 2 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) DE D RE 4 5 9 10 3 9 R 2 2 POST OFFICE BOX 655303 10 Y Z Y Z • DALLAS, TEXAS 75265 Y Z A B SN65ALS180, SN75ALS180 DIFFERENTIAL DRIVER AND RECEIVER PAIRS SLLS052E – AUGUST 1987 – REVISED OCTOBER 1998 schematics of inputs and outputs EQUIVALENT OF EACH INPUT RECEIVER A INPUT VCC RECEIVER B INPUT VCC VCC 180 kΩ NOM R(eq) 3 kΩ NOM 18 kΩ NOM 18 kΩ NOM Input 3 kΩ NOM Input Input 180 kΩ NOM 1.1 kΩ NOM 1.1 kΩ NOM Driver and Driver Enable Inputs: R(eq) = 12 kΩ NOM Receiver Enable Input: R(eq) = 30 kΩ NOM R(eq) = Equivalent Resistor DRIVER OUTPUT VCC TYPICAL OF RECEIVER OUTPUT 85 Ω NOM VCC Output Output POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN65ALS180, SN75ALS180 DIFFERENTIAL DRIVER AND RECEIVER PAIRS SLLS052E – AUGUST 1987 – REVISED OCTOBER 1998 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage range at any bus terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10 V to 15 V Enable input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W Storage temperature range, Tst . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential I/O bus voltage, are with respect to network ground terminal. 2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero. recommended operating conditions Supply voltage, VCC MIN NOM MAX UNIT 4.75 5 5.25 V 12 Voltage at any bus terminal (separately or common mode), mode) VI or VIC –7 High-level input voltage, VIH D, DE, and RE Low-level input voltage, VIL D, DE, and RE 2 Driver High level output current, High-level current IOH Receiver Driver Low level output current, Low-level current IOL V –60 mA –400 µA 8 SN65ALS180 –40 85 SN75ALS180 0 70 NOTE 3: Differential-input/output bus voltage is measured at the noninverting terminal, A/Y, with respect to the inverting terminal, B/Z. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V ±12 60 Receiver free air temperature, temperature TA Operating free-air V 0.8 Differential input voltage, VID (see Note 3) V mA °C SN65ALS180, SN75ALS180 DIFFERENTIAL DRIVER AND RECEIVER PAIRS SLLS052E – AUGUST 1987 – REVISED OCTOBER 1998 DRIVERS electrical characteristics over recommended ranges of supply voltage and operating free-air temperature range (unless otherwise noted) TEST CONDITIONS† PARAMETER VIK VO Input clamp voltage Output voltage II = –18 mA IO = 0 |VOD1| Differential output voltage IO = 0 |VOD2| g Differential output voltage VOD3 Differential output voltage ∆|VOD| Change in magnitude of differential output voltage¶ VOC Common-mode output voltage ∆|VOC| Change in magnitude of common-mode output voltage¶ IO Output current IIH IIL High-level input current IOS ICC Low-level input current Short-circuit output current# Supply y current MIN MAX UNIT –1.5 V 0 6 V 1.5 6 V RL = 100 Ω, See Figure 1 1/2 VOD1 or 2§ RL = 54 Ω, See Figure 1 1.5 Vtest = –7 V to 12 V, See Figure 2 1.5 RL = 54 Ω or 100 Ω, TYP‡ V 2.5 See Figure 1 VO = 12 V VO = –7 V Output disabled,, See Note 4 5 5 V ±0.2 V 3 –1 V ±0.2 V 1 –0.8 VI = 2.4 V VI = 0.4 V mA 20 µA –400 µA VO = –6 V VO = –4 V SN75ALS180 –250 SN65ALS180 –250 VO = 0 VO = VCC All –150 VO = 8 V All No load Driver outputs enabled, Receiver disabled 25 30 Outputs disabled 19 26 mA All mA † The power-off measurement in TIA/EIA-422-B applies to disabled outputs only and is not applied to combined inputs and outputs. ‡ All typical values are at VCC = 5 V, TA = 25°C. § The minimum VOD2 with 100-Ω load is either 1/2 VOD2 or 2 V, whichever is greater. ¶ ∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low level. # Duration of the short circuit should not exceed one second for this test. NOTE 4: This applies for both power on and off; refer to TIA/EIA-485-A for exact conditions. The TIA/EIA-422-B limit does not apply for a combined driver and receiver terminal. switching characteristics over recommended ranges of supply voltage and operating free-air temperature PARAMETER td(OD) TEST CONDITIONS Differential output delay time Pulse skew (td(ODH) – td(ODL)) RL = 54 Ω, CL = 50 pF, MIN TYP‡ MAX 3 8 13 ns 1 6 ns See Figure 3 3 UNIT tt(OD) tPZH Differential output transition time 8 13 ns Output enable time to high level RL = 110 Ω, See Figure 4 23 50 ns tPZL tPHZ Output enable time to low level RL = 110 Ω, See Figure 5 19 24 ns Output disable time from high level RL = 110 Ω, See Figure 4 8 13 ns RL = 110 Ω, See Figure 5 8 13 ns tPLZ Output disable time from low level ‡ All typical values are at VCC = 5 V and TA = 25°C. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN65ALS180, SN75ALS180 DIFFERENTIAL DRIVER AND RECEIVER PAIRS SLLS052E – AUGUST 1987 – REVISED OCTOBER 1998 SYMBOL EQUIVALENTS DATA-SHEET PARAMETER TIA/EIA-422-B TIA/EIA-485-A VO |VOD1| Voa, Vob Vo Voa, Vob Vo |VOD2| Vt (RL = 100 Ω) Vt (RL = 54 Ω) Vt (test termination measurement 2) |VOD3| Vtest ∆|VOD| VOC ∆|VOC| IOS IO Vtst ||Vt| – |Vt|| ||Vt| – |Vt|| |Vos| |Vos – Vos| |Isa|, |Isb| |Vos| |Vos – Vos| |Ixa|, |Ixb| Iia, Iib RECEIVERS electrical characteristics over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VIT+ Positive-going input threshold voltage VO = 2.7 V, IO = –0.4 mA VIT– Negative-going input threshold voltage VO = 0.5 V, IO = 8 mA Vhys VIK Hysteresis voltage (VIT+ – VIT–) VOH VOL High-level output voltage IOZ High-impedance-state output current II Line input current IIH IIL High-level enable-input current ri Input resistance IOS Short-circuit output current VID = 200 mV, ICC Supplyy current No load Enable-input clamp voltage Low-level output voltage Low-level enable-input current MIN TYP† MAX 0.2 –0.2‡ VID = –200 mV, VO = 0.4 V to 2.4 V Other input = 0 V,, See Note 5 mV –1.5 IOH = –400 µA, IOL = 8 mA, See Figure 6 2.7 VI = 12 V VI = –7 V 0.45 V ±20 µA 1 –0.8 VIH = 2.7 V VIL = 0.4 V 20 –100 12 Outputs disabled V V See Figure 6 VO = 0 Receiver outputs enabled, Driver inputs disabled V V 60 II = –18 mA VID = 200 mV, UNIT mA µA µA kΩ –15 –85 19 30 19 26 mA mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common-mode input voltage and threshold voltage levels only. NOTE 5: This applies for both power on and power off. Refer to TIA/EIA-485-A for exact conditions. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN65ALS180, SN75ALS180 DIFFERENTIAL DRIVER AND RECEIVER PAIRS SLLS052E – AUGUST 1987 – REVISED OCTOBER 1998 switching characteristics over recommended ranges of supply voltage and operating free-air temperature PARAMETER tPLH tPHL TEST CONDITIONS MIN TYP† MAX 9 14 19 ns 9 Propagation delay time, low- to high-level output Propagation delay time, high- to low-level output VID = –1.5 1 5 V tto 1 1.5 5V V, See Figure 7 CL = 15 pF, F UNIT 14 19 ns Skew (|tPHL – tPLH|) 2 6 ns tPZH tPZL Output enable time to high level 7 14 ns tPHZ tPLZ Output disable time from high level Output enable time to low level CL = 15 pF, pF See Figure 8 Output disable time from low level 7 14 ns 20 35 ns 8 17 ns † All typical values are at VCC = 5 V, TA = 25°C. PARAMETER MEASUREMENT INFORMATION RL 2 VOD2 RL 2 VOC Figure 1. Driver VOD and VOC 375 Ω VOD3 60 Ω Vtest 375 Ω Figure 2. Driver VOD3 3V Input CL = 50 pF (see Note B) Generator (see Note A) Output 1.5 V 0V td(ODL) td(ODH) RL = 54 Ω 50 Ω 1.5 V Output 3V 50% 10% tt(OD) TEST CIRCUIT 90% ≈ 2.5 V 50% 10% ≈ –2.5 V tt(OD) VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 3. Driver Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN65ALS180, SN75ALS180 DIFFERENTIAL DRIVER AND RECEIVER PAIRS SLLS052E – AUGUST 1987 – REVISED OCTOBER 1998 PARAMETER MEASUREMENT INFORMATION Output 3V S1 Input 0 V or 3 V 1.5 V 1.5 V 0V Generator (see Note A) CL = 50 pF (see Note B) RL = 110 Ω 50 Ω 0.5 V tPZH VOH Output 2.3 V Voff ≈ 0 V tPHZ TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 4. Driver Test Circuit and Voltage Waveforms 5V RL = 110 Ω S1 3V Output Input 0 V or 3 V 1.5 V 0V CL = 50 pF (see Note B) Generator (see Note A) 1.5 V tPZL 50 Ω Output tPLZ 2.3 V 5V 0.5 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 5. Driver Test Circuit and Voltage Waveforms VID VOH +IOL VOL Figure 6. Receiver VOH and VOL 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 –IOH SN65ALS180, SN75ALS180 DIFFERENTIAL DRIVER AND RECEIVER PAIRS SLLS052E – AUGUST 1987 – REVISED OCTOBER 1998 PARAMETER MEASUREMENT INFORMATION 3V 1.5 V Input 1.5 V 0V Generator (see Note A) tPLH Output 51 Ω 1.5 V tPHL VOH CL = 15 pF (see Note B) 0V 1.3 V Output 1.3 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 7. Receiver Test Circuit and Voltage Waveforms S1 1.5 V 2 kΩ – 1.5 V S2 5V CL = 15 pF (see Note B) Generator (see Note A) 5 kΩ 1N916 or Equivalent 50 Ω S3 TEST CIRCUIT 3V Input 3V S1 to 1.5 V S2 Open S3 Closed 1.5 V Input 1.5 V 0V tPZH tPZL 0V ≈4.5 V VOH Output 1.5 V 1.5 V Output VOL 0V 3V Input 1.5 V tPHZ S1 to 1.5 V S2 Closed S3 Closed 3V Input 1.5 V S1 to –1.5 V S2 Closed S3 Closed 0V 0V tPLZ VOH Output S1 to –1.5 V S2 Closed S3 Open 0.5 V Output ≈1.3 V ≈1.3 V 0.5 V VOL VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 8. Receiver Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SN65ALS180, SN75ALS180 DIFFERENTIAL DRIVER AND RECEIVER PAIRS SLLS052E – AUGUST 1987 – REVISED OCTOBER 1998 TYPICAL CHARACTERISTICS – DRIVERS LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 5 5 4.5 4.5 VOL – Low-Level Output Voltage – V VOH – High-Level Output Voltage – V HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 4 3.5 3 2.5 2 1.5 1 VCC = 5 V TA = 25°C 0.5 VCC = 5 V TA = 25°C 4 3.5 3 2.5 2 1.5 1 0.5 0 0 0 –20 –40 –60 –80 –100 0 –120 20 IOH – High-Level Output Current – mA 40 Figure 10 Figure 9 DIFFERENTIAL OUTPUT VOLTAGE vs OUTPUT CURRENT VOD – Differential Output Voltage – V 4 3.5 3 2.5 2 1.5 1 0.5 0 VCC = 5 V TA = 25°C 0 10 20 30 40 50 60 70 IO – Output Current – mA Figure 11 10 60 80 100 IOL – Low-Level Output Current – mA POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 80 90 100 120 SN65ALS180, SN75ALS180 DIFFERENTIAL DRIVER AND RECEIVER PAIRS SLLS052E – AUGUST 1987 – REVISED OCTOBER 1998 TYPICAL CHARACTERISTICS – RECEIVERS HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 5 VID = 0.2 V TA = 25°C VOH – High-Level Output Voltage – V VOH – High-Level Output Voltage – V 5 4 3 VCC = 5.25 V VCC = 5 V 2 VCC = 4.75 V 1 –10 –20 –30 –40 3 2 1 0 –40 0 0 4 VCC = 5 V VID = 200 mV IOH = –440 µA –50 –20 0 40 60 80 100 120 TA – Free-Air Temperature – °C IOH – High-Level Output Current – mA Figure 13 Figure 12 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 0.6 0.6 VCC = 5 V TA = 25°C VID = –200 mV 0.5 VOL – Low-Level Output Voltage – V VOL – Low-Level Output Voltage – V 20 0.4 0.3 0.2 0.1 0 0 5 10 15 20 25 30 0.5 VCC = 5 V VID = –200 mA IOL = 8 mA 0.4 0.3 0.2 0.1 0 –40 –20 0 20 40 60 80 100 120 TA – Free-Air Temperature – °C IOL – Low-Level Output Current – mA Figure 14 Figure 15 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 SN65ALS180, SN75ALS180 DIFFERENTIAL DRIVER AND RECEIVER PAIRS SLLS052E – AUGUST 1987 – REVISED OCTOBER 1998 TYPICAL CHARACTERISTICS – RECEIVERS OUTPUT VOLTAGE vs ENABLE VOLTAGE OUTPUT VOLTAGE vs ENABLE VOLTAGE 5 VCC = 4.75 V 3 VID = 0.2 V Load = 1 kΩ to VCC TA = 25°C 5 VO – Output Voltage – V 4 VO – Output Voltage – V 6 VID = 0.2 V Load = 8 kΩ to GND TA = 25°C VCC = 5.25 V VCC = 5 V 2 1 VCC = 5.25 V VCC = 4.75 V 4 VCC = 5 V 3 2 1 0 0 0.5 1 1.5 2 2.5 0 3 0 0.5 VI – Enable Voltage – V 1 1.5 2 2.5 3 VI – Enable Voltage – V Figure 16 Figure 17 APPLICATION INFORMATION SN65ALS180 SN75ALS180 SN65ALS180 SN75ALS180 RT RT Up to 32 Transceivers ... NOTE A: The line should be terminated at both ends in its characteristic impedance (RT = ZO). Stub lengths off the main line should be kept as short as possible. Figure 18. Typical Application Circuit 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1998, Texas Instruments Incorporated