TI SN75ALS1178N

SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154A – MARCH 1993 – REVISED MAY 1995
D
D
D
D
D
D
D
D
D
D
D
D
D
Meet or Exceed Standards EIA/TIA-422-B,
RS-485, CCITT Recommendation V.11
Designed for Multipoint Bus Transmission
on Long Bus Lines in Noisy Environments
Low Supply Current Requirement
50 mA Max
Driver Positive- and Negative-Current
Limiting
Driver Common-Mode Output Voltage
Range of – 7 V to 12 V
Thermal Shutdown Protection
Driver 3-State Outputs Active-High Enable
Receiver Common-Mode Input Voltage
Range of – 12 V to 12 V
Receiver Input Sensitivity . . . ± 200 mV
Receiver Hysteresis . . . 50 mV Typ
Receiver High Input Impedance
12 kΩ Min
Receiver 3-State Outputs Active-Low
Enable for SN75ALS1177 Only
Operate From Single 5-V Supply
description
The SN75ALS1177 and SN75ALS1178 dual
differential drivers and receivers are monolithic
integrated circuits designed for bidirectional data
communication on multipoint bus transmission
lines. They are designed for balanced transmission lines and meet standards EIA/TIA-422-B,
RS-485, and CCITT Recommendation V.11.
SN75ALS1177 . . . N OR NS† PACKAGE
(TOP VIEW)
1B
1A
1R
RE
2R
2A
2B
GND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
1D
1Y
1Z
DE
2Z
2Y
2D
SN75ALS1178 . . . N OR NS† PACKAGE
(TOP VIEW)
1B
1A
1R
1DE
2R
2A
2B
GND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
1D
1Y
1Z
2DE
2Z
2Y
2D
† The NS package is only available in left-end taped and
reeled (SN75ALS1177NSLE and SN75ALS1178SNLE).
The SN75ALS1177 combines dual 3-state differential line drivers and dual 3-state differential input line
receivers, both of which operate from a single 5-V power supply. The drivers and receivers have active-high
and active-low enables, respectively, which can be externally connected together to function as direction
control. The SN75ALS1178 drivers each have an individual active-high enable. Fail-safe design ensures that
when the receiver inputs are open, the receiver outputs are always high.
The SN75ALS1177 and SN75ALS1178 are characterized for operation from 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154A – MARCH 1993 – REVISED MAY 1995
Function Tables
SN75ALS1177, SN75ALS1178
(each driver)
INPUT
D
ENABLE
DE
H
H
L
X
OUTPUTS
Y
Z
H
L
H
L
H
L
Z
Z
SN75ALS1177
(each receiver)
DIFFERENTIAL
A–B
ENABLE
RE
OUTPUT
Y
VID ≥ 0.2 V
– 0.2 V < VID < 0.2 V
L
H
L
?
VID ≤ – 0.2 V
X
L
L
H
Z
Open
L
H
SN75ALS1178
(each receiver)
DIFFERENTIAL
A–B
OUTPUT
Y
VID ≥ 0.2 V
– 0.2 V < VID < 0.2 V
H
VID ≤ – 0.2 V
Open
?
L
H
H = high level, L = low level,
? = indeterminate, X = irrelevant,
Z = high impedance (off)
2
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SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154A – MARCH 1993 – REVISED MAY 1995
logic symbol†
logic diagram (positive logic)
SN75ALS1177
SN75ALS1177
DE
RE
1D
1R
2D
2R
12
4
EN1
DE
EN2
1
15
1
3
14
13
2
2
1
1
9
1
5
10
11
6
2
7
RE
1D
1R
2DE
2D
2R
4
15
EN
1Z
1D
13
2
3
1
12
9
EN
10
11
6
5
7
14
15
13
1A
1B
1R
2Y
2Z
2D
2A
2
3
1
10
9
11
2B
2R
14
4
1Y
SN75ALS1178
1DE
12
6
5
1Y
7
1Y
1Z
1A
1B
2Y
2Z
2A
2B
SN75ALS1178
1Z
1DE
1A
1D
1B
2Y
1R
2Z
2A
2DE
2B
2D
† These symbols are in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
2R
4
14
15
13
2
3
1
12
10
9
11
6
5
7
1Y
1Z
1A
1B
2Y
2Z
2A
2B
equivalent schematics
EQUIVALENT OF DRIVER OR ENABLE INPUT
EQUIVALENT OF RECEIVER INPUT
VCC
VCC
35 kΩ NOM
Input
17 kΩ
NOM
1.7 kΩ
NOM
Input
288 kΩ
NOM
1.7 kΩ
NOM
VCC (A)
or
GND (B)
GND
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SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154A – MARCH 1993 – REVISED MAY 1995
schematics of outputs
TYPICAL OF DRIVER OUTPUTS
TYPICAL OF RECEIVER OUTPUTS
VCC
70 Ω
NOM
VCC
Output
Output
GND
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI (DE, RE, and D inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Output voltage range, VO (Driver) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 9 V to 14 V
Input voltage range, Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 14 V to 14 V
Receiver differential-input voltage range (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 14 V to 14 V
Receiver low-level output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential input voltage, are with respect to the network ground terminal.
2. Differential input voltage is measured at the noninverting terminal with respect to the inverting terminal.
DISSIPATION RATING TABLE
4
PACKAGE
TA ≤ 25°C
POWER RATING
OPERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
N
1150 mW
9.2 mW/°C
736 mW
NS
625 mW
4.0 mW/°C
445 mW
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SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154A – MARCH 1993 – REVISED MAY 1995
recommended operating conditions
Supply voltage, VCC
Differential input voltage, VID
Receiver
Common-mode output voltage, VOC
Driver
Common-mode input voltage, VIC
Receiver
High-level input voltage, VIH
DE, RE, D
Low-level input voltage, VIL
DE, RE, D
High level output current,
High-level
current IOH
Low level output current,
Low-level
current IOL
MIN
NOM
MAX
UNIT
4.75
5
5.25
V
± 12
V
12
V
± 12
V
–7†
2
Driver
Receiver
Driver
V
0.8
V
– 60
mA
– 400
µA
60
Receiver
8
mA
Operating free-air temperature, TA
0
70
°C
† The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode
output and threshold voltage level only.
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SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154A – MARCH 1993 – REVISED MAY 1995
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
VIK
VOH
Input clamp voltage
VOL
|VOD1|
Low-level output voltage
TEST CONDITIONS
II = – 18 mA
VIH = 2 V,
High-level output voltage
Differential output voltage
VIH = 2 V,
IO = 0
|VOD2|
Differential output voltage
VCC = 5 V,,
RL = 100 Ω
|VOD3|
Differential output voltage
∆|VOD|
Change in magnitude of differential
output voltage (see Note 4)
VOC
Common-mode output voltage
∆|VOC|
Change in magnitude of common-mode
output voltage (see Note 4)
IO(OFF)
IOZ
Output current with power off
IIH
IIL
High-level input current
IOS
ICC
Short circuit output current
Short-circuit
Supply current (total package)
IOH = – 33 mA
IOL = 33 mA
MAX
UNIT
– 1.5
V
3.3
V
1.1
V
1.5
6
V
1/2 VOD1
See Figure 1
V
2
RL = 54 Ω
1.5
5
See Note 3
1.5
5
V
± 0.2
V
3
V
± 0.2
V
± 100
µA
± 100
µA
100
µA
– 100
µA
RL = 54 Ω or 100 Ω,
High-impedance-state output current
Low-level input current
VIL = 0.8 V,
VIL = 0.8 V,
TYP†
MIN
See Figure 1
–1‡
VCC = 0,
VO = – 7 V to 12 V
VO = – 7 V to 12 V
VIH = 2.7 V
VIL = 0.4 V
VO = – 7 V
VO = VCC
– 250
VO = 12 V
VO = 0 V
250
No load
250
mA
150
Outputs enabled
35
50
Outputs disabled
20
50
mA
† All typical values are at VCC = 5 V and TA = 25°C.
‡ The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode
output and threshold voltage levels only.
NOTES: 3. See EIA Standard RS-485 Figure 3.5, test termination measurement 2.
4. ∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high
level to a low level.
switching characteristics at VCC = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
9
15
22
ns
9
15
22
ns
0
2
8
ns
tPLH
tPHL
Propagation delay time, high- to low-level output
tsk
tPZH
Output-to-output skew
Output enable time to high level
CL = 100 pF,
See Figure 4
30
35
50
ns
tPZL
tPHZ
Output enable time to low level
CL = 100 pF,
See Figure 5
5
15
25
ns
Output disable time from high level
CL = 15 pF,
See Figure 4
7
15
30
ns
tPLZ
Output disable time from low level
CL = 15 pF,
See Figure 5
7
15
30
ns
6
Propagation delay time, low- to high-level output
RL = 60 Ω
Ω,
See Figure 3
POST OFFICE BOX 655303
CL1 = CL2 = 100 pF,
F
• DALLAS, TEXAS 75265
SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154A – MARCH 1993 – REVISED MAY 1995
RECEIVER SECTION
electrical characteristics over recommended ranges of common-mode input voltage, supply
voltage, and operating free-air temperature (unless otherwise noted)
PARAMETER
VIT+
VIT–
Positive-going input threshold voltage
Vhys
VIK
Input hysteresis voltage (VIT+ – VIT–)
TEST CONDITIONS
VO = 2.7 V,
VO = 0.5 V,
Negative-going input threshold voltage
Enable input clamp voltage
VOH
High-level output voltage
VOL
Low-level output voltage
IOZ
High-impedance-state output current
IO = – 0.4 mA
IO = 8 mA
MIN
TYP†
MAX
0.2
– 0.2 ‡
SN75ALS1177
II
Line input current (see Note 5)
IIH
IIL
High-level input current, RE
SN75ALS1177
Low-level input current, RE
SN75ALS1177
ri
Input resistance
II = – 18 mA
VID = 200 mV,
See Figure 2
IOH = – 400 µA,
VID = 200 mV,
See Figure 2
IOL = 8 mA,
mV
– 1.5
2.7
V
V
VO = 0.4 V to 2.4 V
Other input at 0 V
V
V
50
SN75ALS1177
UNIT
VI = 12 V
VI = – 7 V
0.45
V
± 20
µA
1
– 0.8
VIH = 2.7 V
VIL = 0.4 V
20
– 100
12
mA
µA
µA
kΩ
IOS
Short-circuit output current
VO = 0 V,
See Note 6
– 15
– 85
mA
ICC
Supply current (total package)
No load,
Outputs enabled
35
50
mA
† All typical values are at VCC = 5 V and TA = 25°C.
‡ The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode
output and threshold voltage levels only.
NOTES: 5. Refer to EIA standards RS-422-A, RS-423-A, and RS-485-A for exact conditions.
6. Not more than one output should be shorted at a time.
switching characteristics at VCC = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
tPLH
tPHL
Propagation delay time, low- to high-level output
tPZH
tPZL
Output enable time to high level
tPHZ
tPLZ
MIN
TYP
MAX
UNIT
15
25
37
ns
15
25
37
ns
CL = 15 pF,
pF
See Figure 6
SN75ALS1177
CL = 100 pF,
See Figure 7
10
20
30
ns
Output enable time to low level
SN75ALS1177
CL = 100 pF,
See Figure 7
10
20
30
ns
Output disable time from high level
SN75ALS1177
CL = 15 pF,
See Figure 7
5
12
16
ns
Output disable time from low level
SN75ALS1177
CL = 15 pF,
See Figure 7
5
12
16
ns
Propagation delay time, high- to low-level output
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SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154A – MARCH 1993 – REVISED MAY 1995
PARAMETER MEASUREMENT INFORMATION
RL
2
VID
IOH
VOD2
VOH
RL
2
VOL
VOC
Figure 1. Driver Test Circuit, VOD and VOC
Figure 2. Receiver Test Circuit, VOH and VOL
3V
Driver
Input
CL1 = 100 pF
(see Note B)
Generator
(see Note A)
1.5 V
1.5 V
0V
tPLH
60 Ω
50 Ω
IOL
tPHL
1/2 VO
1/2 VO
Z Output
CL 2 = 100 pF
(see Note B)
VO
Y Output
3V
tsk
DRIVER TEST CIRCUIT
tsk
DRIVER VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
B. CL includes probe and jig capacitance.
Figure 3. Driver Propagation Delay Times
Output
S1
3V
3 V or 0 V
Generator
(see Note A)
1.5 V
Input
1.5 V
0V
CL
(see Note B)
RL = 500 Ω
50 Ω
tPZH
tPHZ
VOH
Output
2.3 V
0V
0.5 V
DRIVER VOLTAGE WAVEFORMS
DRIVER TEST CIRCUIT
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
B. CL includes probe and jig capacitance.
Figure 4. Driver Enable and Disable TImes
8
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SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154A – MARCH 1993 – REVISED MAY 1995
PARAMETER MEASUREMENT INFORMATION
VCC
RL = 500 Ω
3V
S1
Output
3 V or 0 V
Generator
(see Note A)
Input
1.5 V
1.5 V
0V
tPLZ
tPZL
0.5 V
CL
(see Note B)
0V
50 Ω
2.3 V
Output
VOL
DRIVER VOLTAGE WAVEFORMS
DRIVER TEST CIRCUIT
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
B. CL includes probe and jig capacitance.
Figure 5. Driver Enable and Disable Times
Output
Generator
(see Note A)
50 Ω
1 kΩ
0V
CL
(see Note B)
1 kΩ
VCC
1N916 or
Equivalent
0 V (SN75ALS1177 only)
RECEIVER TEST CIRCUIT
2.5 V
0V
Input
0V
– 2.5 V
tPHL
tPLH
VOH
Output
1.5 V
1.5 V
VOL
DRIVER VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
B. CL includes probe and jig capacitance.
Figure 6. Receiver Propagation Delay Times
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SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154A – MARCH 1993 – REVISED MAY 1995
PARAMETER MEASUREMENT INFORMATION
S1
Output
1.5 V
S2
1 kΩ
VCC
–1.5 V
CL
(see Note B)
Generator
(see Note A)
1 kΩ
1N916 or
Equivalent
50 Ω
S3
RECEIVER TEST CIRCUIT
3V
Input
1.5 V
1.5 V
0V
S1 to –1.5 V
S2 Closed tPZL
S3 Closed
S1 to –1.5 V
S2 Closed
S3 Closed
tPLZ
0.5 V
5V
1.5 V
Output
VOL
S1 to 1.5 V
S2 Open tPZH
S3 Closed
VOH
1.5 V
S1 to 1.5 V
S2 Open tPHZ
S3 Closed
0V
0.5 V
RECEIVER VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
B. CL includes probe and jig capacitance.
Figure 7. Receiver Output Enable and Disable TImes
10
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pertaining to warranty, patent infringement, and limitation of liability.
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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Copyright  1998, Texas Instruments Incorporated