TI SN75LBC180N

SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
D
D
D
D
D
D
D
D
D
Designed for High-Speed Multipoint Data
Transmission Over Long Cables
Operate With Pulse Durations as Low
as 30 ns
Low Supply Current . . . 5 mA Max
Meet or Exceed the Requirements of ANSI
Standard RS-485 and ISO 8482:1987(E)
3-State Outputs for Party-Line Buses
Common-Mode Voltage Range of
– 7 V to 12 V
Thermal Shutdown Protection Prevents
Driver Damage From Bus Contention
Positive and Negative Output Current
Limiting
Pin Compatible With the SN75ALS180
D OR N PACKAGE
(TOP VIEW)
NC
R
RE
DE
D
GND
GND
Both the SN65LBC180 and SN75LBC180
combine a differential line driver and receiver with
3-state outputs and operate from a single 5-V
supply. The driver and receiver have active-high
and active-low enables, respectively, which can
be externally connected to function as a direction
control. The driver differential outputs and the
receiver differential inputs are connected to
separate terminals for full-duplex operation and
are designed to present minimum loading to the
bus whether disabled or powered off (VCC = 0).
These parts feature a wide common-mode
voltage range making them suitable for
point-to-point or multipoint data-bus applications.
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC
VCC
A
B
Z
Y
NC
NC – No internal connection
Function Tables
DRIVER
INPUT
D
H
L
X
description
The SN65LBC180 and SN75LBC180 differential
driver and receiver pairs are monolithic integrated
circuits designed for bidirectional data
communication over long cables that take on the
characteristics of transmission lines. They are
balanced, or differential, voltage mode devices
that meet or exceed the requirements of industry
standards ANSI RS-485 and ISO 8482:1987(E).
Both devices are designed using TI’s proprietary
LinBiCMOS with the low power consumption of
CMOS and the precision and robustness of
bipolar transistors in the same circuit.
1
ENABLE
DE
H
H
L
OUTPUTS
Y
Z
H
L
L
H
Z
Z
RECEIVER
DIFFERENTIAL INPUTS
A–B
VID ≥ 0.2 V
– 0.2 V < VID < 0.2 V
VID ≤ – 0.2 V
X
Open circuit
OUTPUT
R
H
?
L
Z
H
ENABLE
RE
L
L
L
H
L
H = high level, L = low level, ? = indeterminate, X = irrelevant,
Z = high impedance (off)
logic symbol†
DE
4
EN1
5
R
10
1
D
RE
9
1
3
12
EN2
2
11
2
Y
Z
A
B
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
logic diagram (positive logic)
4
DE
D
RE
R
5
9
10
3
2
12
11
Y
Z
A
B
LinBiCMOS is a trademark of Texas Instruments Incorporated.
Copyright  2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
description (continued)
The devices also provide positive and negative output-current limiting and thermal shutdown for protection from
line fault conditions. The line driver shuts down at a junction temperature of approximately 172°C.
The SN65LBC180 and SN75LBC180 are available in the 14-pin dual-in-line and small-outline packages. The
SN75LBC180 is characterized for operation over the commercial temperature range of 0°C to 70°C. The
SN65LBC180 is characterized over the industrial temperature range of – 40°C to 85°C.
schematics of inputs and outputs
EQUIVALENT OF D, DE, AND RE INPUTS
RECEIVER A INPUT
VCC
VCC
100 kΩ
NOM
18 kΩ
NOM
22 kΩ
3 kΩ
NOM
Input
Input
12 kΩ
1.1 kΩ
NOM
RECEIVER B INPUT
DRIVER OUTPUT
VCC
VCC
18 kΩ
NOM
TYPICAL OF RECEIVER OUTPUT
3 kΩ
NOM
Input
A Output
Output
100 kΩ
NOM
2
VCC
12 kΩ
1.1 kΩ
NOM
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 7 V
Input voltage range, VI (A, B)(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 10 V to 15 V
Voltage range at D, R, DE, RE (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to VCC + 0.5 V
Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
Total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA: SN65LBC180 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
SN75LBC180 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to GND.
2. The maximum operating junction temperature is internally limited. Use the dissipation rating table to operate below this temperature.
DISSIPATION RATING TABLE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
D
950 mW
7.6 mW/°C
608 mW
494 mW
N
1150 mW
9.2 mW/°C
736 mW
598 mW
PACKAGE
recommended operating conditions
Supply voltage, VCC
High-level input voltage, VIH
D, DE, and RE
Low-level input voltage, VIL
D, DE, and RE
Differential input voltage, VID
Voltage at any bus terminal (separately or common mode), VO, VI, or VIC
A, B, Y, or Z
MIN
NOM
MAX
UNIT
4.75
5
5.25
V
2
– 6‡
–7‡
Y or Z
High level output current,
High-level
current IOH
Low level output current
Low-level
current, IOL
0.8
V
6
V
12
V
– 60
R
–8
Y or Z
60
R
free air temperature,
temperature TA
Operating free-air
V
8
SN65LBC180
– 40
85
SN75LBC180
0
70
mA
mA
°C
‡ The algebraic convention where the least positive (more negative) limit is designated minimum, is used in this data sheet for the differential input
voltage, voltage at any bus terminal, operating temperature, input threshold voltage, and common-mode output voltage.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
DRIVER SECTION
electrical characteristics over recommended operating conditions (unless otherwise noted)
MIN
TYP†
RL = 54 Ω,,
See Figure 1
SN65LBC180
1.1
2.5
5
SN75LBC180
1.5
2.5
5
RL = 60 Ω,,
See Figure 2
SN65LBC180
1.1
2
5
SN75LBC180
1.5
2
5
PARAMETER
VIK
| VOD |
TEST CONDITIONS
Input clamp voltage
II = – 18 mA
Differential output voltage
g magnitude
g
(see Note 3)
∆| VOD |
Change in magnitude of differential output
voltage (see Note 4)
VOC
Common-mode output voltage
∆| VOC |
Change in magnitude of common-mode output
voltage (see Note 4)
RL = 54 Ω,
See Figure 1
IO
IOZ
Output current with power off
VCC = 0,
VO = – 7 V to 12 V
VO = – 7 V to 12 V
IIH
IIL
High-level input current
Low-level input current
IOS
ICC
MAX
UNIT
– 1.5
V
V
± 0.2
V
3
V
± 0.2
V
± 100
µA
± 100
µA
VI = 2.4 V
VI = 0.4 V
– 100
µA
– 100
µA
Short-circuit output current
– 7 V ≤ VO ≤ 12 V
± 250
mA
Supply current
Receiver disabled
See Figures 1 and 2
1
High-impedance-state output current
2.5
Outputs enabled
5
Outputs disabled
3
mA
† All typical values are at VCC = 5 V and TA = 25°C.
NOTES: 3. The minimum VOD specification of the SN65LBC180 may not fully comply with ANSI RS-485 at operating temperatures below 0°C.
System designers should take the possibly lower output signal into account in determining the maximum signal-transmission
distance.
4. ∆ | VOD | and ∆ | VOC | are the changes in the steady-state magnitude of VOD and VOC, respectively, that occur when the input is
changed from a high level to a low level.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER
td(OD)
tt(OD)
Differential output delay time
tPZH
tPZL
tPHZ
tPLZ
4
TEST CONDITIONS
MIN
TYP
MAX
UNIT
7
12
18
ns
5
10
20
ns
RL = 54 Ω
Ω,
See Figure 3
Output enable time to high level
RL = 110 Ω,
See Figure 4
35
ns
Output enable time to low level
RL = 110 Ω,
See Figure 5
35
ns
Output disable time from high level
RL = 110 Ω,
See Figure 4
50
ns
Output disable time from low level
RL = 110 Ω,
See Figure 5
35
ns
Differential output transition time
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
RECEIVER SECTION
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
VIT +
VIT –
Positive-going input threshold voltage
Vhys
VIK
Hysteresis voltage ( VIT + – VIT –)
VOH
VOL
High-level output voltage
IOZ
IIH
High-impedance-state output current
IIL
Low-level enable-input current
II
ICC
TEST CONDITIONS
IO = – 8 mA
IO = 8 mA
Negative-going input threshold voltage
MIN
TYP
MAX
0.2
– 0.2
II = – 18 mA
VID = 200 mV,
Low-level output voltage
VID = – 200 mV,
VO = 0 V to VCC
High-level enable-input current
3.5
4.5
0.3
VIH = 2.4 V
VIL = 0.4 V
Bus input current
Supply current
mV
– 1.5
IOH = – 8 mA
IOL = 8 mA
V
V
0.5
V
± 20
µA
– 50
µA
– 100
µA
VI = 12 V,
Other input at 0 V
VCC = 5 V,
0.7
1
VI = 12 V,
Other input at 0 V
VCC = 0 V,
0.8
1
VI = – 7 V,
Other input at 0 V
VCC = 5 V,
– 0.5
– 0.8
VI = – 7 V,
Other input at 0 V
VCC = 0 V,
– 0.5
– 0.8
Driver disabled
V
V
45
Enable-input clamp voltage
UNIT
mA
Outputs enabled
5
Outputs disabled
3
mA
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPHL
tPLH
Propagation delay time, high- to low-level output
11
22
33
ns
Propagation delay time, low- to high-level output
11
22
33
ns
tsk(p)
Pulse skew ( tPHL – tPLH  )
3
6
ns
tt
tPZH
Transition time
tPZL
tPHZ
Output enable time to low level
tPLZ
Output disable time from low level
VID = –1.5
1 5 V to 1.5
1 5 V,
V
See Figure 6
5
Output enable time to high level
Output disable time from high level
See Figure 7
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
8
ns
35
ns
30
ns
35
ns
30
ns
5
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
PARAMETER MEASUREMENT INFORMATION
Y
RL
2
D
VOD
0 V or 3 V
RL
2
DE at 3 V
VOC
Z
Figure 1. Differential and Common-Mode Output Voltages
Vtest
– 7 V < Vtest < 12 V
R1
375 Ω
Y
D
RL = 60 Ω
0 V or 3 V
VOD
Z
DE at 3 V
R2
375 Ω
Vtest
Figure 2. Driver VOD Test Circuit
3V
Input
1.5 V
Y
CL = 50 pF
(see Note B)
Generator
(see Note A)
RL = 54 Ω
50 Ω
1.5 V
0V
td(OD)
≈ 2.5 V
td(OD)
Output
Output
90%
50%
10%
90%
50%
10%
Z
DE at 3 V
tt(OD)
TEST CIRCUIT
≈ – 2.5 V
tt(OD)
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR > 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 3. Driver Test Circuit and Differential Output Delay and Transition Time Voltage Waveforms
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
PARAMETER MEASUREMENT INFORMATION
Y
0 V or 3 V
D
DE
50 Ω
1.5 V
Input
Output
Z
Input
Generator
(see Note A)
3V
S1
0V
0.5 V
tPZH
RL = 110 Ω
CL = 50 pF
(see Note B)
1.5 V
VOH
Output
2.3 V
Voff ≈ 0
tPHZ
TEST CIRCUIT
VOLTAGE WAVEFORMS
Figure 4. Driver Test Circuit and Enable and Disable Time Waveforms
5V
Y
D
0 V or 3 V
RL = 110 Ω
S1
Input
1.5 V
0V
Output
Z
tPZL
CL = 50 pF
(see Note B)
DE
Generator
(see Note A)
3V
1.5 V
Input
tPLZ
5V
0.5 V
50 Ω
2.3 V
Output
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
Figure 5. Driver Test Circuit and Enable and Disable Time Voltage Waveforms
3V
Input
Input
Generator
(see Note A)
R
50 Ω
1.5 V
1.5 V
A
B
1.5 V
0V
Output
tPLH
RE
CL = 15 pF
(see Note B)
Output
0V
tPHL
90%
1.3 V
10%
tt
TEST CIRCUIT
VOH
90%
1.3 V
10%
VOL
tt
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 6. Receiver Test Circuit and Propagation Delay Time Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
PARAMETER MEASUREMENT INFORMATION
Output
S1
1.5 V
A
R
– 1.5 V
2 kΩ
S2
5V
B
CL = 15 pF
(see Note B)
RE
IN916 or Equivalent
(4 places)
5 kΩ
Input
Generator
(see Note A)
50 Ω
S3
TEST CIRCUIT
3V
Input
1.5 V
S1 to – 1.5 V
S2 Closed
1.5 V S3 Open
3V
S1 to 1.5 V
S2 Open
S3 Closed
Input
0V
0V
tPZH
tPZL
VOH
Output
1.5 V
0V
≈ 4.5 V
Output
1.5 V
VOL
3V
Input
1.5 V
S1 to 1.5 V
S2 Closed
S3 Closed
3V
Input
1.5 V
0V
0V
tPHZ
tPLZ
≈ 1.3 V
VOH
Output
Output
0.5 V
S1 to – 1.5 V
S2 Closed
S3 Closed
≈ 1.3 V
0.5 V
VOL
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 7. Receiver Output Enable and Disable Times
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
TYPICAL CHARACTERISTICS
DRIVER
DRIVER
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
5
VCC = 5 V
TA = 25°C
4.5
VCC = 5 V
TA = 25°C
4.5
VOL– Low-Level Output Voltage – V
VOH – High-Level Output Voltage – V
5
4
3.5
3
2.5
2
1.5
1
0.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0
0
10 20 30 40 50 60 70 80 90 100
IOH – High-Level Output Current – mA
0
20
40
60
80
100
IOL – Low-Level Output Current – mA
Figure 8
Figure 9
DRIVER
DRIVER
DIFFERENTIAL OUTPUT VOLTAGE
vs
OUTPUT CURRENT
DIFFERENTIAL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
3
VCC = 5 V
TA = 25°C
VOD – Differential Output Voltage – V
VOD – Differential Output Voltage – V
4
3.5
3
2.5
2
1.5
1
0.5
0
0
10
20
120
30 40 50 60 70 80
IO – Output Current – mA
90
100
2.5
VCC = 5 V
Load = 54 Ω
VIH = 2 V
2
1.5
1
0.5
0
– 50
– 25
50
75
100
0
25
TA – Free-Air Temperature – °C
125
Figure 11
Figure 10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
TYPICAL CHARACTERISTICS
DRIVER
DRIVER
DIFFERENTIAL DELAY TIMES
vs
FREE-AIR TEMPERATURE
OUTPUT CURRENT
vs
SUPPLY VOLTAGE
80
20
RL = 54 Ω
60
td(ODL)
IOL
40
15
I O – Output Current – mA
t d(OD)– Differential Delay Time – ns
VCC = 5 V
Load = 54 Ω
td(ODH)
10
5
20
0
– 20
– 40
IOH
– 60
0
– 50
– 80
– 25
100
50
75
0
25
TA – Free-Air Temperature – °C
125
0
1
Figure 12
4
5
RECEIVER
RECEIVER
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
6
1
VID = 200 mV
VCC = 5 V
TA = 25°C
VID = – 200 mV
0.9
5
VOL – Low-Level Output Voltage – V
VOH – High-Level Output Voltage – V
3
Figure 13
6
4
3
2
1
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
0
–10
– 20
– 30
– 40
IOH – High-Level Output Current – mA
– 50
0
5
10
15
20
25
35
30
IOL – Low-Level Output Current – mA
Figure 15
Figure 14
10
2
VCC – Supply Voltage – V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
40
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
TYPICAL CHARACTERISTICS
RECEIVER
AVERAGE SUPPLY CURRENT
vs
FREQUENCY
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
60
I CC – Average Supply Current – mA
6
VO – Output Voltage – V
5
VIC = 12 V
4
VIC = 0 V
3
2
VIC = –7 V
TA = 25°C
VCC = 5 V
55
50
DRVR and RCVR Enabled
Driver Load = Receiver Inputs
Receiver Load = 50 pF
45
40
35
30
25
20
15
10
1
5
0
– 80 – 60
– 40
– 20
0
20
40
60
0
10 k
80
100 k
VID – Differential Input Voltage – mV
1M
10 M
f – Frequency – Hz
100 M
Figure 17
Figure 16
RECEIVER
BUS INPUT CURRENT
vs
INPUT VOLTAGE
(COMPLEMENTARY INPUT AT 0 V)
I I – Bus Input Current – mA
0.8
0.6
0.4
0.2
0
– 0.2
– 0.4
– 0.6
– 0.8
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
–1
–8
24.5
TA = 25°C
VCC = 5 V
The shaded region of this graph represents
more than 1 unit load per RS-485.
–6 –4
–2
0
2
4
6
8
10
12
Propagation Delay Time – ns
1
RECEIVER
PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
VCC = 5 V
CL = 15 pF
VIO = ± 1.5 V
24
tPHL
23.5
23
tPLH
22.5
22
– 40
– 20
0
20
40
60
80
100
TA – Free-Air Temperature – °C
VI – Input Voltage – V
Figure 18
Figure 19
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
APPLICATION INFORMATION
SN65LBC180
SN75LBC180
SN65LBC180
SN75LBC180
RT
RT
Up to 32
Unit Loads
• • •
NOTE A: The line should be terminated at both ends in its characteristic impedance (RT = ZO). Stub lengths off the main line should be kept
as short as possible. One SN75LBC180 typically represents less than one unit load.
Figure 20. Typical Application Circuit
12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
14
0.010 (0,25) M
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°– 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.069 (1,75) MAX
0.010 (0,25)
0.004 (0,10)
PINS **
0.004 (0,10)
8
14
16
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MIN
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
DIM
4040047 / D 10/96
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
Falls within JEDEC MS-012
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
13
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
MECHANICAL DATA
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PINS SHOWN
PINS **
14
16
18
20
A MAX
0.775
(19,69)
0.775
(19,69)
0.920
(23,37)
0.975
(24,77)
A MIN
0.745
(18,92)
0.745
(18,92)
0.850
(21,59)
0.940
(23,88)
DIM
A
16
9
0.260 (6,60)
0.240 (6,10)
1
8
0.070 (1,78) MAX
0.035 (0,89) MAX
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.010 (0,25) M
0°– 15°
0.010 (0,25) NOM
14/18 PIN ONLY
4040049/C 08/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20-pin package is shorter than MS-001).
14
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright  2000, Texas Instruments Incorporated