MH88437-P Data Access Arrangement Advance Information Features • • • • • • • • • • • • • • • • • DS5060 FAX and Modem interface (V.34/V.34+) Designed to work at data rates up to 56kbits External programmable line and network balance impedances Programmable DC termination characteristics IEC950 recognised component Transformerless 2-4 Wire conversion Integral Loop Switch Dial Pulse and DTMF operation Accommodates parallel phone detection Line state detection outputs: -loop current/ringing voltage/line voltage +5V operation, low on-hook power (25mW) Full duplex voice and data transmission On-Hook reception from the line Meets French current limit requirements Conforms to German dial pulse standards Approvable to UL 1950 Industrial Temperature Range Available Applications Interface to Central Office or PABX line for: • FAX/Modem • Electronic Point of Sale • Security System ISSUE 4 October 1998 Package Information MH88437AD-P 28 Pin DIL Package MH88437AS-P 28 Pin SM Package 0˚C to 70˚C MH88437AD-PI Ind. Temp. DIL Variant -40˚C to +80˚C MH88437AS-PI Ind. Temp. SM Variant -40˚C to + 80˚C • • Telemetry Set Top Boxes Description The Mitel MH88437 Data Access Arrangement (D.A.A.) provides a complete interface between audio or data transmission equipment and a telephone line. All functions are integrated into a single thick film hybrid module which provides high voltage isolation, very high reliability and optimum circuit design, needing a minimum of external components. The impedance and network balance are externally programmable, as are the DC termination characteristics, making the device suitable for most countries worldwide. Isolation Barrier OptoIsolation TIP RING Input Buffer & Line Termination Isolation VCC VBIAS AGND CL LC Logic Input Buffer VR+ Analog Buffer VRNB1 NB2 Isolation VLOOP1 VLOOP2 Isolation Network Connections THL cancellation and line impedance matching circuit Analog Buffer Ring & Loop Buffer VX ZA RV LCD LOOP RS User Connections Figure 1 - Functional Block Diagram 1 MH88437-P Advance Information NB1 NB2 VR+ VRVX LC ZA AGND VCC VBIAS LOOP IC RS IC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 TIP RING IC VLOOP1 VLOOP2 IC SC SC IC NP NP CL RV LCD Figure 2 - Pin Connections Pin Description 2 Pin # Name Description 1 NB1 Network Balance 1. External passive components must be connected between this pin and NB2. 2 NB2 Network Balance 2. External passive components must be connected between this pin and NB1. 3 VR+ Differential Receive (Input). Analog input from modem/fax chip set. 4 VR- Differential Receive (Input). Analog input from modem/fax chip set. 5 VX Transmit (Output). Ground referenced (AGND) output to modem/fax chip set, biased at +2.0V. 6 LC Loop Control (Input). A logic 1 applied to this pin activates internal circuitry which provides a DC termination across Tip and Ring. This pin is also used for dial pulse application. 7 ZA Line Impedance. Connect impedance matching components from this pin to Ground (AGND). 8 AGND 9 VCC 10 VBIAS Internal Reference Voltage. +2.0V reference voltage. This pin should be decoupled externally to AGND, typically with a 10µF 6.3V capacitor. 11 LOOP Loop (Output). The output voltage on this pin is proportional to the line voltage across Tip Ring, scaled down by a factor of 50. 12, 14 IC Internal Connection. No connection should be made to this pin externally. 13 RS Ringing Sensitivity. Connecting a link or resistor between this pin and LOOP (pin 11) will vary the ringing detection sensitivity of the module. 15 LCD 16 RV Ringing Voltage Detect (Output). The RV output indicates the presence of a ringing voltage applied across the Tip and Ring leads. 17 CL Current Limit. A logic 0 applied to this pin activates internal circuitry which limits the loop current. 18 NP No Pin. Isolation Barrier, fitted, no pin fitted in this position. 19 NP No Pin. Isolation barrier, no pin fitted in this position Analog Ground. 4-Wire 0V reference connect to mains earth (ground). Positive Supply Voltage. +5V. Loop Condition Detect (Output). Indicates the status of loop current. MH88437-P Advance Information Pin Description (continued) Pin # Name Description 20,23 26 IC Internal Connection. No connection should be made to this pin externally. 21,22 SC Short Circuit. These two pins should be connected to each other via a 0Ω link. 24 VLOOP2 Loop Voltage Control Node 2. Used to set DC termination characteristics. 25 VLOOP1 Loop Voltage Control Node 1. Used to set DC termination characteristics. 27 RING 28 TIP Ring Lead. Connects to the “Ring” lead of the telephone line. Tip Lead. Connects to the “Tip” lead of the telephone line. Functional Description The device is a Data Access Arrangement (D.A.A.). It is used to correctly terminate a 2-Wire telephone line. It provides a signalling link and a 2-4 Wire line interface between an analog loop and subscriber data transmission equipment, such as Modems, Facsimiles (Fax’s), Remote Meters, Electronic Point of Sale equipment and Set Top Boxes. applications the MH88437 will comply with Luxembourg and Italian specifications. For approval in Denmark and Sweden the TRB21 route is recommended. Approval specifications are regularly changing and the relevant specification should always be consulted before commencing design. Line Termination Isolation Barrier The device provides an isolation barrier capable of meeting the supplementary barrier requirements of the international standard IEC 950 and the national variants of this scheme such as EN 60950 for European applications and UL 1950 for North American applications. External Protection Circuit An External Protection Circuit assists in preventing damage to the device and the subscriber equipment, due to over-voltage conditions. See Application Note MSAN-154 for recommendations. Suitable Markets The MH88437 has features such as programmable line and network balance impedance, programmable DC termination and a supplementary isolation barrier. For countries that do not need to meet the French and German requirements there is a pin for pin compatible device the MH88435. There are, however, a small number of countries with a 100MΩ leakage requirement that this device does not meet. These are Belgium, Greece, Italy, Luxembourg, Spain and Poland. Although Luxembourg will now accept TBR21 and there are exceptions to the Italian specification, in most When Loop Control (LC) is at a logic 1, a line termination is applied across Tip and Ring. The device can be considered off-hook and DC loop current will flow. The line termination consists of both a DC line termination and an AC input impedance. It is used to terminate an incoming call, seize the line for an outgoing call, or if it is applied and disconnected at the required rate, can be used to generate dial pulses. The DC termination resembles approximately 300Ω resistance, which is loop current dependent. Furthermore, it can be programmed to meet different national requirements. For normal operation VLOOP3 should be open circuit and a resistor (R2) should be fitted between VLOOP1 and VLOOP2, as shown in Figure 4. The approval specification will give a DC mask characteristic that the equipment will need to comply to. The DC mask specifies the amount of current the DAA can sink for a given voltage across tip and ring. Graph 1 shows how the voltage across tip and ring varies with different resistors (R2) for a given loop current. Network Balance The network balance impedance of the device can be programmed by adding external components By 3 MH88437-P Advance Information 40 35 30 Iloop=15mA 25 Iloop=20mA V(t-r) 20 Iloop=26mA 15 10 5 0 50 150 250 350 450 550 650 750 850 950 R2(kOhms) Figure 3 - DC Programming Capability applying a logic 0 to Pin 17, CL, the loop current will be limited to below 60mA as required in France and the European TBR21 specification. For all other countries where current limiting is not required, CL should be set to 1. To find the external programming components for configuration 4, the following formula should be used: The AC input impedance should be set by the user to match the line impedance. e.g. If the required input impedance = 220Ω + (820Ω/ /115nF), the external network to be connected to ZA will be: Zext = [(10 x R1)-1k3]+[(10 x R2)//(C1/10)] Input Impedance The MH88437 has a programmable input impedance set by fitting external components between the ZA pin and AGND. ZA = 900Ω + (8k2Ω//12nF) Where the input impedance (Z) = 600R the equation can be simplified to: ZA = (10 x Z) - 1k3Ω For complex impedances the configuration shown in Figure 4 (below) is most commonly found. R1 Note: A table of commonly used impedances can be found in the DAA Application’s document MSAN-154. R2 C1 Figure 4 - Complex Impedances 4 ZA = 4k7Ω Where Zext = external network connected between ZA and AGND and Zint = 1.3kΩ (internal resistance) between NB1 and NB2. For countries where the balance impedance matches the line impedance, a 16kΩ resistor should be added between NB1 and NB2. MH88437-P Advance Information Ringing Voltage Detection 2-4 Wire Conversion The sensitivity of the ringing voltage detection circuitry can be adjusted by applying an external resistor (R7, Figure 5) between the RS and LOOP pins. With a short circuit, the threshold sensitivity is ~10Vrms, therefore R7 = 30kΩ x (Desired threshold voltage - 10Vrms). The device converts the balanced 2-Wire input, presented by the line at Tip and Ring, to a ground referenced signal at VX, biased at 2.0V. This simplifies the interface to a modem chip set. Example: 300kΩ gives ~20Vrms and 600kΩ gives ~30Vrms. An AC ringing voltage across Tip and Ring will cause RV to output TTL pulses at the ringing frequency, with an envelope determined by the ringing cadence. Parallel Phone and Dummy Ringer An external parallel phone or dummy ringer circuit can be connected across Tip and Ring as shown in Figure 5. A Dummy Ringer is an AC load which represents a telephone’s mechanical ringer. In normal circumstances when a telephone is OnHook and connected to the PSTN, its AC (Ringer) load is permanently presented to the network. This condition is used by many PTT’s to test line continuity, by placing a small AC current onto the line and measuring the voltage across tip (A) and ring (B). Today’s telecom equipment may not have an AC load present across tip and ring (e.g. modems), therefore any testing carried out by the PTT will see an open circuit across tip and ring. In this instance the PTT assumes that the line continuity has been damaged. To overcome this problem many PTT’s specify that a "Dummy Ringer" is presented to the network at all times. Ideally its impedance should be low in the audio band and high at the ringing frequencies (e.g. 25Hz). Note that the requirement for the "Dummy Ringer" is country specific. Parallel phone detection is used mostly in set-top box applications. This is when a modem call will need to be disconnected from the central office by the equipment when the parallel phone is in the offhook state. This is to allow the subscriber to make emergency calls. To detect this state, additional circuitry will be required. Refer to Application Note MSAN-154. Conversely, the device converts the differential signal input at VR+ and VR- to a balanced 2-Wire signal at Tip and Ring. The device can also be used in a single ended mode at the receive input, by leaving VR+ open circuit and connecting the input signal to VR- only. Both inputs are biased at 2.0V. During full duplex transmission, the signal at Tip and Ring consists of both the signal from the device to the line and the signal from the line to the device. The signal input at VR+ and VR- being sent to the line, must not appear at the output VX. In order to prevent this, the device has an internal cancellation circuit, the measure of this attenuation is Transhybrid Loss (THL). The MH88437 has the ability to transmit analog signals from Tip and Ring through to VX when onhook. This can be used when receiving caller line identification information. Transmit Gain The Transmit Gain of the MH88437 is the gain from the differential signal across Tip and Ring to the ground referenced signal at VX. The internal Transmit Gain of the device is fixed as shown in the AC Electrical Characteristics table. For the correct gain, the Input Impedance of the MH88437, must match the specified line impedance. By adding an external potential divider to VX, it is possible to reduce the overall gain in the application. The output impedance of VX is approximately 10Ω and the minimum resistance from VX to ground should be 2kΩ. Example: If R3 = R4 = 2kΩ, in Figure 5, the overall gain would reduce by 6.0dB. Receive Gain The Receive Gain of the MH88437 is the gain from the differential signal at VR+ and VR- to the differential signal across Tip and Ring. The internal Receive Gain of the device is fixed as shown in the AC Electrical Characteristics table. For the correct 5 MH88437-P Advance Information gain, the Input Impedance of the MH88437 must match the specified line impedance. With an internal series input resistance of 47kΩ at the VR+ and VR- pins, external series resistors can be used to reduce the overall gain. Overall Receive (47kΩ+R5)). Gain = 0dB+20log (47kΩ/ For differential applications R6 must be equal to R5 in Figure 5. Example: If R5 = R6 = 47k in Figure 3, the overall gain would reduce by 6.0dB. Supervisory Features The device is capable of monitoring the line conditions across Tip and Ring, this is shown in Figure 5. The Loop Condition Detect pin (LCD), indicates the status of the line. The LCD output is at logic 1 when loop current flows, indicating that the MH88437 is in an off hook state. LCD will also go high if a parallel phone goes off-hook. Therefore, line conditions can be determined with the LC and the LCD pins. The LOOP pin output voltage VLOOP is proportional to the line voltage across Tip and Ring scaled down by a factor of 50 and offset by 2.0V(t-r). With the aid of a simple external detector the LC, LCD and LOOP pins can be used to generate the signals necessary for parallel phone operation, e.g. with a Set Top Box. See MSAN-154 for further details. When the device is generating dial pulses, the LCD pin outputs TTL pulses at the same rate. The LCD output will also pulse if a parallel phone is used to dial and when ringing voltage is present at Tip and Ring. Mechanical Data See Figures 12, 13 and 14 for details of the mechanical specification. 6 MH88437-P Advance Information +5V 28 22 13 11 TIP VX VR- L2 R1 LOOP 21 VLOOP2 VCC VLOOP1 9 25 24 TIP R7 R2 + RS C2 MH88437 VR+ D1 D2 C1 C8 L1 RING C7 AGND VBIAS 10 8 C3 + ZA 7 R3 C4 Analog Output 4 R5 C5 Analog Input 3 R6 C6 16 LCD 15 NB1 RING 5 RV LC 27 R4 NB2 Ringing Voltage Detect Output Loop Current Detect Output 6 1 2 Analog Input Loop Control Input ZB CL Zext Notes: = Ground (Earth) 1) R1 & C1: Dummy Ringer, country specific typically 0.39µF, 250V & 3kΩ 2) R2: DC Mask Resistor 120kΩ typical 3) R3 & R4: Transmit Gain Resistors ≥ 2k2 4) R5 = R6: Receive Gain Resistors typically 100k 5) ZB: Network Balance Impedance 6) C2 & C3 = 10µF 6V 7) C7 & C8 = 39nF for 12kHz filter and 22nF for 16KHz filter. These can be left off if meter pulse filtering not required. 8) Zext: External Impedance 9) D1 Zener Diode 6V2 10) L1, L2 = 4.7mH RDC<10Ω. These can be left off if meter pulse filtering not required. 11) C4, C5 & C6 = 1µF coupling capacitors 12) R7 = 620kΩ (30V RMS ringing sensitivity) 13) D2 = Teccor P2703 Protection Figure 5 - Typical Application Circuit 7 MH88437-P Advance Information . Absolute Maximum Ratings* - All voltages are with respect to AGND unless otherwise specified. Parameter Sym Min Max Units VCC -0.3 6 V Comments 1 DC Supply Voltage 2 Storage Temperature TS -55 +125 ˚C 3 DC Loop Voltage VTR -110 +110 V 4 Transient loop voltage VTR 300 V 1ms On hook 5 Ringing Voltage VR 150 Vrms VBAT = -56V 6 Loop Current ILOOP 60 90 mA mA 7 Ring Trip Current ITRIP 180 mArms CL=0 VTIP-RING ≤40V CL=1 250ms 10% duty cycle or 500ms single shot *Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied. Recommended Operating Conditions Parameter Sym Min Typ‡ Max Units 1 DC Supply Voltages VCC 4.75 5.0 5.25 V 2 Operating Temperatures Industrial Temperature TOP 0 -40 25 70 +85 ˚C 90 Vrms Max Units 7 Vrms Vrms 3 Ringing Voltage VR 75 ‡ Typical figures are at 25˚C with nominal +5V supply and are for design aid only Test Conditions VBat = -48V Loop Electrical Characteristics † Characteristics 1 Sym Ringing Voltage Min Typ‡ VR No Detect Detect Test Conditions Externally Adjustable 14 2 Ringing Frequency 15 68 Hz 3 Operating Loop Current 15 60 80 mA mA CL=0 VTIP-RING ≤40V CL=1 (see Note 1) 4 Off-Hook DC Voltage 6.0 6.0 7.8 V V V Externally Adjustable ILOOP=15mA) ILOOP=20mA) (Note 3) ILOOP=26mA) where R2 = 110kΩ 10 7 µA mA 100V DC (see Note 2) 1000V AC 9 18 10 20 µΑ VBAT (= -50V) VBAT (= -100V) +1 +1 +2 +2 ms ms Dial pulse delay 16 V 5 Leakage Current (Tip or Ring to AGND) 6 Leakage Current on-hook (Tip to Ring) 7 Dial Pulse Detection ON OFF 0 0 8 Loop Condition Detect Threshold Off-Hook 5 Voltage across tip and ring † Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated. ‡ Typical figures are at 25°C with nominal + 5V supplies and are for design aid only. Note 1: Low Loop current operation depends on value of resistor connected between V Loop 1 and V Loop 2. Note 2: This is equivalent to 10MΩ leakage Tip/Ring to Ground. Note 3. Refer to EIA/TIA 464 Section 4.1.1.4.4 8 MH88437-P Advance Information ) Variations from Standard Loop Electrical Characteristics (MH88437AD-PI/MH88437AS-PI) (+70˚C to +85˚C) Characteristics 1 Sym Operating Loop Current Min Typ 16 Max Units Test Conditions 60 80 mA mA CL\=0 CL\=1 DC Electrical Characteristics † Characteristics 1 2 3 4 RV, LCD LC VR+ VR- Sym Supply Current ICC Low Level Output Voltage High Level Output Voltage VOL VOH Low Level Input Voltage High Level Input Voltage Low Level Input Current High Level Input Current VIL VIH IIL IIH DC common mode VCM Min Typ‡ Max 5 mA Test Conditions VDD (= 5.0V, On-hook) 0.4 V V IOL = 4mA IOH = 0.4mA 0.8 VIL = 0.0V VIH = 5.0V 2.4 0 350 60 400 V V µA µA 2 VCC VDC 2.0 0 Units Use coupling caps for higher voltages and single ended † Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated. ‡ Typical figures are at 25°C with nominal + 5V supplies and are for design aid only. AC Electrical Characteristics † Characteristics 1 Sym Min Input Impedance VR- Typ‡ Max Units 47k 94k Ω Ω 10 Ω Test Conditions VR+ 2 Output Impedance at VX 3 Receive Gain (VR to 2-Wire) 4 Frequency Response Gain (relative to Gain @ 1kHz) 5 6 7 -1 0 1 dB Test circuit (Figure 8) Input 0.5V at 1kHz -0.5 0 0.5 dB ILOOP = 15-60mA 300Hz to 3400 Hz Signal Output Overload Level at 2-Wire at VX Signal/Noise & Distortion at 2-Wire at VX SINAD Power Supply Rejection Ratio at 2-Wire at VX PSRR 8 Transhybrid Loss THL 9 2-Wire Input Impedance Zin THD < 5% @ 1kHz ILOOP = 25-60mA VCC = 5V 0 0 dBm dBm 70 70 dB dB 25 25 40 40 dB dB 16 25 dB Test circuit (Figure 8) 300-3400Hz at VR Note 3 Ω @ 1kHz Input 0.5V at 1kHz ILOOP = 25-60mA 300-3400Hz Ripple 0.1Vrms 1kHz on VDD 9 MH88437-P Advance Information AC Electrical Characteristics † (continued) Characteristics 10 11 Sym Return Loss at 2-Wire (Reference 600Ω) RL Longitudinal to Metallic Balance Nc Min Typ‡ 14 20 18 24 24 24 dB dB dB 46 46 58 53 dB dB Max Units Test circuit(Figure 9) 200-500Hz 500-2500Hz 2500-3400Hz Test circuit (Figure 10) 300-1000Hz 1000-3400Hz Test circuit (Figure 11) 200-1000Hz 1000-4000Hz Metallic to Longitudinal Balance 60 40 12 dB dB Idle Channel Noise at 2-Wire at VX at 2-Wire at VX 13 Test Conditions Transmit Gain (2-Wire to VX) Off-Hook -1 On-Hook 15 15 -65 -65 20 20 0 +1 Cmess filter 300-3400Hz filter dB Test circuit (Figure 7) Input 0.5V @ 1kHz dB LC = 0V dB dB 300Hz 3400Hz 75 dB ILOOP = 25-60mA F1 = 1kHz at -6dBm F2 = 800Hz at -6dBm Total signal power = -3dBm 75 dB ILOOP = 25-60mA F1 = 1kHz at -6dBm F2 = 800Hz at -6dBm Total signal power = -3dBm 0 -0.5 -0.5 dBrnC dBrnC dBm dBm 14 Frequency Response Gain (relative to Gain @ 1kHz) 15 Intermodulation Distortion products at VX and 2W 16 Distortion at VX due to near end echo (300Hz - 3400Hz bandwidth) 17 Common Mode Rejection at VX CMR 50 dB Test circuit (Figure 10) 1-100Hz Note 4 18 Common Mode overload CML 100V Vpk-pk Test circuit (Figure 10) 1-100Hz Note 4 IMD 0 0 0.5 0.5 † Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated. ‡ Typical figures are at 25°C with nominal + 5V supplies and are for design aid only. Variations from Standard AC Electrical Characteristics (MH88437AD-PI/MH88437AS-PI) (-40˚C to 0˚C) Characteristics 10 Sym Min Typ Max Units Test Conditions 1 Receive Gain (VR to 2-Wire) -1.1 dB Test circuit (Figure 8) Input 0.5V at 1kHz 2 Frequency Response Gain (Relative to Gain @ 1kHz) -1.2 dB ILOOP = 16-60mA 300Hz to 3400Hz 3 Transhybrid Loss -12 -15 dB 300Hz to 1kHz 1kHz to 3400Hz THL MH88437-P Advance Information 3 4 5 21 22 23 82K 24 25 1K 5V 15 13 11 RS LOOP VR+ LCD 28 TIP VR- NB1 ILOOP 1 DUT VX 16K VLOOP5 NB2 2 VLOOP4 RING VLOOP3 27 VLOOP2 10 VBIAS VLOOP1 + 10uF LC RV AGND VCC ZA 9 7 6 16 8 4.7K = Ground (Earth) 5V Figure 6 - Test Circuit 1 -V 11 3 4 5 21 22 23 82K 24 25 1K 5V LOOP VR+ 10H 500Ω 15 13 RS 100uF LCD 28 TIP VR- NB1 I=20mA + 1 DUT VX 16K VLOOP5 NB2 VLOOP4 RING VLOOP3 Vs Impedance = Zin 2 27 100uF 10H 500Ω VLOOP2 + 10 VBIAS VLOOP1 + 10uF LC RV AGND VCC ZA 7 9 6 16 8 4.7K 5V Gain = 20 * Log (VX / Vs) = Ground (Earth) Figure 7 - Test Circuit 2 11 MH88437-P Advance Information -V 10H 500Ω 3 Vs 4 5 21 22 23 82K 24 25 1K 5V 15 13 11 RS LOOP VR+ LCD 28 TIP VR- NB1 100uF I=20mA + 1 DUT VX 16K VLOOP5 NB2 Zin 2 VLOOP4 RING VLOOP3 100uF 27 + VLOOP2 10H 500Ω 10 VBIAS VLOOP1 10uF LC RV AGND VCC ZA + 9 6 16 8 7 4.7K 5V = Ground (Earth) Gain = 20 * Log (V(Zin) / Vs) Figure 8 - Test Circuit 3 -V 10H 500Ω 11 LOOP 3 VR+ 4 5 21 22 23 82K 24 25 1K 5V 15 13 RS I=20mA 100uF LCD 28 TIP VR- NB1 Zin + 1 V1 DUT VX VLOOP5 NB2 2 300Ω VLOOP4 100uF RING VLOOP3 27 10H 500Ω VLOOP2 + 10 VBIAS VLOOP1 10uF LC RV AGND VCC ZA + 9 6 16 8 7 4.7K 5V = Ground (Earth) Return Loss = 20 * Log (V1 / Vs) Figure 9 - Test Circuit 4 12 300Ω 16K Vs = 0.5V MH88437-P Advance Information -V 10H 500Ω 3 4 5 21 22 23 82K 24 25 1K 5V 15 13 11 RS LOOP VR+ VR- NB1 100uF I=20mA LCD 28 TIP + 1 300Ω DUT VX 16K VLOOP5 NB2 V1 2 300Ω VLOOP4 RING VLOOP3 Vs = 0.5V 100uF 27 10H 500Ω VLOOP2 + 10 VBIAS VLOOP1 + 10uF LC RV AGND VCC ZA 9 7 6 16 8 4.7K 5V Long. to Met. Balance = 20 * Log (V1 / Vs) CMR = 20 * Log (VX / Vs) = Ground (Earth) Figure 10 - Test Circuit 5 -V 10H 500Ω 11 3 4 5 21 22 23 82K 24 25 1K 5V LOOP VR+ 15 13 RS I=20mA LCD 28 TIP VR- NB1 100uF + 1 300Ω DUT VX 16K VLOOP5 NB2 Vs 2 300Ω VLOOP4 510Ω V1 100uF RING VLOOP3 27 + 10H 500Ω VLOOP2 10 VBIAS VLOOP1 + 10uF LC RV AGND VCC ZA 9 7 6 16 8 4.7K 5V Met. to Long. Balance = 20 * Log (V1 / Vs) = Ground (Earth) Figure 11 - Test Circuit 6 13 MH88437-P Advance Information 0.162 Max (4.12 Max) 0.27 Max (6.9 Max) 0.063 Max (1.6 Max) 0.08 Typ (2 Typ) 1.00 Typ * (25.4 Typ) * 0.100+0.010 (2.54+0.25) 1.05 Max (26.7 Max) 0.020 + 0.005 (0.5 + 0.13) * 0.05 Typ (1.27 Typ) 0.260+0.015 (6.6+0.38) * 0.300+0.010 (7.62+0.25) Notes: 1) Not to scale 2) Dimensions in inches. (Dimensions in millimetres) 1 3) Pin tolerances are non-accumulative. 4) Recommended soldering conditions: Wave Soldering - Max temp at pins 260˚C for 10 secs. 1.42 Max (36.1 Max) * Dimensions to centre of pin. Figure 12 - Mechanical Data for 28 Pin DIL Hybrid 0.162 Max (4.11 Max) 0.265 Max (6.73 Max) 0.063 Max (1.6 Max) 0.9 + 0.015 (2.3 + 0.38) 0.99 Typ (25.15 Typ) 0.020 + 0.005 (0.5 + 0.13) * 0.05 Typ (1.27 Typ) * 0.100+0.010 (2.54+0.25) 0.060 Typ (1.52 Typ) *0.300+0.010 (7.62+0.25) Notes: 1.15 Max (29.2 Max) 1) Not to scale 2) Dimensions in inches. (Dimensions in millimetres) 3) Pin tolerances are non-accumulative. 1 4) Recommended soldering conditions: Max reflow temp: 220˚C for 10 secs. * Dimensions to centre of pin. 1.42 Max (36.1 Max) Figure 13 - Mechanical Data for 28 Pin Surface Mount Hybrid 14 MH88437-P Advance Information 0.10 (2.54) * 0.26 (6.60) 0.10 (2.54) 0.97 (24.64) 0.04 (1.02) 0.06 (1.52) Notes: 1) Not to scale 2) Dimensions in inches. (Dimensions in millimetres) 3) All dimensions are Typical except where marked with an. This gap is associated with the isolation barrier. Figure 14 - Recommended Footprint for 28 Pin Surface Mount Hybrid 15 http://www.mitelsemi.com World Headquarters - Canada Tel: +1 (613) 592 2122 Fax: +1 (613) 592 6909 North America Tel: +1 (770) 486 0194 Fax: +1 (770) 631 8213 Asia/Pacific Tel: +65 333 6193 Fax: +65 333 6192 Europe, Middle East, and Africa (EMEA) Tel: +44 (0) 1793 518528 Fax: +44 (0) 1793 518581 Information relating to products and services furnished herein by Mitel Corporation or its subsidiaries (collectively “Mitel”) is believed to be reliable. However, Mitel assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. 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No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Mitel’s conditions of sale which are available on request. M Mitel (design) and ST-BUS are registered trademarks of MITEL Corporation Mitel Semiconductor is an ISO 9001 Registered Company Copyright 1999 MITEL Corporation All Rights Reserved Printed in CANADA TECHNICAL DOCUMENTATION - NOT FOR RESALE