MITEL MT91600

MT91600
Programmable SLIC
Preliminary Information
Features
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•
•
•
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DS5057
MT91600
28 Pin SSOP Package
-40°C to +85°C
Description
The Mitel MT91600 provides an interface between a
switching system and a subscriber loop, mainly for
short loop SLIC applications. The functions provided
by the MT91600 include battery feed, programmable
constant current, 2W to 4W conversion, off-hook and
dial pulse detection, user definable line and network
balance impedance’s and the capability of
programming the audio gain externally. The device is
fabricated as a CMOS circuit in a 28 pin SSOP
package.
Line interface for:
PABX/ONS
Intercoms
Key Telephone Systems
Control Systems
X3
TD
August 1999
Package Information
Transformerless 2W to 4W conversion
Controls battery feed to line
Programmable line impedance
Programmable network balance impedance
Off-hook and dial pulse detection
Ring ground over-current protection
Programmable gain
Programmable constant current feed
-22V to -72V battery operation
Applications
•
•
•
•
ISSUE 7
X2
X1
Audio Gain & Network
Balance Circuit
Tip Drive
Controller
VX
VR
TF
TIP
Line Sense
2 W to 4 W
Conversion & Line
Impedance
RING
RF
C3A
C3B
RV
RD
Z3
Z2
Over-Current
Protection Circuit
Z1
Relay
Driver
Ring Drive
Controller
IC
RLYC
RLYD
Loop Supervision
VREF
SHK
C1
C2A
C2B
VDD GND VEE
Figure 1 - Functional Block Diagram
1
MT91600
Preliminary Information
VDD
TD
TF
TIP
RING
VREF
IC
RF
RV
RD
C3A
C3B
C2B
C2A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VEE
GND
RLYD
RLYC
SHK
C1
X2
VR
X3
VX
X1
Z3
Z2
Z1
Figure 2 - Pin Connections
Pin Description
2
Pin #
Name
Description
1
VDD
2
TD
Tip Drive (Output). Controls the Tip transistor.
3
TF
Tip Feed. Connects to the Tip transistor and to the TIP lead via the Tip feed resistor.
4
TIP
Tip. Connects to the TIP lead of the telephone line.
5
RING
Ring. Connects to the RING lead of the telephone line.
6
VREF
Reference Voltage (Input). This pin is used to set the subscribers loop constant
current. Changing the input voltage sets the current to any desired value within the
working limits. VREF is related to VLC.
7
IC
Internal Connection (Input). This pin must be connected to GND for normal operation.
8
RF
Ring Feed. Connects to the RING lead via the Ring feed resistor.
9
RV
Ring Voltage and Audio Feed. Connects directly to the Ring drive transistor and also to
Ring Feed via a relay.
10
RD
Ring Drive (Output). Controls the Ring transistor.
11
C3A
A filter capacitor for over-current protection is connected between this pin and GND.
12
C3B
A filter capacitor for over-current protection is connected between this pin and GND.
13
C2B
A capacitor for loop current stability is connected between this pin and C2A.
14
C2A
A capacitor for loop current stability is connected between this pin and C2B.
15
Z1
Line Impedance Node 1. A resistor of scaled value "k" is connected between Z1 and
Z2. This connection can not be left open circuit.
16
Z2
Line Impedance Node 2. This is the common connection node between Z1 and Z3.
17
Z3
Line Impedance Node 3. A network either resistive or complex of scaled value "k" is
connected between Z3 and Z2. This connection can not be left open circuit.
18
X1
Gain Node 1. This is the common node between Z3 and VX where resistors are
connected to set the 2W to 4W gain.
19
VX
Transmit Audio (Output). This is the 4W analog signal to the SLIC.
20
X3
Gain Node 3. This is the common node between VR and the audio input from the
CODEC or switching network where resistors are fitted to sets the 4W to 2W gain
21
VR
Receive Audio (Input). This is the 4W analog signal to the SLIC.
Positive supply rail, +5V.
MT91600
Preliminary Information
Pin Description (continued)
Pin #
Name
Description
22
X2
Gain Node 2. Networks, either resistive or complex, are connected between this node,
VR and GND to set the Network Balance Impedance for the SLIC.
23
C1
A filter capacitor for ring trip is connected between this pin and GND.
24
SHK
Switch Hook (Output). This pin indicates the line state of the subscribers telephone.
The output can also be used for dial pulse monitoring. SHK is high in off-hook state.
25
RLYC
Relay Control (Input). An active high on this pin will switch RLYD low.
26
RLYD
Inverted Output of RLYC. It is used to drive the bipolar transistor that drives the relay
(see Figure 5.)
27
GND
Ground. Return path for +5V and -5V. This should also be connected back to the
return path for the loop battery, LGND and relay drive ground RLYGND.
28
VEE
Negative supply rail, -5V.
Functional Description
4W to 2W gain:
Gain 4 - 2 = 20*Log [0.891 * (R14 / R15)]
The MT91600 is the analog SLIC for use in a 4 Wire
switched system. The SLIC performs all of the
normal interface functions between the CODEC or
switching system and the analog telephone line such
as 2W to 4W conversion, constant current feed,
ringing and ring trip detection, current limiting, switch
hook indication and line and network balance
impedance
setting
using
minimal
external
components.
Refer to Figure
designation.
5
for
MT91600
components
Impedance Programming
The MT91600 allows the designer to set the device’s
impedance across TIP and RING, (ZTR), and
network balance impedance, (ZNB), separately with
external low cost components.
For a resistive load, the impedance (ZTR) is set by
R11 and R18. For a complex load, the impedance
(ZTR) is set by R11, R18, R19 & C8 (see Figure 5.)
The network balance, (ZNB), is set by R16, R17 & C3
(see Figure 5.)
2 Wire to 4 Wire Conversion
The hybrid performs 2 wire to 4 wire conversion by
taking the 4 wire signal from an analog switch or
voice CODEC, a.c. coupled to VR, and converting it
to a 2 wire differential signal at tip and ring. The 2
wire signal applied to tip and ring by the telephone is
converted to a 4 wire signal, a.c. coupled to Vx which
is the output from the SLIC to the analog switch or
voice CODEC.
Gain Control
The network balance impedance should
calculated once the 2W - 4W gain has been set.
be
Line Impedance
For optimum performance, the characteristic
impedance of the line, (Zo), and the device’s
impedance across TIP and RING, (ZTR), should
match. Therefore:
Zo = ZTR
It is possible to set the Transmit and Receive gains
by the selection of the appropriate external
components.
The relationship between Zo and the components
that set ZTR is given by the formula:
The gains can be calculated by the formulae:
Zo / ( R1+R2) = kZo / R11
where kZo = ZLZ
2W to 4W gain:
Gain 2 - 4 = 20*Log [ R13 / R12]
ZLZ = R18, for a resistive load.
ZLZ = [R18 + (R19 // C8)], for a complex load.
3
MT91600
The value of k can be set by the designer to be any
value between 20 and 250. Three rules to ensure the
correct operation of the circuit:
Preliminary Information
The MT91600’s programmable current range is
between 18mA to 32mA.
Line Drivers & Overcurrent Protection
(A) R18 + R19 > 50kΩ
(B) R1 = R2.
(C) R11 > =50kΩ
It is advisable to place these components as close
as possible to the SLIC.
Network Balance Impedance
The network balance impedance, (ZNB), will set the
transhybrid loss performance for the circuit. The
balance of the circuit is independent of the 4 - 2 Wire
gain but is a function of the 2 - 4 Wire gain.
The method of setting the values for R16 and R17 is
given by the formula:
R17 = [1.782 * Zo / ( Zo+ZNB) * ( R13 / R12 )]
R17 + R16
[1 + R13 / R12]
where ZNB is the network balance impedance of the
SLIC and Zo is the line impedance.
The Line Drivers control the external Battery Feed
circuit which provide power to the line and allows bidirectional audio transmission.
The loop supervision circuitry provides bias to the
line drivers to feed a constant current while the overcurrent protection circuitry prevents the ring driver
from causing the ring transistor to overload.
The line impedance presented by the Line Driver
circuitry is determined by the external network,
which may be purely resistive or complex, allowing
the circuit to be configured for use in any application.
The impedance can also be fixed to one value and
modified to look like a different value by reflecting an
impedance through the SLIC from an intelligent
CODEC or DSP module.
There is long term protection on the RING output
against accidental short circuits that may be applied
either across TIP/RING to GND or RING to GND.
This high current will be sensed and limited to a
value that will protect the circuit.
(R16 + R17) >= 50kΩ
It is advisable to place these components as close
as possible to the SLIC.
Loop Supervision & Dial Pulse
Detection
The Loop Supervision circuit monitors the state of
the phone line and when the phone goes "Off Hook"
the SHK pin goes high to indicate this state. This pin
reverts to a low state when the phone goes back "On
Hook" or if the loop resistance is too high for the
circuit to continue to support a constant current.
The SHK output can also be monitored for dialing
information when used in a dial pulse system.
Constant Current Control
The SLIC employs a feedback circuit to supply a
constant feed current to the line. This is done by
sensing the sum of the voltages across the feed
resistors, R1 and R2, and comparing it to the input
reference voltage, Vref, that determines the constant
current feed current.
4
In situations where an accidental short circuit occurs
either across TIP/RING to GND or RING to GND, an
excessive amount of current will flow through the ring
drive transistor, Q3. Although the MT91600 will
sense this high current and limit it, if the power rating
of Q3 is not high enough, it may suffer permanent
damage. In this case, a power sharing resistor, R23,
can be inserted (see Figure 5) to dissipate some of
the power. Capacitor C13 is inserted to provide an
a.c. ground point. The criteria for selecting a value
for the power sharing resistor R23 can be found in
the application section of this datasheet.
Ringing and Ring Trip Detection
Ringing is applied to the line by disconnecting pin 8,
RF, from pin 9, RV, and connecting it to a ringing
source which is battery backed. This may be done by
use of an electro-mechanical relay. The SLIC is
capable of detecing an Off Hook condition during
ringing by filtering out the large A.C. component by
use of the external components connected to pin 23.
This filter allows an Off Hook condition to be
monitored at SHK, pin 24.
MT91600
Preliminary Information
When using DTMF signalling only i.e. pulse dialling
is not used, the capacitor, C7, can be permanently
connected to ground and does not require to be
switched out during dialling.
From Figure 3 with R1 = R2 = 220Ω
For I LOOP = 25mA, V LC = 0V, Vbat=-48V
R3
43kΩ
Power up Sequence
The circuit should be powered up in the following
order: AGND, VEE, VDD, VBAT.
6
VREF
VLC
C9
100nF
R4
130kΩ
MT91600
VBAT
Application
Figure 3 - Resistor Divider
The following Application section is intended to
demonstrate to the user the methods used in
calculating and selecting the external programming
components in implementing the MT91600 as an
analog line interface in a communication system.
The programming component values calculated
below results in the optimum performance of the
device.
Refer to Figure
designation.
5
for
MT91600
C9 is inserted to ensure pin 6, Vref, remains at a.c.
ground. 100nF is recommended.
ILOOP can also be set by directly driving Vref with a
low impedance voltage source. (See Figure 4). It is
recommended that a small resistor be placed in
series with the Vref pin. In this case:
components
ILOOP = 1.07 * Vs
(R1 +R2)
where, Vs < 0
Component Selection
2kΩ
Feed Resistors (R1, R2)
Vs
The selection of feed resistors, R1 and R2, can
significantly affect the performance of the MT91600.
It is recommended that their values fall in the range
of:
200Ω <= R1 <= 250Ω
where, R1 = R2
The resistors should have a tolerance of 1% (0.15%
matched) and a power rating of 1 Watt.
Loop Current Setting (R3, R4, C9)
By using a resistive divider network, (Figure 3), it is
possible to maintain the required voltage at Vref to
set ILOOP. The loop current programming is based on
the following relationship:
ILOOP = - [ F * VLC + G * VBAT] * Ko * H
(R1 +R2)
where,
F = R4 / (R4 + R3)
G = R3 / (R4 +R3)
Ko = 200000 / (200000 + (R4//R3) )
H = 1.07
ILOOP is in Ampere
C9
100nF
6
VREF
MT91600
Figure 4 - Direct Voltage
Calculating Component Values For AC
Transmission
There are five parameters a designer should know
before starting the component calculations. These
five parameters are:
1)
2)
3)
4)
5)
characteristic impedance of the line Zo
network balance impedance ZNB
value of the feed resistors (R1 and R2)
2W to 4W transmit gain
4W to 2W receive gain
The following example will outline a step by step
procedure for calculating component values. Given:
5
MT91600
Preliminary Information
Zo = 600Ω, ZNB= 600Ω, R1=R2= 220Ω
Gain 2 - 4 = -1dB, Gain 4 - 2 = -1dB
Step 1: Gain Setting (R12, R13, R14, R15)
Given Zo = 220Ω + (820Ω // 120nF)
Gain 2 - 4 = 20 Log [ R13 / R12]
-1 dB = 20 Log [R13 / R12]
∴ R12 = 112.2kΩ, R13 = 100kΩ.
where, kZo = [R18 + (R19 // C8)]
Gain 4 - 2 = 20 Log [0.891 * [R14 / R15)]
-1 dB = 20 Log [0.891 * [R14 / R15)]
∴ R14 = 100kΩ, R15 = 100kΩ.
Step 2: Impedance Matching (R11, R18, R19, C8)
a) Zo / ( R1+R2) = kZo / R11
600/(220+220) = (k*600)/R11
let k = 125
∴ R11 = 55kΩ.
Zo / ( R1+R2) = kZo / R11
(Equation 1)
Choose a standard value for C8 to find a suitable
value for k.
Since 1nF exists, let C8 = 1nF then,
k = 120nF / C8
k = 120nF / 1nF
∴ k =120
R18 = k * 220Ω
R18 = 120 * 220Ω
R18 = 26400
b) In general,
R19 = k * 820Ω
R19 = 120 * 820
R19 = 98400
∴ R18 = 26k4Ω, R19 = 98k4Ω
kZo = ZLZ
where:
ZLZ = R18, for a resistive load.
ZLZ = [R18 + (R19 // C8)], for a complex load.
From (Equation 1)
R11 = k * (R1 + R2)
R11 = 120 * (220Ω + 220Ω)
∴ R11 = 52k8Ω
Since we are dealing with a resistive load in this
example ZLZ = R18, and therefore:
Power Sharing Resistor (R23)
kZo = R18
(125 * 600)= R18
∴ R18 = 75kΩ.
To determine the value of R23, use the following
equations:
Step 3: Network Balance Impedance (R16, R17)
R23(max)= |Vbat(min)| - 100 - (2*R2 + Lr + DCRP)
30mA
R17 = [1.782 * Zo / ( Zo+ZNB) * ( R13 / R12 )]
R17 + R16
[1 + R13 / R12)]
R23(min)= |Vbat(max)| - Pd(max) - R2
40mA
1.6mA
R17 = 0.4199
R17 + R16
where,
Vbat(min/max) = the expected variation of Vbat.
R2 = the feed resistor.
Lr = maximum DC loop resistance.
DCRP = DC resistance of the phone set.
Pd(max) = the maximum power dissipation of the
ring drive transistor Q3.
set R17 = 100kΩ, R16 becomes 138kΩ.
∴ R16 = 138kΩ, R17 = 100kΩ.
Complex Line Impedance, Zo
In situations where the characteristic impedance of
the line Zo is a complex value, determining the
component values for impedance matching (R11,
R18, R19, C8) is as follows:
6
If R23(max) > R23(min), then set R23 to be the
geometric center:
R23 = Square Root (R23(max) * R23(min))
Preliminary Information
MT91600
If R23(max) < R23(min), then a violation has
occurred. Pd(max) will have to be increased.
A numerical example:
Given:
R2 = 220Ω
Lr = 325Ω (2.5km of 28 gauge wire, averaged at
65Ω/km)
DCRP = 200Ω
Pd(max) = 1.5W
Vbat = -48V +/- 10% (i.e. -43V to -53V)
Therefore:
R23(max) = (43/30mA) - 100 - (2 * 220 + 325 + 200)
= 1433.3 - 100 - 965
R23(max) = 368.3Ω
R23(min) = (53/40mA) - (1.5/1.6mA) - 220
= 1325 - 937.5 - 220
R23(min) = 167.5 Ω
R23 = Square Root ( 368.3 * 167.5 )
R23 = 248.4Ω
7
MT91600
Preliminary Information
C7
VEE
VDD
C6
K1b
1
28
VDD VEE
24
SHK
RLYC
Q4
25
RLYC
26
RLYD
7
23
GND
IC
C1
X2
22
R16
VR 21
R17
C11
C4
K1
D1
VLC
C3
R14
VRLY
SHK
27
R3
6
VREF
2
TD
X3
20
VX
19
X1
18
Z3
17
R15
VX
R13
C9
R4
VBAT
VBAT
Q1
D2a
VRIN
C12
D2b
R22
3
TF
4
TIP
R12
MT91600
R1
TIP
R21
PR1
ZLZ
R20
5
RING
RING
VBAT
K1a
RF
9
RV
16
Z1
15
D3b
D3a
VDD
R7
R5
~
8
Z2
R11
R2
90 Vrms
R6
Q2
C5
RD
C3A
C3B
C2B
C2A
10
11
12
13
14
C1
C10
R10
C2
R9
VBAT=-48V
Impedance ZLZ
Q3
Complex Load Zo
R18
C13
VBAT
Figure 5 - Typical application
8
R19
R18
R23
R8
Resistive Load Zo
C8
MT91600
Preliminary Information
Component List* for a Typical Application with a Resistive 600Ω Line Impendance - Refer to
Figure 5 for component designation and recommended configuration
Resistor Values
R1
220Ω 1% (0.15% matched), 1W
R2
220Ω 1% (0.15% matched), 1W
R3
43kΩ
R4
130kΩ
R5
220Ω
R6
75kΩ
R7
3kΩ
R8
1kΩ
R9
1kΩ
R10
560kΩ
R11
55kΩ
R12
112kΩ
R13
100kΩ
R14
100kΩ
R15
100kΩ
R16
138kΩ
R17
100kΩ
R18
75kΩ
R19
0Ω
R20
2kΩ
R21
2kΩ
R22
1kΩ
R23
248Ω
Capacitor Values
C1
100nF, 5%
C2
300nF, 5%
C3
100pF, 5%
C4
33nF, 20%
C5
3.3nF, 5%
C6
1uF, 20%, 16V
C7
100nF, 20%
C8
0F
C9
100nF, 20%
C10
100nF, 5%
C11
47pF, 20%
C12
33nF, 10%
C13
100nF 20%
Diodes and Transistors
D1
BAS16 or equivalent
D2a/b
BAV99 dual diode or equivalent
D3a/b
BAV99 dual diode or equivalent
Q1
2N2222 or MPSA42 or MMBTA42
Q2
2N2907 or MPSA92 or MMBTA92
Q3
2N2222 or MPSA42 or MMBTA42
Q4
2N2907 or MPSA92 or MMBTA92
Note: All resistors are 1/4 W, 1% unless otherwise indicated.
*Assumes Z o = ZNB = 600Ω, Gain 2 - 4 = -1dB, Gain 4 - 2 = -1dB.
Decoupling capacitors, (1uF, 100V, 20%), can be added to V DD, VEE, VBAT and V RLY to provide improved
PSRR performance.
K1
=
Electro-mechanical relay, 5V, DPDT/2 FORM C
PR1
=
This device must always be fitted to ensure damage does not occur from inductive loads.For
simple applications, PR1 can be replaced by a single TVS, such as 1.5KE220C, across tip and ring. For
applications requiring lightning and mains cross protection further circuitry will be required and the following
protection devices are suggested: P2353AA, P2353AB (Teccor), THBT20011, THBT20012, THBT200S (SGSThomson), TISP2290, TSSP8290L (T.I.)
9
MT91600
Preliminary Information
.
Absolute Maximum Ratings*
Parameter
1
DC Supply Voltages
Sym
Min
Max
Units
VDD
VEE
VBAT
-0.3
-6.5
-80
+6.5
+0.3
+0.3
V
V
V
100
Vrms
Superimposed on VBAT
+0.3
V
Note 1
200
V
MAX 1ms (with power on)
30
mA. RMS
45
mA
+150
˚C
0.10
W
+85˚C max, VBAT = -48V
500
V
Human Body Model
Note 3
2
Ringing Voltages
Vring
3
Voltage setting for Loop Current
VREF
4
Overvoltage Tip/GND Ring/GND,
Tip/Ring
5
Ringing Current
6
Ring Ground over-current
7
Storage Temp
Tstg
8
Package Power Dissipation
Pdiss
9
ESD Rating
-20
Iring
-65
Comments
Limited by the Drive
transistor, Q3.
Note 2
*Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.
Note 1: Voltage at Vref pin set by VLC and potential divider.
Note 2: Tip and Ring must not be shorted together and to ground at the same time.
Note 3: The device contains circuitry to protect the inputs from static voltage up to 500V. However, precautions should be taken to avoid
static charge build up when handling the device.
Recommended Operating Conditions
Parameter
Sym
Min
Typ‡
Max
Units
5.25
-4.75
-22
V
V
V
1
Operating
Supply Voltages
VDD
VEE
VBAT
4.75
-5.25
-72
5.00
-5.00
-48
2
Ringing Voltage
Vring
0
50
VRMS
3
Voltage setting for Loop Current
VREF
-10.3
V
4
Operating Temperature
To
-40
+25
+85
˚C
‡ Typical figures are at 25˚C with nominal supply voltages and are for design aid only
†Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.
‡Typical figures are at 25°C with nominal + 5V supplies and are for design aid only.
Note 4: 16 to 68 Hz superimposed on a VBAT.
10
Test Conditions
Note 4
ILOOP = 25mA,
R1=R2=220Ω
VBAT = -48V
MT91600
Preliminary Information
DC Electrical Characteristics†
Characteristics
1
Typ‡
Max
Units
IDD
IEE
IBAT
25
11
8.5
45
mA
mA
mA
PC
60
90
mW
Standby/Active
25
28
mA
VREF = -10.3V
Test circuit as Fig. 6
VBAT = -48V
32
mA
Sym
Supply Current
Min
2
Power Consumption
3
Constant Current Line
Feed
I LOOP
22
4
Programmable Loop
Current Range
ILOOP
18
5
Operating Loop
(inclusive of Telephone
Set)
RLOOP
1200
Ω
450
Ω
6
Off Hook Detection
Threshold
7
RLYC
Input Low Voltage
Input High Voltage
Vil
Vih
2.0
SHK
Output Low Voltage
Output High Voltage
Vol
Voh
2.7
8
8
Dial Pulse Distortion
SHK
ON
OFF
20
0.4
+4
+4
mA
Test Conditions
ILOOP = 18mA
VBAT = -48V
ILOOP = 18mA
VBAT = -22V
VREF = -10.3V
VBAT = -48V
See Note 5. ILOOP = 25mA
0.7
V
V
lil = 50µA
lih = +50µA
0.4
V
V
Lol = 8mA
Loh = -0.4mA
ms
ms
†Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.
‡Typical figures are at 25°C with nominal +5V and are for design aid only.
Note 5: Off hook detection is related to loop current.
11
MT91600
Preliminary Information
AC Electrical Characteristics †
Characteristics
1
Ring Trip Detect Time
2
Output Impedance at VX
3
Gain 4-2 @ 1kHz
4
Gain Relative to 1kHz
5
Transhybrid Loss
6
Gain 2-4 @ 1kHz
7
Gain Relative to 1kHz
8
Return Loss at 2-Wire
9
Total Harmonic Distortion
Sym
Min
Tt
Typ‡
Max
Units
100
300
mS
THL
RL
dB
Note 6
Test circuit as Fig. 8
±0.15
dB
300Hz - 3400Hz
20
25
dB
Note 6
300Hz - 3400Hz
Test circuit as Fig. 8
-1.3
-1
dB
Note 6
Test circuit as Fig. 7
±0.15
dB
300Hz to 3400Hz
30
dB
Note 6
300Hz - 3400Hz
Test circuit as Fig. 10
%
%
3dBm, 1kHz @ 2W
1Vrms, 1KHz @ 4W
42
dB
Input 0.5Vrms, 1KHz
Test circuit as Fig. 9
55
dB
200Hz to 3400Hz
Test circuit as Fig. 9
58
48
dB
dB
200Hz to 1000Hz
1000Hz to 3400Hz
20
-1
-0.8
-0.8
THD
@2W
@VX
0.3
0.3
10
Common Mode Rejection
2 wire to Vx
CMR
11
Longitudinal to Metallic Balance
LCL
12
Metallic to Longitudinal Balance
13
Idle Channel Noise
35
1.0
1.0
Nc
@2W
@VX
14
Ω
10
-1.3
Test Conditions
Power Supply Rejection
Ratio at 2W and VX
12
12
dBrnC
dBrnC
Cmessage Filter
Cmessage Filter
dB
dB
0.1Vp-p @ 1kHz
PSRR
Vdd
Vee
23
23
†Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.
‡Typical figures are at 25°C with nominal +5V and are for design aid only.
Note 6: Assumes Zo = ZNB = 600Ω and both transmit and receive gains are programmed externally to -1dB, i.e. Gain 2-4 = -1dB, Gain 4-2
= -1dB.
Mechanical Information
Refer to the latest copy of the Mitel data book for details of the outline for the 28 Pin SSOP package.
12
MT91600
Preliminary Information
Test Circuits
Figures 6,7,8,9,10 are for illustrating the principles involved in making measurements and do not necessarily
reflect the actual method used in production testing.
TIP
ILoop
SLIC
VLC
R3
6
R4
Zo
C9
RING
VBAT
Figure 6 - Loop current programming
R15
20
TIP
~
VTR
SLIC
18
R12
VS
VX
19
R13
Zo
__
2
Zo
__
2
17
RING
Gain = 20*Log(VX/VTR)
Figure 7 - 2-4 Wire Gain
VX
19
TIP
C3
22
R16
21
Gain = 20*Log(VTR/VS)
RING
R17
SLIC
R14
Zo
VTR
20
C11
R15
~V
S
THL = 20*Log(VX/VS)
Figure 8 - 4-2 Wire Gain & Transhybrid Loss
13
MT91600
Preliminary Information
R15
20
TIP
Zo
__
2
VTR
VS
~
SLIC
VX
19
Zo
__
2
RING
Long. Bal. = 20*Log(VTR/VS)
CMR = 20*Log(VX/VS)
Figure 9 - Longitudinal Balance & CMR
R15
20
17
TIP
R18
Zo
VS
~
R19
R
SLIC
VZ
C8
16
R11
R
RING
15
Gain = 20*Log(2*VZ/VS)
Figure 10 - Return Loss
14
Package Outlines
Pin 1
E
A
C
L
H
e
Notes:
1) Not to scale
2) Dimensions in inches
3) (Dimensions in millimeters)
4) Ref. JEDEC Standard M0-150/M0118 for 48 Pin
5) A & B Maximum dimensions include allowable mold flash
D
A2
A1
B
20-Pin
24-Pin
28-Pin
48-Pin
Dim
Min
A
A1
0.002
(0.05)
B
0.0087
(0.22)
C
Max
Min
Max
0.079
(2)
-
0.079
(2)
0.002
(0.05)
0.013
(0.33)
0.0087
(0.22)
0.008
(0.21)
Min
Max
Min
Max
0.079
(2)
0.095
(2.41)
0.110
(2.79)
0.008
(0.2)
0.016
(0.406)
0.008
(0.2)
0.0135
(0.342)
0.002
(0.05)
0.013
(0.33)
0.0087
(0.22)
0.008
(0.21)
0.013
(0.33)
0.008
(0.21)
0.010
(0.25)
D
0.27
(6.9)
0.295
(7.5)
0.31
(7.9)
0.33
(8.5)
0.39
(9.9)
0.42
(10.5)
0.62
(15.75)
0.63
(16.00)
E
0.2
(5.0)
0.22
(5.6)
0.2
(5.0)
0.22
(5.6)
0.2
(5.0)
0.22
(5.6)
0.291
(7.39)
0.299
(7.59)
e
0.025 BSC
(0.635 BSC)
0.025 BSC
(0.635 BSC)
0.025 BSC
(0.635 BSC)
0.025 BSC
(0.635 BSC)
A2
0.065
(1.65)
0.073
(1.85)
0.065
(1.65)
0.073
(1.85)
0.065
(1.65)
0.073
(1.85)
0.089
(2.26)
0.099
(2.52)
H
0.29
(7.4)
0.32
(8.2)
0.29
(7.4)
0.32
(8.2)
0.29
(7.4)
0.32
(8.2)
0.395
(10.03)
0.42
(10.67)
L
0.022
(0.55)
0.037
(0.95)
0.022
(0.55)
0.037
(0.95)
0.022
(0.55)
0.037
(0.95)
0.02
(0.51)
0.04
(1.02)
Small Shrink Outline Package (SSOP) - N Suffix
General-11
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