MH88620BR C.O. SLIC Preliminary Information Features ISSUE 3 April 1995 Ordering Information • 900 ohm input impedance • Externally selectable network balances • Transformerless 2-4 wire conversion • Programmable constant resistance feed • Off-Hook and Dial pulse detection • High immunity to externally induced longitudinal currents • Auto ring trip • On-hook transmission (ANI) capability • Minimum protection circuitry required • Compatible with requirements of TELEBRAS DOC/FCC, CSA/UL, CCITT • Excellent power dissipation (SIL vertical mounting) • On/Off-Premise PBX Line Cards • Central Office Line Cards VBat LGND TIP 0°C to 70°C Matched Feed Resistors The Mitel MH88620BR SLIC provides all of the functions required to interface 2-wire off premise subscriber loops to a serial TDM, PCM, switching network of a modern PBX. The MH88620BR is manufactured using thick film hybrid technology which offers high voltage capability, reliability and high density resulting in significant printed circuit board area savings. A complete line card can be implemented with very few external components. VDD LCA RING RF2 40 Pin SIL Package Description Applications RF1 MH88620BR Driver Circuitry and Speech Circuit VEE AGND Switch-Hook Threshold Set Loop Current Set Ring Filter Switch-Hook Detect SHK TF1 TF2 Impedance Network Auto Ring Trip TRD Test Relay Driver 2W/4W conversion Ring Relay Driver TRC RGND VRLY RNGC RRD N1 N2 Gain Adjust Z1 Z2 GRX1 GRX0 RX GTX1 GTX0 TX Figure 1 - Functional Block Diagram 2-145 MH88620BR Preliminary Information TIP RING TF1 TF2 RF1 RF2 LGND LCA VBAT IC RGND VRLY RRD RNGC REVC ESI ESE AGND NATT N1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 N2 NC Z1 Z2 TX RX GTX0 GTX1 GRX0 GRX1 NC NC NC SHK IC IC IC IC VEE VDD 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Figure 2 - Pin Connections Pin Description Pin # Name 1 TIP 2 RING 3 TF1 Tip Feed 1: Access point for balanced ringing. Normally connects to TF2. 4 TF2 Tip Feed 2: Access point for balanced ringing. Normally connects to TF1. 5 RF1 Ring Feed 1: Access point for balanced ringing. Normally connects to RF2. 6 RF2 Ring Feed 2: Access point for balanced ringing. Normally connects to RF1. 7 LGND 8 LCA Current Limit Set (Input): The current limit is set by connecting an external resistor as shown in Table 5. For 70mA default current, this pin is tied to -5V. 9 VBat Battery Voltage: Typically -48V dc is applied to this pin. 10 NC No Connection: Reserved. 11 RGND Ring Driver Ground Connection. 12 VRLY Relay Supply Voltage Connection. 13 RRD Ring Relay Drive (Output). Connects to ring relay coil. 14 RNGC 15 NC 16 TRD Test Relay Drive (Output): Connects to test relay coil. 17 TRC Test Relay Control (Input). 18 AGND 19 NC No Connection: Reserved. 20 N1 Network Balance Node 1. An external network balance impedance can be connected between N1 and AGND. See Fig 4. For complex impedances N2 no connection. 21 N2 Network Balance Node 2. An external network balance impedance can be connected between N2 and AGND. See Fig 4 N2 connects to GND for 900Ω balance. 2-146 Description Tip Lead. Connects to the TIP lead of the subscriber line. Ring Lead: Connects to the Ring lead of the subscriber line. Battery Ground. VBat return path. Connected to system’s energy dumping ground. Ring Relay Control (Input) . Reserved. No Connection. Analog Ground: VDD and VEE. return path. MH88620BR Preliminary Information Pin Description (Continued) Pin # Name Description 22 NC No Connection. Reserved. 23 Z1 Line impedance Node 1. Normally connects to Z2. See Fig. 3. 24 Z2 Line impedance Node 2. Normally connects to Z1. See Fig 3. 25 TX Transmit (Output). 4-wire (AGND) referenced audio output. 26 RX Receive (Input). 4-wire (AGND) referenced audio input. 27 GTX0 Transmit Gain Node 0. Connects to GTX1 for 0dB transmit gain. 28 GTX1 Transmit Gain Node 1. Connects to a resistor to AGND for transmit gain adjustment. 29 GRX0 Receive Gain Node 0. Connects to GRX1 for 0dB gain. 30 GRX1 Receive Gain Node 1. Connect to a resistor to AGND for receive gain adjustment. 31 NC No Connection. Reserved. 32 NC No Connection. Reserved. 33 NC No Connection. Reserved. 34 SHK 35.38 IC 39 VEE Negative Supply Voltage. -5V dc. 40 VDD Positive Supply voltage. +5V dc Off-Hook Indication (Output). A logic low output indicates when the subscriber equipment has gone Off-Hook. Internal Connection. 2-147 MH88620BR Preliminary Information Absolute Maximum Ratings * All voltages are with respect to GNDA unless otherwise stated. Parameter 1 Supply Voltages 2 Storage Temperature Symbol Min Max Units 65 6 6 V V V +125 °C LGND -VBat VDD -GND GND - VEE -40 TS * Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied. Recommended Operating Conditions† - Voltages are with respect to GNDA unless otherwise stated. Characteristics Sym Min 1 Operating Temperature TOP 0 2 Supply Voltages VBat VDD VEE VRLY -44 4.75 -4.75 Typ* -48 +5.0 -5.0 5 Max Units 70 °C 70 -60 5.25 -5.25 V V V V Comments * Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing. † Voltages specified are with respect to LGND. DC Electrical Characteristics* Characteristics 1 Operating Loop Current Sym Min Typ‡ ILoop Max Units 70 mA mA mA 17 16 Variation in Loop Current from nominal 2 Test Comments RLoop = 0Ω, LCA = -5V 1500Ω 2000Ω VBat = -48V ILoop ±2 mA IBat IDD IEE 2 15 15 mA mA mA RLoop = Open (On-hook) On-Hook or Off-Hook On-Hook or Off-Hook Power Dissipation PDo PD1 2 250 W mW Active Stand-by/Idle Low Level Input Voltage VOL High Level Input Voltage VOH 3.7 Low Level Input Voltage High Level Input Voltage VIL VIH 2.4 Low Level Input Current High Level Input Current IIL IIH Operating Current 3 0.5 V IOL = 400µA V IOH = 40µA SHK 4 5 RNGC TRC 0.8 V V 20 20 µA µA * DC Electrical Characteristics are over recommended operating conditions unless otherwise stated. ‡ Typical figures are at 25°C with nominal ±5V supplies and are for design aid only. 2-148 VIL = 0.0V VIH = 5.0V MH88620BR Preliminary Information AC Electrical Characteristics* Characteristics Sym Min 1 Analog Tx Gain (T-R to TX) 2 Analog Rx Gain (RX to T-R) 3 Ringing Capability 25 4 On-hook Transmission Signal input level Gain 4 Typ‡ Max 0 Units dB 0 dB 2.0 8 Test Comments Externally adjustable Externally adjustable VRMS RLoop = 1400Ω Term. 6.8µF +200Ω VRMS dB VBat = -48V T-R load = 10Ωk min. msec msec Dial Pulse Detection 5 SHK Rise Time Fall time 6 2 Wire Termination Impedance 7 Off-Hook Detect Threshold 8 2-Wire Return Loss 900Ω at T-R Zin = 900Ω 20 26 20 dB dB dB 300-500Hz 500-2500Hz 2500-3400Hz 900Ω + 2.16µF at T-R Zin = 900Ω 14 18 14 dB dB dB 300Hz 600-2000Hz 3400Hz 58 55 53 dB dB dB 2000Hz, 1000Hz 2000Hz, 3000Hz 3400Hz mA 20mA per lead 9 tR tF Longitudinal Balance Longitudinal to Metallic 10 Longitudinal Current Capability 11 Idle Channel Noise Rx to T-R T-R to Tx NCR N CX Transhybrid Loss THL 12 1 1 900 Ω 10 mA 40 Tx gain 0dB Rx gain 0dB 8 12 Adjustable dBrnc dBrnc 16 20 16 dB dB dB 300-500Hz 500-2500Hz 2500-3400Hz 13 14 Analog Signal Overload Level at TIP and RING 4 dBm T-R = 900Ω VBat = -48V 15 Ringing Signal Voltage 70 80 90 VRMS 16 Ringing Frequency 20 25 30 Hz 17 Ring Trip Delay 18 Absolute Gain variation -25 0 +.25 dB 0dBm at T-R, 1kHz 19 Relative Gain, reference to 1kHz -2 0 +.2 dB 300-3400Hz 20 Power Supply Rejection Ratio VBat VDD VEE dB 1kHz, 100mVpp 24 24 24 30 30 30 100 PSRR ms * AC Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated. ‡ Typical figures are at 25°C with nominal + 5V supplies and are for design aid only. Note: Test Conditions use a transmit and receive gain set to 0dB default and a Zin value of 900Ω unless otherwise stated. “Ref” indicates reference impedance which is equivalent to the termination impedance. “Net” indicates network balance impedance. 2-149 MH88620BR Preliminary Information Transmit Gain (dB) 2-Wire to Tx 20log (Tx/2-Wire) RTX Resistor (1%) Value (Ω) +6.0 No Resistor +4.0 38.3k +3.7 32.4k Notes Results in 0dB overall gain when used with Mitel A-law codec (i.e. MT8965) 0.0 Connect GTX0 to GTX1 -3.0 5.49k -6.0 3.32k -12.0 1.43k Note 1. Overall gain refers to the receive path of PCM to 2-Wire. Note 2 See Figure 2 for Application Circuit. Receive Gain (dB) Rx to 2-Wire 20log (2-Wire/ Rx) RRX Resistor (1%) Value (Ω) Notes +6.0 No Resistor 0.0 Connect GRX0 to GRX1 +3.0 5.49k -3.7 4.87k -4.0 4.64k -6.0 3.32k -12.0 1.43k Results in 0dB overall gain when used with Mitel A-law codec (i.e. MT8965) Note 1. Overall gain refers to the receive path of PCM to 2-Wire. Note 2. See Figure 2 for Application Circuit. 70 60 ILoop (mA) 45 Constant Voltage Region 30 15 Constant Current Region 0 1kΩ 2kΩ RLoop (ohms) Graph 1 - ILoop/RLoop Characteristics 2-150 Preliminary Information Functional Description The SLIC uses a transformerless electronic 2-4 wire converter which can be connected to a Codec to interface the 2 wire subscriber loops to a time division multiplexed (TDM) pulse code modulated (PCM) digital switching network. For analog applications, the TXRX of the 2 wire converter can be connected directly to an analog crosspoint switch, such as the MT8816. Powering of the line is provided through precision battery feed resistors. The MH88620BR also contains control, signalling and status circuitry solution which combines to provide a complete functional solution, simplifying the manufacture of line cards. This circuitry is illustrated in the functional block diagram in Fig 1. The MH88620BR is designed to be pin compatible with Mitel’s MH88632, MH88625 and MH88628. This allows a common PCB design with common gain, input impedance and network balance. Approvals FCC part 68, CCITT, DOS CS-03, UL 1459, CAN/ CSA-22.2 N0. 225-M90 and ANSI/EIA/TIA-464-A are system level safety standards and performance requirements. As a component of a system, the MH88620BR is designed to comply with the applicable requirements of these specifications. Battery Feed The loop current for the subscriber equipment is sourced through a pair of matched 200 ohm resistors connected to the TIP and RING. The two wire loop is biased such that the Ring lead is 2V above VBAT (typically -46V) and the TIP lead is 2V below LGND (typically -2V) during constant voltage mode. The SLIC is designed for a nominal battery voltage of -48Vdc and can provide the maximum loop current of 70mA under this condition. The interface circuit is designed to be operated down to a maximum of 16mA dc, with a battery voltage of -44. The Tip and Ring output drivers can operate within 2V of VBAT and LGND rails. Loop Current Setting The MH88620BR SLIC is a constant resistance with constant voltage fallback design. This design feature provides for long loop capability regardless of the current setting. Refer to graph 1. The LCA (Loop Current Adjust) pin is an input to an internal resistor driver network which generates a MH88620BR bias voltage. The loop current is proportional to this voltage. The loop current can be set between 20 and 70 mA by various connections to the LCA pin as illustrated in Table 5 and Figure 5. The loop current during a fault condition will be limited to the constant loop current programmed. Primary over current protection is inherent in the current limiting feature of the 200 ohm battery feed resistor. Refer to Graph 1. Receive and Transmit Audio Path The audio signal of the 2-wire is sensed differentially across the 200 ohm feed resistor and is passed on to a second differential amplifier stage in the 2W/4W conversion block. This block sets the transmit gain on the 4-wire side and cancels signals originating from the receive input. Programmable Transmit and Receive Gain Transmit Gain (Tip-Ring to Tx) and Receive Gain (Rx to Tip-Ring) are programmed by connecting external resistors (RRX and RTX) from GRX1 to AGND and from GTX1 to AGND as indicated in Figure 2 and Table 1 and 2. The programmable gain range is from -12dB to +6dB; this wide range will accommodate any loss plan. Alternatively, the default Receive Gain of 0dB and Transmit Gain of 0dB can be obtained by connecting GRX0 to GRX1 and GTX0 to GTX1. In addition, a Receive Gain of +6dB and Transmit Gain of +6dB can be obtained by not connecting resistors RRX and RTX. For correct gain programming. the MH88620BR’s Tip-Ring impedance (Zin) must match the line termination impedance. For optimum performance, resistors RRX should be physically located as close as possible to the GRX1 input pin, and resistor RTX should be physically located as close as possible to the GTX1 input pin. Two Wire Port Termination Impedance The AC termination of 900 ohms, of the 2W port is set using active feedback paths to give the desired relationship between the line voltage and the line current. The loop current is sensed differentially across the two feed resistors and converted to a single ended signal. This signal is fed back to the Tip/Ring driver circuitry such that impedance in the feedback path gets reflected to the two wire port. The MH88620BR’s Tip-ring impedance (Zin) is designed to be 900Ω, when used with 25Ω PTC’s as protection circuitry. For this requirement, Z1 and Z2 should be connected together on the PCB. To accommodate the use of lower value PTC’s a series resistance can be connected between Z1 and Z2. For example, it two 8Ω PTCs are used, connect 2-151 MH88620BR 340Ω between Z1 and Z2. The design uses a 0.1 times impedance amplifier so the 340Ω actually adds 34Ω of additional impedance to the 850Ω (16 + 34 + 850 = 900). For complex impedance setting, a capacitor and/or resistor can be connected between Z1 and Z2. For example, if Return Loss is to be maximised for a Zin of 900 +2.2µF, a 0.22µF cap can be connected between Z1 and Z2. Network Balance Transhybrid loss is maximised when the line termination impedance and SLIC network balance are matched. The MH88620BR’s network balance impedance can be set to Zin, or to a user selectable value. Thus, the network balance impedance can be set to any Brazilian or other international requirement. An external Network Balance impedance is selected which 0.1 times the impedance between N1 and AGND. N2 to GND balances to 900Ω. Off-Hook and Dial Pulse Detection The SHK pin goes low when the DC-loop current exceeds a specified level. The threshold level is internally set by the bias voltage of the switch-hook detect circuitry. Dial pulses can be detected by monitoring the interruption rate at the SHK pin. These dial pulses would be debounced by the system software. Ring Trip Detection The interface permits detection of an Off-Hook condition during ringing. If the subscriber set goes Off-Hook when the ringing signal has been applied, the DC loop current flow will be detected within approximately 100msecs and the SHK output will go low. The ring relay is automatically disabled by the internal hardware. Longitudinal Balance The longitudinal balance specifies the degree of common mode rejection in the 2 to 4 wire direction. Precision laser trimming of internal resistors in the hybrid ensures good overall longitudinal balance. The interface circuitry can operate in the presence of induced longitudinal currents of up to 40 mA RMS at 60 Hz. 2-152 Preliminary Information DTMF The DTMF tones are transmitted and received at the 4-wire port. High voltage Capability Inherent in the thick-film process is the ability of the substrate to handle high voltage. The standard Mitel thick-film process provides dielectric strengths of greater than 1000 VAC or 1500 VDC. The thick-film process allows easy integration of surface mount components such as the high voltage bipolar power transistor line drivers. This allows for simpler, less elaborate and less expensive protection circuitry required to handle high voltage transcients and fault conditions caused by lightning, induced voltages and power line crossings. On-Hook Transmission The MH88620BR provides for on-hook transmission which supports features such as Automatic number identification (ANI). The ANI information is a FSK or DTMF signal originating from and sent by the C.O. during the off period of the ringing voltage being sent to the subscriber’s set. The signal is present during the off period between the first and second ring. The subscriber’s set decodes the identification signal and displays the calling party’s number. Loop Length The MH88620BR can accommodate loop lengths of up to 2000 ohms minimum (including the subscriber equipment). This corresponds to approximately 8kmusing #26 AWG twisted pair or 15km using #24 AWG twisted pair. MH88620BR Preliminary Information Applications protection circuitry for the MH88620BR, as illustrated in Figure 7, consists of PTC1, PTC2 and clamping diodes D1 to D4. During a fault condition, the diodes clamp the overvolt Ground and -VBAT. PTC1 and PTC2 current limit as their resistance increases with power dissipation caused by the over-voltage/ over-current condition. The ground that D1 and D3 are connected to, must be an EDG (energy dumping ground) which is connected to the chassis or system ground. This is a seperate conductor from LPGND or AGND on the line card PCB. D2 and D4 conduct the energy into a -VBAT supply which is a seperate conductor from the -VBAT feed supply to the SLICs. A power MOSFET circuit as shown in Figure 8, can be used to divert the energy normally dumped into -VBAT, the EDG conductor. Usually one MOSFET circuit can be used for 16 SLICs or per line card. As shown in the application diagram, Figure 7, the ringing voltage, typically 80 V RMS 25Hz biased at -VBAT, is applied to the subscriber line through an external relay, K1, K1 is a DPST 2-form-C, EM (electro-mechanical) relay which switches protection diodes D3 and D4 out when Ringing is switched in, K1 is enabled by applying a logic low level to the relay driver control input, RNGC. An additional relay driver is provided to control an In/ Out Test Bus relay, K2. K2 is a DPST 2-form-C, EM relay which is enabled by applying a logic low level to the relay driver control input. Protection Circuitry Depending on the additional level of protection required, PRO1 and/or PRO2 protectors may be used. These are used to protect the SLICs Ring sense resistor and/or Ring generator, from being damaged if a fault condition occurs during the application of Ringing to the line. PRO2 can be implemented using two back to back zener diodes, or an equivalent transcient suppressor. Primary protection, from lightning strikes and AC line faults, is normally located in the MDF (main distribution feeder) which is located external to the PABX or CO switching system. The primary protection circuitry is normally housed in a 5-pin connector and consists of either carbon blocks, with spark gaps (older technology), gas discharge limits the high voltage to approximately 300 to 500 volts before entering the switching system. Secondary protection, in the switching system, is required to further limit these high voltages/ currents. Secondary protection is normally implemented on each line card and is designed to protect the SLICs from permanent damage. The basic secondary high voltage The clamping voltage should be >16 Vdc and <26Vdc. PRO2 may not be required depending on the value and power dissipation of PRO1. MH88620BR MH88620BR 24 24 A. 23 Z1 24 Z2 Z2 R Internal 8500 Ω MH88620BR R Internal 8500Ω Z2 23 Z1 External 0.22µF R Internal 8500Ω B. Z1 R External 340Ω C. Notes a) to accommodate the use of 2 x 25Ω PTCs, connect Z1 and Z2 together, Zin = 900Ω. b) to accommodate the use of 2 x 8Ω PTCs, connect 340Ω between Z1 and Z2 = 900Ω. c) to accommodate the use of 2 x 25Ω PTCs, connect 0.22µF between Z1 and Z2 = 900Ω + 2.2µF. Figure 3 - Input Impedance (Z in) setting 2-153 MH88620BR Preliminary Information Loop Current LCA Pin Connection Reference Fig # 20 Connect 10kΩ from LCA to +5V. 5a 25 Connect 16kΩ from LCA to +5V. 5a 30 Connect 36kΩ from LCA to +5V. 5a 35 Leave LCA open circuit 5c 40 Connect 24kΩ from LCA to -5V 5b 45 Connect 10kΩ from LCA to -5V 5b 50 Connect 5.6kΩ from LCA to -5V 5b 55 Connect 2.4kΩ from LCA to -5V 5b 60 Connect 1.3kΩ from LCA to -5V 5b 65 Connect 680kΩ from LCA to -5V 5b 70 Connect LCA to -5V Table 5 - Loop Current Setting 5d MH88620BR R Internal 9000 Ω N1 RP 10 x NETBAL N1 N2 CP RS Zin = 0.1 x [ RS+ 1/RP +1 (S x CP) ] where S = j x w and w = 2 x JC x f Notes: Example: 1) The 10xZin network must be set to 10 x the desired input Zin (impedance). If RS =0Ω, RP = 800Ω, CP=.5nf Then the network balance is 800Ω in parallel with 50nF. 2) The 10 x NETBAL network must be set to10x the desired network balance. 3) Make connection between N1 and component as short as possible. Figure 4 - External Network Balance Setting +5V R LCA LCA LCA LCA -5V -5V 5a 5b 5c Figure 5 - Loop Current Setting 2-154 5d MH88620BR Preliminary Information MH88620BR Z Z TX Transmit Gain: (Tip-Ring to Tx) 25 AV= - 20log [ 0.5+3kΩ ] RTX 10kΩ GTX1 28 GTXO 27 RTX Example RTX=38kΩ; AV= +4dBV 10KΩ Z Z RX 26 10KΩ GRX1 30 GRXO 29 RRX Receive Gain: (RX to Tip-Ring) AV= -20log + 5kΩ ] [ 0.5RRX 10KΩ Example: RRX=4.6kΩ; AV=-4dBV Figure 6 - Gain Programming with External Components 2-155 MH88620BR Preliminary Information -VBat CSTi FDi C2i -5 +5 +5V SYSTEM GROUND VDD RX VBAT GRX0 -5V TERM MH88620BR VEE GRX1 LCA TX VR DSTo MT896X VX CODEC SDo FLi DSTi CA Timeslot Assignment Circuit AGND GTX0 TF1 GTX1 SHK TF2 UD F1i C2i Status Mux Circuit Z1 P R O T E C T I O N TIP Z600 RNGC VRLY RING RF1 RRD K1 REVC RF2 RS1 RS2 NS 90VRMS 20Hz -V Bat Figure 7a - OPS SLIC Configuration Applications Circuit 2-156 CA CSTo MH88620BR Preliminary Information -VBat CSTi FDi C2i -5 +5 +5V SYSTEM GROUND VDD RX VBAT TERM MH88620BR -5V DSTo CODEC GRX0 VEE VR GRX1 LCA TX VX SUBSCRIBER 1 SDo FLi DSTi CA Timeslot Assignment Circuit AGND GTX0 TF1 TF2 GTX1 SHK F1i C2i CA Status Mux Circuit CSTo Z1 RNGC VRLY RING RF1 ~ RRD K1 REVC RF2 + 45VRMS 20Hz Z2 TIP P R O T E C T I O N ~ + -VBat 45Vrms 20Hz NS Figure 7b - OPS SLIC Configuration Applications Circuit - Balanced Ringing 2-157 MH88620BR Preliminary Information Energy Dump Ground (E.D.G) IN4004 MH88620BR MH88620BR IN4004 TIP TIP Line 1 Line 16 RING RING IN4004 IN4004 10K 10nF/100V S G D Heat Sink 9oC/w 1K E.D.G -48V Figure 7c -16 Lines Circuit Configuration 0.080 Max (2.0 Max) Side View 4.20 + 0.020 (50.8 + 0.5) 0.58+0.02 (14.7+0.5) 1 2 3 4 39 40 0.010 + 0.002 (0.25 + 0.05) 0.12 Max (3.1 Max) * 0.05 + 0.01 (1.3 + 0.5) * Notes: 1) Not to scale 2) Dimensions in inches). 3) (Dimensions in millimetres). *Dimensions to centre of pin & tolerance non accumulative. 0.05 + 0.02 (1.3 + 0.05) * 0.020 + 0.05 (0.51 + 0.13) Figure 8 - Mechanical Data 2-158 * 0.100 + 0.10 (2.54 + 0.13) 0.18 + 0.02 (4.6 + 0.5)