MC-7842 MC-7843 HIGH GAIN CATV POWER DOUBLER AMPLIFIER FEATURES OUTLINE DIMENSIONS (Units in mm) PACKAGE OUTLINE H02 • GALLIUM ARSENIDE ACTIVE DEVICES • HIGH GAIN/LOW DISTORTION MC-7842: 22 dB Linear Gain MC-7843: 24 dB Linear Gain • LOW DC CURRENT DRAW 375 mA MAX DC Current (360 TYP) • LOW GAIN CHANGE OVER TEMP 0.5 dB TYP change from -30 to +100°C • HIGH RELIABILITY/RUGGEDNESS Withstands environmental extremes as well as Silicon devices (surge, ESD, etc.) • INDUSTRY COMPATIBLE PACKAGE 45.08 MAX 38.1±0.25 27.5 MAX 3.2 MAX 4.25 + 0.25 - 0.35 VDD 5 14.85 MAX 4.0±0.25 8.1 MAX 19.05±0.38 1 9 In Out 6-32 unc 2B 25.4±0.25 2 3 7 8 2.54±0.25 0.51±0.05 Gnd 21.5 MAX 7 8 9 DESCRIPTION The MC-7842 and MC-7843 are GaAs hybrid integrated circuits designed to be used as the output stage in CATV cable distribution amplifier applications up to 870 MHz. The only difference between the MC-7842 and the MC-7843 is gain of about 22 dB and 24 dB respectively. With this product, NEC has made significant advancements to their initial power doubler product offering, including lower distortion, higher crash point, less variation in gain over temperature, a reduction in out of band gain at the high end, and improved ability to survive an overdrive. Like the previous products, these devices survive such hazards as surge and ESD as well as their sili- 4.19±0.13 2.62±0.35 12.9 MAX 1 2 3 5 10.75 ±0.25 2.54 ±0.38 A 6.3 0.51±0.05 0.38.. A 2.5 ±0.05 con competitors, but deliver superior performance with low DC current required. All devices are assembled and tested using fully automated equipment to maximize consistency in part to part performance, and reliability is assured by NEC's stringent quality and process control procedures. Both parts come in industry compatible hybrid packages. ELECTRICAL CHARACTERISTICS (TCASE = 30°C, VDD = 24 V, ZS = ZL = 75 Ω) PART NUMBER PARAMETERS SYMBOLS UNITS MIN MC-7842 TYP MAX MIN MC-7843 TYP MAX MHz 50 – 870 50 – 870 CONDITIONS BW Frequency Range GL Linear Gain dB 22.0 – 23.5 24.0 – 25.5 f = 870 MHz S Gain Slope dB 0.3 0.9 1.5 0.3 0.9 1.5 50 to 870 MHz Gf Gain Flatness dB – – 1.0 – – 1.0 50 to 870 MHz; Peak to Valley NF Noise Figure dB dB – – – – 6.3 6.8 – – – – 6.0 6.5 50 MHz 870 MHz 375 275 -60 – IDD Operating Current, PIN = none dB 275 CTB Composite Triple Beat Distortion dBc – X-Mod CSO RL in/out Cross Modulation1 -64 375 -64 -60 dBc – -60 -55 – -60 -55 Composite Second Order Distortion dBc – -66 -63 – -66 -63 Input/Output Return Loss dB dB dB dB 20.0 19.0 17.5 16.0 – – – – – – – – 20.0 19.0 17.5 16.0 – – – – – – – – 110 channels, Vout = +50dBmV, at 745.25 MHz, 10dB tilted across the band. 40 to 160 MHz 160 to 320 MHz 320 to 640 MHz 640 to 870 MHz Note: 1. Measured per US standard methods and procedures (using selective level meter). California Eastern Laboratories MC-7842, MC-7843 ABSOLUTE MAXIMUM RATINGS1 (TCASE= 30 °C) RECOMMENDED OPERATING CONDITIONS SYMBOLS (ZS= ZL= 75Ω) PARAMETERS UNITS RATINGS VDD Supply Voltage V 30 SYMBOLS Vi Input Voltage2 dBmV 65 VDD TC Operating Case Temperature °C -30 to +100 Vi Storage Temperature °C -40 to +100 TSTG Note: 1. Operation in excess of any one of these parameters may result in permanent damage. 2. Maximum single channel power applied to the input for 1 minute with no measurable degradation in performance. TC PARAMETERS UNITS MIN TYP MAX V 23.5 24.0 24.5 dBmV dBmV – – 27.0 31.5 25.0 29.5 °C -30 Supply Voltage Input Voltage1 MC-7842 MC-7843 Operating Case Temperature +25 +85 Note: 1. Test Condition: 110 channels, 10 dB tilted across the band. NOTES ON CORRECT USE RECOMMENDED SOLDERING CONDITIONS 1. The space between PC board and root of the lead should be kept more than 1 mm to prevent undesired stress on the lead and also should be kept less than 4 mm to prevent undesired parasitic inductance. This product should be soldered in the following recommended conditions. Other soldering methods and conditions than the recommended conditions are to be consulted with our sales representatives. Recommended space is 2.0 to 3.0 mm typical. 2. Recommended torque strength of the screw is 59 to 78 Ncm. 3. Form the ground pattern as wide as possible to minimize ground impedance. (to prevent undesired oscillation) All the ground pins must be connected together with wide ground pattern to decrease impedance difference. Soldering Method Soldering Conditions Condition Symbol Pin Part Heating Pin area temperature: less than 260°C1 Hour: Within 2 sec./pin – Note. 1. The point of pin part heating must be kept at a distance of more than 1.2 mm from the root of lead. Life Support Applications These NEC products are not intended for use in life support devices, appliances, or systems where the malfunction of these products can reasonably be expected to result in personal injury. The customers of CEL using or selling these products for use in such applications do so at their own risk and agree to fully indemnify CEL for all damages resulting from such improper use or sale. EXCLUSIVE NORTH AMERICAN AGENT FOR RF, MICROWAVE & OPTOELECTRONIC SEMICONDUCTORS CALIFORNIA EASTERN LABORATORIES • Headquarters • 4590 Patrick Henry Drive • Santa Clara, CA 95054-1817 • (408) 988-3500 • Telex 34-6393 • FAX (408) 988-0279 24-Hour Fax-On-Demand: 800-390-3232 (U.S. and Canada only) • Internet: http://WWW.CEL.COM 07/10/2002 DATA SUBJECT TO CHANGE WITHOUT NOTICE