NEC UPD6336

DATA SHEET
MOS INTEGRATED CIRCUIT
µPD6325, µPD6326, µPD6335, µPD6336
QUAD/OCTAL 6BIT D/A CONVERTER
CMOS LSI
DESCRIPTION
µPD6325 Serise are 6 bit D/A Converter for control volumn, brightness, contrast, color or tone of TV set.
The data are transferring serially from micro-computer.
µPD6325 Serise Line-up
QUAD D/A
OCTAL D/A
D/A output is consist of Emitter follower buffer
µPD6325C, 6325G
µPD6326C
Non buffer output
µPD6335C, 6335G
µPD6336C
FEATURES
• R-2R ladder D/A
• Serial Data input (DATA IN, CLOCK, LOAD)
• Power supply voltage of interface is 5 V (VCC) and D/A reference voltage is free (VCC to 15 V).
ORDERING INFORMATION
Part No.
Package
µPD6325C
16-pin plastic DIP (300 mil)
µPD6325G
16-pin plastic SOP (300 mil)
µPD6326C
16-pin plastic DIP (300 mil)
µPD6335C
16-pin plastic DIP (300 mil)
µPD6335G
16-pin plastic SOP (300 mil)
µPD6336C
16-pin plastic DIP (300 mil)
PIN CONNECTION DIAGRAM (Top View)
µ PD6325, µPD6335
µ PD6326, µPD6336
VCC
1
16
VDD
VCC
1
16
VDD
DATA IN
2
15
DA1
DATA IN
2
15
DA1
N.C.
3
14
DA2
CLOCK
3
14
DA2
CLOCK
4
13
DA3
LOAD
4
13
DA3
LOAD
5
12
DA4
OPTION1
5
12
DA4
N.C.
6
11
N.C.
DATA OUT
6
11
DA5
DATA OUT
7
10
OPTION1
DA8
7
10
DA6
VSS
8
9
OPTION2
VSS
8
9
DA7
Document No. G10654EJ6V0DS00 (6th edition)
Date Published November 1997 N
Printed in Japan
©
1995
µPD6325, µPD6326, µPD6335, µPD6336
BLOCK DIAGRAM
VCC
VCC
CLOCK
LSB
DATA IN
D0
D1
D2
12 bit Shift Resister
D3 D4 D5 D6 D7 D8
MSB
D9 D10 D11
LOAD
DATA OUT
Level Shifter
OPTION2
OPTION1
Latch
Level Shifter
Line Decoder
6 bit Latch
6 bit Latch
6 bit R-2R ladder
D/A Converter
6 bit R-2R ladder
D/A Converter
VDD
VCC
VSS
VDD
A
B
✽
A
B
✽
DA1
*A ------ µ PD6335, µ PD6336
B ------ µ PD6325, µ PD6326
2
VDD
DA8
µ PD6325, µPD6326 have Quad D/As.
µPD6325, µPD6326, µPD6335, µPD6336
PIN CONFIGURATION
Pin No.
µPD
6325
6335
µPD
6326
6336
Symbol
Pin Name
Function
Interface Power Supply
This pin is used to interface with the control IC
(ex. micro processor). Supply the voltage high
level of the control IC.
DATA IN
Serial Data Input
Control data input terminal. Data is read in synchronization with the clocks input to the CLOCK
terminal.
3
CLOCK
Shift Clock Input
Data read clock input terminal. The Data input
to the DATA IN terminal is read at the leading
edge of the clock.
5
4
LOAD
Load Pulse Input
This terminal is used to input Load signals after
inputting serial data. 12 bit data is read after
leading edge of a pulse input to the LOAD terminal.
7
6
DATA OUT
Serial Data Output
Serial data output terminal. The final stage data
of 12 bit shift register appeares on this terminal
in synchronization with shift clock.
8
8
VSS
Ground
System ground.
9
–
OPTION2
Expantion Output Port
D7 the data of the shift register appears on this
terminal. (Only µPD6325 and µPD6335)
10
5
OPTION1
Expanttion Output Port
D6 the data of the shift register appears on this
terminal.
–
7
DA8
Analog Output Channel 8
Analog Output
–
9
DA7
Analog Output Channel 7
Analog Output
–
10
DA6
Analog Output Channel 6
Analog Output
–
11
DA5
Analog Output Channel 5
Analog Output
12
12
DA4
Analog Output Channel 4
Analog Output
13
13
DA3
Analog Output Channel 3
Analog Output
14
14
DA2
Analog Output Channel 2
Analog Output
15
15
DA1
Analog Output Channel 1
Analog Output
16
16
VDD
Power Supply
1
1
VCC
2
2
4
Reference Voltage for D/A converters. Analog
output voltage range is GND to VDD.
3
µPD6325, µPD6326, µPD6335, µPD6336
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C)
Supply Voltage
VDD,VCC
–0.5 to +18, VCC ≤ VDD
V
Output Voltage
VOUT
–0.5 to VDD +0.5
V
Input Voltage
VIN
–0.5 to VCC +0.5
Input Current
IIN
Emitter Follower Current
IOE
10
mA
Power Dissipation
PD
500*/200**
mW
Operating Temperature
TA
–40 to +85
°C
Storage Temperature
Tstg
–65 to +125
°C
V
10
mA
*DIP
**SOP
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
MIN.
Supply Voltage
VDD
VCC
Supply Voltage of Interface
VCC
4.5
Low Level Input Voltage
VIL
High Level Input Voltage
VIH
Only µPD6325 & µPD6326
Emitter Follower Power Dissipation 1
TYP.
5.0
MAX.
UNIT
15
V
VCC ≤ VDD
5.5
V
VCC ≤ VDD
0.8
V
VCC = 5 V, VDD = 5 to 15 V
V
VCC = 5 V, VDD = 5 to 15 V
3.5
PE/unit
5
mW
TA = 85 °C
Emitter Follower Power Dissipation 2
PE/unit
15
mW
TA = 70 °C
Emitter Follower Power Dissipation 3
PE total
25
mW
TA = 85 °C
Emitter Follower Power Dissipation 4
PE total
75
mW
TA = 70 °C
TIMING CONDITIONS (TA = –40 to +85 °C, VSS = 0 V, VCC = 5 V, VDD = VCC to 15 V)
CLOCK High Level Width
tCH
4.0
µs
CLOCK Low Level Width
tCL
10.0
µs
CLOCK Rise Time
tcr
CLOCK Fall Time
tcf
1.0
µs
1.0
µs
DATA IN Setup Time
tDsetup
2
µs
DATA IN Hold Time
tDhold
10
µs
tW(LOAD)
4
µs
LOAD Lead Time
tLIead
10
µs
LOAD Lag Time
tLIag
10
µs
Pulse Width, LOAD High
4
CONDITION
µPD6325, µPD6326, µPD6335, µPD6336
ELECTRICAL CHARACTERISTICS
(TA = –40 to +85°C, VSS = 0 V, VCC = 4.5 to 5.5 V, VDD = VCC to 15 V)
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
CONDITION
No Load, for µPD6326, 6336
Current Consumption
IDD
15
mA
Current Consumption
IDD
10
mA
No Load, for µPD6325, 6335
Current Consumption of Interface
Input Leak Current
ICC
10
µA
No Load of DATA OUT,
Static Consumption
IILEAK
±1
µA
VIN = VCC or VSS
DATA OUT
High Level
Output Voltage
IOH
–100
µA
VOH = VDD –0.5 V
DATA OUT
Low Level
Output Voltage
IOL
100
µA
VOL = 0.5 V
Emitter Follower Leak Current
IOLEAK
20
µA
for µPD6325, 6326
Setling Time
tDA set
10
µs
Note
Note µPD6325, 6326: RL = 20 kΩ, CL = 50 pF
µPD6335, 6336: No Load.
5
µPD6325, µPD6326, µPD6335, µPD6336
DATA CONFIGURATION
Data Length is 12 bit.
Last
First
LSB
D0
MSB
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D/A output CONTROL BIT
D11
D10
D9
D8
Select D/A
0
0
0
0
Don't Care
0
0
0
1
DA1
0
0
1
0
DA2
0
0
1
1
DA3
0
1
0
0
DA4
0
1
0
1
DA5
0
1
1
0
DA6
0
1
1
1
DA7
1
0
0
0
DA8
1
×
×
×
Don't Care
Target device
µ PD6325, 6326
µ PD6335, 6336
µ PD6325, 6326
µ PD6335, 6336
µ PD6325, 6326
µ PD6335, 6336
µ PD6325, 6326
µ PD6335, 6336
µ PD6325, 6326
µ PD6335, 6336
µ PD6326
µ PD6336
µ PD6326
µ PD6336
µ PD6326
µ PD6336
µ PD6326
µ PD6336
µ PD6325, 6326
µ PD6335, 6336
OPTION output CONTROL BIT
D7
D6
OPTION1
out.
OPTION2
out.
0
0
L
L
0
1
H
L
1
0
L
H
1
1
H
H
Note
OPTION2 is only
µ PD6325, 6326
OPTION2 is only
µ PD6325, 6326
OPTION2 is only
µ PD6325, 6326
OPTION2 is only
µ PD6325, 6326
D/A Output Voltage CONTROL BIT
6
D5
D4
D3
D2
D1
D0
Output Voltage
0
0
0
0
0
0
VDD/64
0
0
0
0
0
1
2 x VDD/64
0
0
0
0
1
0
3 x VDD/64
0
0
0
0
1
1
4 x VDD/64
1
1
1
1
1
0
63 x VDD/64
1
1
1
1
1
1
VDD
µPD6325, µPD6326, µPD6335, µPD6336
EQUIVALENT CIRCUIT OF 6 bit D/A
R
R
R
R
R
2R
MSB
D5
2R
D4
2R
D3
2R
D2
2R
2R
D1
2R
LSB
D0
R
D/A
OUT
15 kΩ
Output voltage 1/64 VDD to VDD
VDD
TIMING CHART
MSB
DATA IN
D11
LSB
D10
D9
D8
D3
D2
D1
D0
CLOCK
LOAD
D/A OUTPUT
COMMAND VALID
Data is loaded when LOAD is high level.
DATA IN
tDsetup
tDhold
CLOCK
tCL
tCH
tW(LOAD)
tLlag
tL lead
LOAD
tDAset
D/A OUTPUT
COMMAND VALID
7
µPD6325, µPD6326, µPD6335, µPD6336
LINIARITY OF D/A OUTPUT (µPD6335, 6336) (TYP.)
VE NONL (mV)
•TA = –40 °C
60
VDD = 5 V
40
20
0
1
2
3
4
5
6
7
8
16
24
32
40
48
56
64
VE NONL (mV)
LSB
150
VDD = 10 V
100
50
0
1
2
3
4
5
6
7
8
16
24
32
40
48
56
64
LSB
VE NONL (mV)
200
VDD = 15 V
150
100
50
0
1
2
3
4
5
6
7
8
16
24
32
40
48
56
64
LSB
VE NONL (mV)
•TA = 25 °C
60
VDD = 5 V
40
20
0
1
2
3
4
5
6
7
8
16
24
32
40
48
56
64
VE NONL (mV)
LSB
150
VDD = 10 V
100
50
0
1
2
3
4
5
6
7
8
16
24
32
40
48
56
64
LSB
VE NONL (mV)
200
VDD = 15 V
150
100
50
0
1
2
3
4
5
6
7
8
16
24
32
40
48
56
64
LSB
8
µPD6325, µPD6326, µPD6335, µPD6336
VE NONL (mV)
•TA = 85 °C
60
VDD = 5 V
40
20
0
1
2
3
4
5
6
7
8
16
24
32
40
48
56
64
VE NONL (mV)
LSB
150
VDD = 10 V
100
50
0
1
2
3
4
5
6
7
8
16
24
32
40
48
56
64
LSB
VDD = 15 V
VE NONL (mV)
200
150
100
50
0
1
2
3
4
5
6
7
8
16
24
32
40
48
56
64
LSB
* VE NONL = (MEASUREMENT VALUE) – (IDEAL VALUE)
9
µPD6325, µPD6326, µPD6335, µPD6336
Characteristics of Emitter follower buffer (µPD6325, 6326)
(1) VBE - IE (including R-2R’s resister)
1.0
VBE (V)
TA = 25 ˚C
0.5
0
0.01
0.03
0.1
0.3
1
IE (mA)
(2) VBE - TA
1.0
VBE (V)
IDA = –100 µA
0.5
0
–40
0
40
TA (°C)
10
80
µPD6325, µPD6326, µPD6335, µPD6336
APPLICATION FOR TV SET
+5 V
VCC to +15 V
VDD
VCC
+12 V
VDD
DA1
DATA IN
CPU
Video Chroma Signal
Processor
DA2
17K Series
75X, 78K Series
CLOCK
DA3
LOAD
DA4
GND
µ PD6325
or µ PD6326
+12 V
VSS
Dual ATT.
µ PC1406
APPLICATION FOR CASCADE CONNECTING
+5 V
VCC to +15 V
VCC to +15 V
VCC to +15 V
VDD
VDD VCC
VDD VCC
VDD VCC
DATA
DATA
IN
DATA
OUT
DATA
IN
DATA
OUT
DATA
IN
DATA
OUT
CPU
CLOCK
STB
GND
CLOCK
µ PD6325
Series
LOAD
VSS
CLOCK
µ PD6325
Series
LOAD
VSS
CLOCK
µ PD6325
Series
LOAD
VSS
11
µPD6325, µPD6326, µPD6335, µPD6336
16PIN PLASTIC DIP (300 mil)
16
9
1
8
A
K
P
I
L
J
H
G
C
F
D
N
M
B
NOTES
1) Each lead centerline is located within 0.25 mm (0.01 inch) of
its true position (T.P.) at maximum material condition.
2) Item "K" to center of leads when formed parallel.
R
M
ITEM
MILLIMETERS
INCHES
A
20.32 MAX.
0.800 MAX.
0.050 MAX.
B
1.27 MAX.
C
2.54 (T.P.)
0.100 (T.P.)
D
0.50±0.10
0.020 +0.004
–0.005
F
1.2 MIN.
0.047 MIN.
G
3.5±0.3
0.138±0.012
H
0.51 MIN.
0.020 MIN.
I
4.31 MAX.
0.170 MAX.
J
5.08 MAX.
0.200 MAX.
K
7.62 (T.P.)
0.300 (T.P.)
L
6.4
0.252
M
0.25 +0.10
–0.05
0.010 +0.004
–0.003
N
0.25
0.01
P
1.0 MIN.
0.039 MIN.
R
0~15°
0~15°
P16C-100-300A,C-1
12
µPD6325, µPD6326, µPD6335, µPD6336
16 PIN PLASTIC SOP (300 mil)
16
9
P
detail of lead end
1
8
A
H
J
E
K
F
G
I
C
N
D
M
B
L
M
NOTE
Each lead centerline is located within 0.12 mm (0.005 inch) of
its true position (T.P.) at maximum material condition.
ITEM
MILLIMETERS
INCHES
A
10.46 MAX.
0.412 MAX.
B
0.78 MAX.
0.031 MAX.
C
1.27 (T.P.)
0.050 (T.P.)
D
0.40 +0.10
–0.05
0.016 +0.004
–0.003
E
0.1±0.1
0.004±0.004
F
1.8 MAX.
0.071 MAX.
G
1.55
0.061
H
7.7±0.3
0.303±0.012
I
5.6
0.220
J
1.1
0.043
K
0.20 +0.10
–0.05
0.008 +0.004
–0.002
L
0.6±0.2
0.024 +0.008
–0.009
M
0.12
0.005
N
0.10
0.004
P
3° +7°
–3°
3° +7°
–3°
P16GM-50-300B-4
13
µPD6325, µPD6326, µPD6335, µPD6336
REFERENCE
Document Name
Document No.
NEC semiconductor device reliability/quality control system
IEI-1212
Quality grade on NEC semiconductor devices
C11531E
Semiconductor device mounting technology manual
C10535E
Semiconductor device package manual
C10943X
Guide to quality assurance for semiconductor devices
MEI-1202
Semiconductor selection guide
X10679E
14
µPD6325, µPD6326, µPD6335, µPD6336
[MEMO]
15
µPD6325, µPD6326, µPD6335, µPD6336
[MEMO]
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
Anti-radioactive design is not implemented in this product.
M4 96.5