OKI MSC23CV23257A

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MSC23CV23257A-xxBS4
2,097,152-Word ¥ 32-Bit DRAM MODULE : FAST PAGE MODE TYPE WITH EDO
DESCRIPTION
The Oki MSC23CV23257A-xxBS4 is a fully decoded 2,097,152-word ¥ 32-bit CMOS dynamic
random access memory composed of four 16-Mb DRAMs (2M ¥ 8) in TSOP packages mounted
with decoupling capacitors on a 72-pin glass epoxy Small Outline DIMM Package supports any
application where high density and large capacity of storage memory are required.
FEATURES
• 2,097,152-word ¥ 32-bit organization
• 72-pin Small Outline DIMM
• Single 3.3 V supply ±0.3 V tolerance
• Input : LVTTL compatible
• Output : LVTTL compatible, 3-state
• Refresh : 2048 cycles/32 ms
• CAS before RAS refresh, CAS before RAS hidden refresh, RAS-only refresh capability
• Multi-bit test mode capability
• Fast Page Mode with EDO capability
PRODUCT FAMILY
Family
Access Time (Max.)
Power Dissipation
Cycle Time
Operating (Max.) Standby (Max.)
(Min.)
tRAC
tAA
tCAC
MSC23CV23257A-60BS4
60 ns
30 ns
15 ns
110 ns
2160 mW
MSC23CV23257A-70BS4
70 ns
35 ns
20 ns
130 ns
1872 mW
14.4 mW
315
y
ar
¡ Semiconductor
MSC23CV23257A-xxBS4
¡ Semiconductor
MSC23CV23257A-xxBS4
¡ Semiconductor
PIN CONFIGURATION
MSC23CV23257A-xxBS4
(Unit : mm)
2.4 Max.
25.4 ±0.13
3.18 ±0.13
1
5.5 Min.
71
2.0 ±0.13
2.62 Typ.
44.45 ±0.1
1.00 ±0.1
*1
59.69 ±0.2
R2.0
1.0 ±0.1
17.78 ±0.13
0.25 Max.
1.8 ±0.1
72
2 – φ1.8
2
44.45 ±0.1
3.03
51.66 ±0.1
R2.0
3.25 Typ.
5.00
*1 The common size difference of the board width 19.78 mm of its height is
specified as ±0.2. The value above 19.78 mm is specified as ±0.5.
316
0.23 Min.
1.27 ±0.1
¡ Semiconductor
MSC23CV23257A-xxBS4
Pin Configuration
Pin No. Pin Name
1
VSS
Pin No. Pin Name
16
Pin No. Pin Name
A4
31
Pin No. Pin Name
A8
46
NC
Pin No. Pin Name
61
VCC
2
DQ0
17
A5
32
A9
47
WE
62
DQ29
3
DQ1
18
A6
33
NC
48
NC
63
DQ30
4
DQ2
19
A10
34
RAS2
49
DQ18
64
DQ31
5
DQ3
20
NC
35
DQ15
50
DQ19
65
NC
6
DQ4
21
DQ8
36
NC
51
DQ20
66
PD2
7
DQ5
22
DQ9
37
DQ16
52
DQ21
67
PD3
8
DQ6
23
DQ10
38
DQ17
53
DQ22
68
PD4
9
DQ7
24
DQ11
39
VSS
54
DQ23
69
PD5
10
VCC
25
DQ12
40
CAS0
55
NC
70
PD6
11
PD1
26
DQ13
41
CAS2
56
DQ24
71
PD7
12
A0
27
DQ14
42
CAS3
57
DQ25
72
VSS
13
A1
28
A7
43
CAS1
58
DQ26
14
A2
29
NC
44
RAS0
59
DQ27
15
A3
30
VCC
45
NC
60
DQ28
Presence Detect Pins
Pin No.
Pin Name
MSC23CV23257A
-60BS4
MSC23CV23257A
-70BS4
11
PD1
VSS
VSS
66
PD2
NC
NC
67
PD3
VSS
VSS
68
PD4
NC
NC
69
PD5
NC
VSS
70
PD6
NC
NC
71
PD7
NC
NC
317
MSC23CV23257A-xxBS4
¡ Semiconductor
BLOCK DIAGRAM
A0 - A10R DQ
DQ
RAS
DQ
DQ
CAS
DQ
WE
DQ
DQ
DQ
A0 - A10
RAS0
CAS0
WE
VCC
VCC
VCC
VCC
VCC
318
C1
C4
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
OE
VSS
A0 - A10R DQ
DQ
RAS
DQ
DQ
CAS
DQ
WE
DQ
DQ
DQ
CAS3
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
OE
VSS
A0 - A10R DQ
DQ
RAS
DQ
DQ
CAS
DQ
WE
DQ
DQ
DQ
RAS2
CAS2
VSS
OE
VSS
A0 - A10R DQ
DQ
RAS
DQ
DQ
CAS
DQ
WE
DQ
DQ
DQ
CAS1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
OE
VSS
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
¡ Semiconductor
MSC23CV23257A-xxBS4
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Voltage on Any Pin Relative to VSS
VIN, VOUT
–0.5 to 4.6
V
Voltage VCC Supply Relative to VSS
VCC
–0.5 to 4.6
V
Short Circuit Output Current
IOS
50
mA
Power Dissipation
PD
4
W
Operating Temperature
Topr
0 to 70
°C
Storage Temperature
Tstg
–40 to 125
°C
Note: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to the conditions as detailed in the
operational sections of this data sheet. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Recommended Operating Conditions
(Ta = 0°C to 70°C)
Symbol
Min.
Typ.
Max.
Unit
VCC
3.0
3.3
3.6
V
VSS
0
0
0
V
Input High Voltage
VIH
2.0
—
VCC + 0.3
V
Input Low Voltage
VIL
–0.3
—
0.8
V
Parameter
Power Supply Voltage
Capacitance
(Ta = 25°C, f = 1 MHz)
Symbol
Typ.
Max.
Unit
Input Capacitance (A0 - A10)
CIN1
—
27
pF
Input Capacitance (RAS0, RAS2)
CIN2
—
20
pF
Input Capacitance (CAS0 - CAS3)
CIN3
—
13
pF
Input Capacitance (WE)
CIN4
—
35
pF
I/O Capacitance (DQ0 - DQ31)
CDQ
—
13
pF
Parameter
Note : Capacitance measured with Boonton Meter.
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MSC23CV23257A-xxBS4
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DC Characteristics
Parameter
(VCC = 3.3 V ±0.3 V, Ta = 0°C to 70°C)
Symbol
MSC23CV23257A
MSC23CV23257A
-60BS4
-70BS4
Condition
Unit Note
Min.
Max.
Min.
Max.
–40
40
–40
40
µA
–10
10
–10
10
µA
0 V £ VI £ VCC + 0.3 V;
Input Leakage Current
ILI
All other pins not
under test = 0 V
DOUT disable
Output Leakage Current
ILO
Output High Voltage
VOH
IOH = –2.0 mA
2.4
VCC
2.4
VCC
V
Output Low Voltage
VOL
IOL = 2.0 mA
0
0.4
0
0.4
V
—
600
—
520
—
8
—
8
mA
1
—
4
—
4
mA
1
—
600
—
520
mA 1, 2
—
600
—
520
mA 1, 2
—
600
—
520
mA 1, 3
Average Power
Supply Current
ICC1
(Operating)
Power Supply
Current (Standby)
ICC3
CAS = VIH,
tRC = Min.
RAS cycling,
ICC6
(CAS before RAS Refresh)
CAS before RAS,
tRC = Min.
RAS = VIL,
Average Power
(Fast Page Mode)
RAS, CAS
ICC7
CAS cycling,
tHPC = Min.
Notes: 1. ICC Max. is specified as ICC for output open condition.
2. Address can be changed once or less while RAS=VIL.
3. Address can be changed once or less while CAS=VIH.
320
mA 1, 2
RAS cycling,
Average Power
Supply Current
tRC = Min.
≥ VCC –0.2 V
(RAS-only Refresh)
Supply Current
RAS, CAS cycling,
RAS, CAS = VIH
ICC2
Average Power
Supply Current
0 V £ VO £ 3.6 V
¡ Semiconductor
MSC23CV23257A-xxBS4
AC Characteristics (1/2)
Parameter
(VCC = 3.3 V ±0.3 V, Ta = 0°C to 70°C)
Symbol
Note 1,2,3,10,11
MSC23CV23257A
MSC23CV23257A
-60BS4
Min.
Max.
-70BS4
Min.
Max.
Unit Note
Random Read or Write Cycle Time
tRC
110
—
130
—
ns
Fast Page Mode Cycle Time
tHPC
25
—
30
—
ns
Access Time from RAS
tRAC
—
60
—
70
ns
4, 5, 6
Access Time from CAS
tCAC
—
15
—
20
ns
4, 5
Access Time from Column Address
tAA
—
30
—
35
ns
4, 6
Access Time from CAS Precharge
tCPA
—
35
—
40
ns
4
4
Output Low Impedance Time from CAS
tCLZ
0
—
0
—
ns
Output Hold Time from CAS Low
tDOH
5
—
5
—
ns
CAS to Data Output Buffer Turn-off Delay Time
tCEZ
0
15
0
15
ns
7, 8
RAS to Data Output Buffer Turn-off Delay Time
tREZ
0
15
0
15
ns
7, 8
WE to Data Output Buffer Turn-off Delay Time
tWEZ
0
15
0
15
ns
7
Transition Time
tT
3
50
3
50
ns
3
Refresh Period
tREF
—
32
—
32
ms
RAS Precharge Time
tRP
40
—
50
—
ns
RAS Pulse Width
tRAS
60
10k
70
10k
ns
RAS Pulse Width (Fast Page Mode)
tRASP
60
100k
70
100k
ns
RAS Hold Time
tRSH
15
—
20
—
ns
CAS Precharge Time
tCP
10
—
10
—
ns
CAS Pulse Width
tCAS
10
10k
10
10k
ns
RAS Low to CAS High Delay Time
tCSH
40
—
45
—
ns
CAS High to RAS Low Delay Time
tCRP
5
—
5
—
ns
RAS Hold Time from CAS Precharge
tRHCP
35
—
40
—
ns
RAS to CAS Delay Time
tRCD
20
45
20
50
ns
5
6
RAS to Column Address Delay Time
tRAD
15
30
15
35
ns
RAS to Second CAS Delay Time
tRSCD
60
—
70
—
ns
Row Address Set-up Time
tASR
0
—
0
—
ns
Row Address Hold Time
tRAH
10
—
10
—
ns
Column Address Set-up Time
tASC
0
—
0
—
ns
Column Address Hold Time
tCAH
15
—
15
—
ns
Column Address Hold Time from RAS
tAR
40
—
45
—
ns
Column Address to RAS Lead Time
tRAL
30
—
35
—
ns
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MSC23CV23257A-xxBS4
¡ Semiconductor
AC Characteristics (2/2)
Parameter
(VCC = 3.3 V ±0.3 V, Ta = 0°C to 70°C)
Symbol
Note 1,2,3,10,11
MSC23CV23257A
MSC23CV23257A
-60BS4
Min.
Max.
-70BS4
Min.
Max.
Unit Note
Read Command Set-up Time
tRCS
0
—
0
—
ns
Read Command Hold Time
tRCH
0
—
0
—
ns
9
Read Command Hold Time referenced to RAS
tRRH
0
—
0
—
ns
9
Write Command Set-up Time
tWCS
0
—
0
—
ns
Write Command Hold Time
tWCH
10
—
15
—
ns
Write Command Hold Time from RAS
tWCR
40
—
45
—
ns
Write Command Pulse Width
tWP
10
—
15
—
ns
Write Command Pulse Width (Output Disable) tWPE
5
—
10
—
ns
Write Command to RAS Lead Time
tRWL
15
—
20
—
ns
Write Command to CAS Lead Time
tCWL
15
—
20
—
ns
Data-in Set-up Time
tDS
0
—
0
—
ns
Data-in Hold Time
tDH
15
—
15
—
ns
Data-in Hold Time from RAS
tDHR
40
—
45
—
ns
CAS Active Delay Time from RAS Precharge tRPC
5
—
5
—
ns
RAS to CAS Set-up Time (CAS before RAS) tCSR
5
—
5
—
ns
RAS to CAS Hold Time (CAS before RAS)
tCHR
10
—
15
—
ns
WE to RAS Precharge Time (CAS before RAS)
tWRP
10
—
10
—
ns
WE Hold Time from RAS (CAS before RAS)
tWRH
10
—
10
—
ns
RAS to WE Set-up Time (Test Mode)
tWTS
10
—
10
—
ns
RAS to WE Hold Time (Test Mode)
tWTH
10
—
10
—
ns
322
¡ Semiconductor
Notes:
MSC23CV23257A-xxBS4
1. A start-up delay of 200 µs is required after power-up, followed by a minimum of eight
initialization cycles (RAS-only refresh or CAS before RAS refresh) before proper device
operation is achieved.
2. The AC characteristics assume tT = 5 ns.
3. VIH (Min.) and VIL (Max.) are reference levels for measuring input timing signals.
Transition times (tT) are measured between VIH and VIL.
4. This parameter is measured with a load circuit equivalent to 2 TTL loads and 100 pF.
5. Operation within the tRCD (Max.) limit ensures that tRAC (Max.) can be met.
tRCD (Max.) is specified as a reference point only. If tRCD is greater than the specified
tRCD (Max.) limit, access time is controlled by tCAC.
6. Operation within the tRAD (Max.) limit ensures that tRAC (Max.) can be met.
tRAD (Max.) is specified as a reference point only. If tRAD is greater than the specified
tRAD (Max.) limit, access time is controlled by tAA.
7. tCEZ (Max.), tREZ (Max.) and tWEZ (Max.) define the time at which the output achieves
the open circuit condition and are not referenced to output voltage levels.
8. tCEZ and tREZ must be satisfied for open circuit condition.
9. tRCH or tRRH must be satisfied for a read cycle.
10. The test mode is initiated by performing a WE and CAS before RAS refresh cycle.
This mode is latched and remains in effect until the exit cycle is generated.
The test mode specified in this data sheet is a 2-bit parallel test function. CA9 is not
used. In a read cycle, if all internal bits are equal, the DQ pin will indicate a high
level. If any internal bits are not equal, the DQ pin will indicate a low level.
The test mode is cleared and the memory device returned to its normal operating
state by performing a RAS-only refresh cycle or a CAS before RAS refresh cycle.
11. In a test mode read cycle, the value of access time parameters is delayed for 5 ns for the
specified value. These parameters should be specified in test mode cycle by adding the above
value to the specified value in this data sheet.
See ADDENDUM I for AC Timing Waveforms
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MSC23CV23257A-xxBS4
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