FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 ¡ Semiconductor FEDL7110-03 This version: Sep. 2000 MSC7110-01/7112-01 Previous version: Nov. 1997 12-Segment ¥ 16-Digit or 16-Segment ¥ 12-Digit Display Controller/Driver GENERAL DESCRIPTION The MSC7110-01/MSC7112-01 is a display controller to display the timer of video tape recorder, channel operation, and other infomaiton by a vaccum fluorescent display tube. Display data is input by serial transfer from microcontroller. FEATURES • Provides the interface with a microcontroller by three signal lines. : DATA IN, CLOCK, and LOAD • Driver output can directly be connected to a vaccum fluorescent display tube without a pull-down resistor. • Display is turned on by dynamic drive mode. • The number of display digits are programmable in the range of : 1 to 12 digits (MSC7112-01) 1 to 16 digits (MSC7110-01) • 12-segment driver output : 16 driver outputs (MSC7112-01) 12 driver outputs (MSC7110-01) • The LED drivers can turn on 5 outputs statically. • RAM data can directly be displayed. • The brightness adjustment is programmable and brightness can be adjusted every 1/15 step. • Built-in power-on-reset circuit • The vacuum fluorescent display tube driver outputs high withstand voltage : VDD-VEE=45V (max). • Logic supply voltage : VDD=5V ±10% • Package options: 42-pin plastic SDIP (SDIP42-P-600-1.778) : (Product name : MSC7112-01SS) 44-pin plastic QFP (QFP44-P-910-0.80-2K) : (Product name : MSC7110-01GS-2K/MSC7112-01GS-2K) 1/18 DATA IN LOAD I LATCH 18-bit S•R 18 SEG A L 18-bit LATCH bit 0 LOAD SEG DRV LATCH POR bit 18 b 0-16 COMMAND DECODER 3 (ROM) RAM 17 17 17 1 16W ¥ 17bits A0-A3 TEST MODE fW Address 32 ¥ 16bits L RAM PC 16 PLA 4 b15-17 Q 12 OSC TIMING GENERATOR 4 POR D•C•R LOAD POR POR L D•R LOAD DUTY CYCLE COUNTER 4 O A=B b0-4 DIGIT LOAD BLANK BLANK DUTY A=B 16 L•R LATCH 5 DIGIT TIME COUNTER ¥ 16 OE D16 L (15) LED DRV LED1 5 L•R LOAD D•T•C S 16 ¥5 LED5 2/18 FEDL7110-03 VEE (–20 to –40) b0-3 A B O L ADDRESS COMP 4 4 MSC7110-01/7112-01 VDD (+5V) VSS (0V) 4 D•C•C L 4 R•A•C R A=B R•A•C COUNT D•R LATCH L D•C•R DOWN COUNTER 4 b0-3 (0) LATCH 4 W•A•C 4 D1 MSC7110-01 OSCI OSCO L (b11) DIGIT DRV ADDRESS SELECTOR 4 W•A LOAD W•A•C COUNT SEG L PLA fR PC2 DECODER W/R 4 b0-3 ¥ 12 OE L RAM fR PLA PC1 CONTROL (b0) ¡ Semiconductor BLOCK DIAGRAM SCLK ¡ Semiconductor SCLK DATA IN LOAD I LATCH 18-bit S•R 18 SEG A L 18-bit LATCH R POR bit 18 bit 0 LOAD SEG DRV LATCH b0-16 17 COMMAND DECODER 3 (ROM) RAM 17 17 1 16 PLA Q 16 A0-A3 TEST MODE fW 32 ¥ 16bits L RAM fR RAM PC OE L DIGIT DRV OSC TIMING GENERATOR R 4 POR D•R LATCH 4 POR b0-3 D•C•C L R•A•C R A=B D•R LOAD DUTY CYCLE COUNTER A B 4 O A=B b0-4 DIGIT LOAD BLANK L•R LATCH 5 ¥ 12 OE D12 L (11) LED DRV LED1 ¥5 LED5 3/18 FEDL7110-03 DIGIT TIME COUNTER 12 5 L•R LOAD D•T•C S O BLANK DUTY A=B 16 4 L ADDRESS COMP 4 L 4 MSC7110-01/7112-01 VDD (+5V) VEE (–20 to –40) b0-3 L D•C•R DOWN COUNTER VSS (0V) 4 W•A•C (0) LATCH 4 R•A•C COUNT D•C•R COAD POR L D1 ADDRESS SELECTOR 4 W•A•C LOAD W•A•C COUNT (b15) MSC7112-01 W/R 4 b0-3 CONTROL SEG P PLA fR PLA PC1 PC2 DECODER OSCI OSCO ¥ 16 16W ¥ 17bits 4 b15-17 (b0) FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 INPUT AND OUTPUT CONFIGURATION Input Pin VDD LOAD DATA IN SCLK OSCI VDD VDD R POR Output Pin VDD OSCO VDD VDD *1 SEGA-L *2 SEGA-P LED1LED5 VEE VDD *2 D1-D12 *1 D1-D16 VEE *1 MSC7110-01 *2 MSC7112-01 4/18 FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 PIN CONFIGURATION (TOP VIEW) 34 D2 35 D3 36 D4 37 D5 38 D6 39 VEE 40 D7 41 D8 42 D9 43 D10 44 D11 MSC7110-01 33 D1 LED5 6 VSS 7 VEE 8 LED4 9 LED3 10 24 SEGB LED2 11 23 SEGC 32 VDD 31 POR 30 OSCO 29 OSCI 28 LOAD 27 DATA IN 26 SCLK SEGD 22 SEGE 21 SEGF 20 25 SEGA SEGG 19 SEGH 18 5 VEE 17 D16 16 4 SEGI D15 SEGJ D14 3 15 2 SEGK 14 D13 SEGL 13 1 LED1 12 D12 44-Pin Plastic QFP 5/18 FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 34 D2 35 D3 36 D4 37 D5 38 D6 39 VEE 40 D7 41 D8 42 D9 43 D10 44 D11 MSC7112-01 DATA IN 26 SCLK 25 SEGA 10 24 SEGB 11 23 SEGC 7 VEE 8 SEGP 9 SEGO SEGN SEGD 22 27 VSS SEGE 21 LOAD 6 SEGF 20 28 LED5 SEGG 19 OSCI 5 SEGH 18 29 LED4 VEE 17 OSCO 4 16 30 LED3 SEGI POR 3 15 31 LED2 SEGJ VDD 2 SEGK 14 32 LED1 SEGL 13 D1 1 SEGM 12 33 D12 44-Pin Plastic QFP 6/18 FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 MSC7112-01 OSCI 1 OSCO 2 42 LOAD 41 DATA IN POR 3 40 SCLK VDD 4 39 SEG A D1 5 38 SEG B D2 6 37 SEG C D3 7 36 SEG D D4 8 35 SEG E D5 9 34 SEG F D6 10 33 SEG G D7 11 32 SEG H D8 12 31 SEG I D9 13 30 SEG J D10 14 29 SEG K D11 15 28 SEG L D12 16 27 SEG M LED1 17 26 SEG N LED2 18 25 SEG O LED3 19 24 SEG P LED4 20 23 VEE LED5 21 22 VSS 42-PIN PLASTIC SDIP Note: The product name actually printed on the product is "C7112-01". 7/18 FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 PIN DESCRIPTION Symbol Number of Pins Type Connected Description to Power source VDD-VSS: Supply voltage for internal logic VDD 1 — VSS 1 — VEE 1 — logic DATA IN 1 I Microcontroller Input of display data of the shift register Input from the MSB (positive logic). SCLK 1 I LOAD 1 I POR 1 I VDD-VEE: Supply voltage for VF display tube driving circuit Shift clock of the shift register. Data is shifted at the falling edge of SCLK. Latch clock input for display data. When this pin is at a "H" level, the data is not latched to pass through the latch circuit. When the pin is at a "L" level, the data when the pin is at the "H" level is latched. — Internal logic reset input upon power-on. During reset, the 18-bit internal latch, duty cycle register, digital register, LED register, and write/read address register are all reset, and the outputs of SEGA to SEGP(*a), D1 to D12 (*b), and LED1 to LED5 go off. Connecting of an external capacitor to the pin allows poweron reset. — Input for oscillation circuit When an external resistor and a capacitor are connected, an oscillation circuit is formed. C=100pF, R=47kW fOSC=235kHz±20% Schmitt with pull-up resistor using diode OSC I 1 I OSC O 1 O SEGA-L 12 *1 O Anode side of Output for driving anode electrodes of VF display tube. SEGA-P 16 *2 D1-D12 12 2 O Grid side of VF Output for driving grid electrodes of VF display tube. D1-D16 16 *1 LED1-LED5 5 *a *b *1 *2 VF display tube The output is complementary. display tube O LED The output is complementary. LED driving output. The output is complementary. SEGA to SEGL in case of MSC7110-01 D1 to D16 in case of MSC7110-01 In case of MSC7110-01 In case of MSC7112-01 8/18 FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 ABSOLUTE MAXIMUM RATINGS Symbol Condition Range Unit Supply Voltage (1) Parameter VDD — –0.3 to +6.5 V Supply Voltage (2) VDD-VEE — 0 to 50 V VI — –0.3 to VDD+0.3 V PD Ta£25°C to 500 mW TSTG — –55 to +150 °C Input Voltage Power Dissipation Storage Temperature Output Current IO1 All SEG output –10 mA IO2 All DIGIT output –60 mA IO3 LED1-LED5 –20 mA RECOMENDED OPERATING CONDITIONS Symbol Condition Range Unit Supply Voltage (1) Parameter VDD — 4.5 to 5.5 V Supply Voltage (2) VDD-VEE — 25 to 45 V Oscillation Frequency fOSC — 200 to 500 kHz Operating Temperature TOP — –20 to +75 °C ELECTRICAL CHARACTERISTICS DC Characteristics (VDD–VEE=45V, VDD=5V±10%, Ta=–20 to +75°C) Symbol Condition Min. Typ. Max. High Level Input Voltage VIH — 0.7VDD — — Low Level Input Voltage VIL — — — 0.3VDD V All input High Level Input Current IIH VDD=5.5V, VI=VDD — — 1 mA All input Low Level Input Current (1) IIL1 VDD=5.5V, VI=0V — — –1 mA All input except POR Low Level Input Current (2) IIL2 VDD=5.5V, VI=0V –27 –55 –110 mA POR High Level Output Voltage (1) VOH1 VDD=4.5, IOH=–6mA VDD–2.2 VDD–1.5 — V All SEG output Low Level Output Voltage (1) VOL1 VDD=4.5, IOL=0.2mA — VEE+0.8 VEE+1.3 V All SEG output High Level Output Voltage (2) VOH2 VDD=4.5, IOH=–30mA VDD–2.9 VDD–2.3 — V All DIGIT output Low Level Output Voltage (2) VOL2 VDD=4.5, IOL=0.2mA — VEE+0.8 VEE+1.3 V All DIGIT output High Level Output Voltage (3) VOH3 VDD=4.5, IOH=–10mA VDD–1.5 — — V LED1-LED5 Low Level Output Voltage (3) VOL3 VDD=4.5, IOL=0.1mA — — 0.5 V LED1-LED5 VDD=5.5V, No load fOSC=245kHz — 8.5 15 Parameter Current Consumption IDD Unit Applicable pin V All input mA — 9/18 FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 AC Characteristics (VDD=5V±10%, Ta=–20 to +75°C) Parameter Symbol Condition Min. Typ. Max. Unit SCLK Cycle Time tCP — 2 — — ms SCLK, LOAD Pulse Width tW — 1 — — ms Data Setup Time tDSU — 500 — — ns Data Hold Time tDHD — 500 — — ns tSL — 2 — — ms SCLK-LOAD Time tLS — 2 — — ms LOAD Cycle Time 1* tLCYC1 fOSC=245kHz 205 — — ms LOAD Cycle Time 2 tLCYC2 fOSC=245kHz 200 — — ms LOAD-SCLK Time * tLCYC1>16/fOSC must be satisfied. tCP tW SCLK 0.7VDD tDSU DATA IN 0.7VDD 0.3VDD tDHD 0.7VDD 0.7VDD 0.3VDD 0.3VDD 0.7VDD tSL tW tLS 0.7VDD LOAD 0.7VDD 0.3VDD tLCYC2 tLCYC1 Oscillation Characteristics (VDD=5V, VDD–VEE=25V to 45V, Ta=–20 to +75°C) Parameter Symbol Condition Min. Typ. Max. Oscillation Frequency fOSC C=100pF, R=47kW 188 235 282 Unit Applicable pin kHz OSCI, OSCO 10/18 FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 TIMING DIAGRAM 16-digit display t1= 64 ¥ 16 = 1024T D1 60T 4T t2 t3 VDD VEE D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 VDD VEE SEGn t1=Frame cycle t2=Display timing t3=Blank timing fOSC=245kHz t1=4.096ms t2=240ms t3=16ms T=1/fOSC 11/18 *1 *1 *1 b9 b8 SEGK SEGJ SEGI b7 b6 b5 b4 b3 b2 b1 LSB b0 SEGF SEGE SEGD SEGC SEGB SEGA *1 0 0 SEGP Display data is set in the LED register and output to the LED1 1 to LED5 pins (Positive logic) 0 0 ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ D.R LOAD The number of digits is set in the digit register. 1 0 1 0 ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ 23 22 21 20 W.A.C LOAD The write address is set in the write address counter. (The write position is set.) 1 1 0 ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ 23 22 21 20 L.R LOAD SEGO SEGN SEGM SEGL SEGH SEGG LED5 LED4 LED3 LED2 LED1 The duty value is set in the duty cycle register. 1 1 1 ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ 23 22 21 20 TEST LOAD MODE The TEST mode is set. 1 0 1 1 ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ : Don't Care FEDL7110-03 12/18 MSC7110-01/7112-01 D.C.R LOAD *1: Ignored in the case of MSC7110-01. ¡ Semiconductor The RAM data is output directly to the SEGA to SEGP pins (Positive logic) MSB b17 b16 b15 b14 b13 b12 b11 b10 FUNCTION DESCRIPTION DATA DISPLAY Function Command Description Input data Command FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 Relation between write address and digit output Write address count 0 1 2 3 4 5 6 7 Corresponding digit output D1 D2 D3 D4 D5 D6 D7 D8 8 9 A B C D E F *1 *1 *1 *1 D9 D10 D11 D12 D13 D14 D15 D16 *1: Ignored in the case of MSC7112-01 Inputting Display Data LED display Display data is output to the LED1 to LED5 pins in correspondence with each bit by executing the L. RLOAD command. Input data uses positive logic. When the data is 1, the LED lights. When the data is 0, the LED goes off. VF display (RAM direct display) Set optional data in the digit register and the duty register, and execute the W.A.C LOAD command to set the display digit position. Execute the DATA DISPLAY command to write the b0 to b15 (*1) display data in the RAM. The write address counter is incremented by one. The write address counter counts sequentially 0, 1, 2,------, 14, 15, 0, 1, ----- regardless of the value of the digit register. *1 : b0 to b11 display data in the case of MSC7110-01. Brightness Adjustment The brightness can be adjusted by using the values of the duty cycle register (D.C.R) and the digit register (D.R). The value of the duty cycle register changes the pulse width (B) at the D1 to D16 output pins, and the value of the digit register changes the cycle (A). The table below gives the relation between the value of the duty cycle register and the duty. When all the values of the duty cycle register are 0 (in the case of 16-digit display), the display is blank. D.C.R DUTY D.C.R DUTY D.C.R DUTY D.C.R DUTY b3 b2 b1 b0 B/A b3 b2 b1 b0 B/A b3 b2 b1 b0 B/A b3 b2 b1 b0 B/A 0 0 0 0 — 0 1 0 0 16/1024 1 0 0 0 32/1024 1 1 0 0 48/1024 0 0 0 1 4/1024 0 1 0 1 20/1024 1 0 0 1 36/1024 1 1 0 1 52/1024 0 0 1 0 8/1024 0 1 1 0 24/1024 1 0 1 0 40/1024 1 1 1 0 56/1024 0 0 1 1 12/1024 0 1 1 1 28/1024 1 0 1 1 44/1024 1 1 1 1 60/1024 B VDD VEE Dn A A=64 ¥ n=64 ¥ 16=1024 n : Number of display digits 13/18 FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 Number of Display Digits The number of display digits is set by the digit register. The number of display digits ranges from 1 to 16 (*1). The value of the digit register and the number of digits are as follows: D.R Control D.R Control D.R Control D.R Control b3 b2 b1 b0 digit digit b3 b2 b1 b0 digit b3 b2 b1 b0 digit b3 b2 b1 b0 0 1 0 0 D1-D4 1 0 0 0 D1-D8 1 1 0 0 D1-D12 0 0 0 0 *2 D1-D16 0 0 0 1 D1-D1 0 1 0 1 D1-D5 1 0 0 1 D1-D9 1 1 0 1 *2 D1-D13 0 0 1 0 D1-D2 0 1 1 0 D1-D6 1 0 1 0 D1-D10 1 1 1 0 *2 D1-D14 0 0 1 1 D1-D3 0 1 1 1 D1-D7 1 0 1 1 D1-D11 1 1 1 1 *2 D1-D15 *1 1 to 12 digits in the case of the MSC7112-01 *2 Ignored in the case of the MSC7112-01 14/18 FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 APPLICATION CIRCUIT VDD +5V + – Microcontroller VSS Output port ANODE (SEGMENT) MSC7110-01 VDD SEG A-SEG L DATA IN SCLK MSC7110-01 LOAD VSS POR + – OSCI C Heater transformer VF display tube GRID (DIGIT) D1-D16 LED1 LED5 OSCO VEE R2 LED R2 R R1 –25 to –40V ZD 15/18 FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 PACKAGE DIMENSIONS (Unit : mm) SDIP42-P-600-1.778 Oki Electric Industry Co., Ltd. Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised Epoxy resin 42 alloy Solder plating (≥5 mm) 4.52 TYP. 2/Dec. 11, 1996 Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 16/18 FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 (Unit : mm) QFP44-P-910-0.80-2K Mirror finish Oki Electric Industry Co., Ltd. Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised Epoxy resin 42 alloy Solder plating (≥5 mm) 0.41 TYP. 4/ Nov. 28, 1996 Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 17/18 FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party’s right which may result from the use thereof. 6. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. No part of the contents contained herein may be reprinted or reproduced without our prior permission. 9. MS-DOS is a registered trademark of Microsoft Corporation. Copyright 2000 Oki Electric Industry Co., Ltd. Printed in Japan 18/18