FEDL6786-03 ¡ Semiconductor MSM6786 ¡ Semiconductor FEDL6786-03 This version: Sep. 2000 MSM6786 Previous version: Nov. 1997 1/3, 1/4 DUTY LCD DRIVER WITH 4-DOT COMMON DRIVER AND 29-DOT SEGMENT DRIVER GENERAL DESCRIPTION The MSM6786 is a dynamic display LCD driver and can be switched to 1/3 or 1/4 duty. It can dis-play up to 116 segments with 1/4 duty and up to 87 segments with 1/3 duty. It can also drive one LED directly. The built-in 5¥6 key circuit allows input through a keyboard, and minimizes the number of wires between the front panel and CPU. FEATURES • Power suppy voltage : 5V±10% • Operating temperature : –40 to +85°C • 29-output segment driver 1/4 duty dynamic drive : Up to 116 segments can be displayed 1/3 duty dynamic drive : Up to 87 segments can be displayed • One LED can be driven directly (IO=–15mA max) • Built-in 5¥6 key scan circuit allows reading of the operation status of up to 30 switches. • Interface with CPU is implemented by LOAD, DATA I/O and CLOCK in serial method. • Built-in RC oscillator for LCD AC drive • Built-in voltage dividing resistor for bias voltage generation • Package: 56-pin plastic QFP (QFP56-P-910-0.65-2K) (Product name : MSM6786GS-2K) 1/17 FEDL6786-03 ¡ Semiconductor MSM6786 BLOCK DIAGRAM LED SEG1 LED DRV. SEG29 29-DOT SEG. DRV. TIMING GEN. 3/4SEL COM1 29-BIT DATA SELECTOR OSC COM. DRV. OSC VDD COM2 COM3 COM4 (DATA LATCH1) 30-BIT LATCH (DATA LATCH2) 29-BIT LATCH (DATA LATCH3) 29-BIT LATCH (DATA LATCH4) 29-BIT LATCH RESET VDD VSS MODE SELECTOR TEST LOAD CONTROL C5 C4 C3 C2 C1 C0 36(30+6)-BIT SHIFT REGISTER DATA I/O INT LOGIC 5¥6 KEY SCANNER CLOCK VDD C0 C1 C2 C3 C4 C5 R0 R1 R2 R3 R4 2/17 FEDL6786-03 ¡ Semiconductor MSM6786 56 55 54 53 52 51 50 49 48 47 46 45 44 43 COM1 COM2 COM3 COM4 TEST VSS OSC VDD 3/4SEL LED RESET INT DATAI/O CLOCK PIN CONFIGURATION (TOP VIEW) 42 41 40 39 38 37 36 35 34 33 32 31 30 29 LOAD R4 R3 R2 R1 R0 C5 C4 C3 C2 C1 C0 SEG29 SEG28 15 16 17 18 19 20 21 22 23 24 25 26 27 28 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 VDD SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 56-Pin Plastic QFP 3/17 FEDL6786-03 ¡ Semiconductor MSM6786 ABSOLUTE MAXIMUM RATINGS Parameter Power Supply Voltage Input Voltage Output Current Storage Temperature Symbol Condition Rating VDD Ta=+25°C –0.3 to +6.5 V VI Ta=+25°C –0.3 to VDD+0.3 V IO Ta=+25°C TSTG — *1 Unit –20 mA –55 to +150 °C *1 Applied to LED output RECOMMENDED OPERATING CONDITIONS Symbol Condition Range Unit Power Supply Voltage Parameter VDD VSS=OV 4.5 to 5.5 V Operating Temperature Top — –40 to +85 °C Specifications of External Parts (oscillation circuit) Symbol Condition Min. Max. Unit Oscillation Resistor (Resistance) Parameter RO — 20 82 kW Oscillation Capacitor (Capacitance) CO — 0.01 0.047 mF 4/17 FEDL6786-03 ¡ Semiconductor MSM6786 ELECTRICAL CHARACTERISTICS DC Characteristics (VDD=5V±10%, Ta=–40 to +85°C) Parameter Symbol Condition Min. Max. VIH1 — 0.8VDD VDD V "L" Input Voltage VIL1 — 0 0.2VDD V "H" Input Voltage VIH2 — 0.7VDD VDD V "L" Input Voltage VIL2 0 0.3VDD "H" Input Current IIH1 VI=VDD — 1 "L" Input Current IIL1 VI=0V — –1 mA CLOCK, LOAD 3/4SEL mA "H" Input Current IIH2 VI=VDD — 10 mA "L" Input Current IIL2 VI=0V — –10 mA "L" Input Current IIL3 VDD=5.0V, VI=0V –0.07 –0.36 mA C0-C5 "L" Input Current IIL4 VDD=5.0V, VI=0V –0.009 –0.045 mA RESET VOS0 IO=–10mA VDD–0.8 — V SEG1-SEG29 VOS1 IO=±10mA 2/3VDD–0.8 2/3VDD+0.8 V VOS2 IO=±10mA 1/3VDD–0.8 1/3VDD+0.8 V VOS3 IO=10mA — 0.8 V VOC0 IO=–10mA VDD–0.77 — V VOC1 IO=±10mA 2/3VDD–0.77 2/3VDD+0.77 V VOC2 IO=±10mA 1/3VDD–0.77 1/3VDD+0.77 V VOC3 IO=10mA — 0.77 V VOH1 IO=–15mA VDD–1.5 — V "L" Output Voltage VOL1 IO=0.1mA — 0.4 V "H" Output Voltage VOH2 IO=–0.4mA VDD–0.4 — V "L" Output Voltage VOL2 IO=0.4mA — 0.4 V DATA I/O INT "H" Output Voltage VOH3 IO=–50mA 2.5 — V R0-R4 "L" Output Voltage VOL3 IO=1.0mA — 0.4 V Supply Current IDD *2 — 0.4 mA "H" Input Voltage Segment Output Voltage Common Output Voltage "H" Output Voltage — Unit Applied Pin *1 C0-C5 V DATA I/O COM1-COM4 LED VDD *1 CLOCK, LOAD, DATA I/O, RESET and 3/4SEL *2 CO = 0.022 mF, RO = 33 kW, no load 5/17 FEDL6786-03 ¡ Semiconductor MSM6786 Switching Characteristics (VDD=5V±10%, Ta=–40 to +85°C) Parameter Symbol Condition Min. Max. Unit fCP — — 2.0 MHz Clock Pulse Width tWCP — 200 — ns Rise/Fall Time tr,tf — — 50 ns Clock Frequency Data Setup Time tDSU — 100 — ns Data Hold Time tDHD — 100 — ns Load Pulse Width tWLD — 200 — ns ClockÆLoad Time tCL — 100 — ns LoadÆClock Time tLC — 200 — ns Output Delay Time 1 tPD1 CL=50pF — 300 ns Output Delay Time 2 tPD2 — — 300 ns tWCP tr 0.8VDD CLOCK tWCP tf 0.8VDD 0.2VDD 0.2VDD 1/fCP tDSU tDHD DATA I/O 0.8VDD 0.2VDD (During input mode) tWLD tCL 0.8VDD LOAD tLC 0.2VDD tPD1 tPD1 0.8VDD DATA I/O (When changing from input mode to output mode) HiZ 0.2VDD tPD2 DATA I/O (When changing from output mode to input mode) HiZ (The charging and discharging time during high impedance depends on trace resistance and stray capacitance.) 6/17 FEDL6786-03 ¡ Semiconductor MSM6786 FUNCTIONAL DESCRIPTION Pin Functional Description OSC (Pin 50) This is an input/output pin for the oscillator to generate LCD AC lighting and keyscan pulses. Connect an external capacitor and resistor as shown below to form an RC oscillation circuit. The relationship between frame frequency fFRM, keyscan period TSCN and oscillation frequency fOSC is: fFRM = fOSC/24, TSCN = 20/fOSC VDD RO OSC CO DATA I/O (Pin 44) This is a serial data input/output pin. The pin is in output state from the first shift clock rise after key data output command writing, to the load pulse rise, and in input state otherwise. (The pin is in input state during reset.) The relationship between the data levels of this pin and the operations is shown below. Level Display Key Status "H" ON ON (close) "L" OFF OFF (open) CLOCK (Pin 43) This is an input pin for the shift clock. DATA I/O pin data is either input or output in synchroniza-tion with each rising clock edge. LOAD (Pin 42) This is a load pulse input pin used to transfer serial input data to a latch for display, to write commands, or to release the DATA I/O pin in output state. 7/17 FEDL6786-03 ¡ Semiconductor MSM6786 R0 – R4 (Pin 37-Pin 41) These are key switch scan pulse output pins. During the scan operating, "L" level is output in sequence. All pluses go to "L" level when scanning stops. C0 – C5 (Pin 31-Pin 36) These are input pins that detect the key status. These pins have pull-up resistors. Key matrices are formed with pins R0 – R4. C0 C1 C2 C3 C4 C5 R0 R1 R2 R3 R4 INT (Pin 45) This is the keyscan end signal output pin. This pin becomes "H" when one scan cycle is completed, and returns to "L" by a load pulse after data output or when the "Scan Stop" command is written. (The pin is in "L" status during reset.) If this pin is not used, leave it unconnected. 8/17 FEDL6786-03 ¡ Semiconductor MSM6786 RESET (Pin 46) This is a reset signal input pin that intializes the IC, and is activated at "L" level. This pin has an internal pull-up resistor. The power ON reset usually operates by externally connecting a capacitor. VDD CRST RESET SEG1 – SEG29 (Pin 1-Pin 20, Pin 22-Pin 30) These are the output pins for LCD, and are connected to the segment pins of the LCD panel. See the section on data configuration for the relationship between SEG output and input data. COM1 – COM4 (Pin 56-Pin53) These are output pins for the LCD, and are connected to common pins of the LCD panel. When 1/3 duty is selected, COM4 pin should be left unconnected. See the section on data configuration of common output and input data. LED (Pin 47) This is an output pin for the LED drive. The LED and current limiting resistor are externally connected. LED 3/4SEL (Pin 48) This is a duty select input pin. When "H" level is input, 1/3 duty is selected and when "L" level is input, 1/4 duty is selected. TEST (Pin 52) This is an input pin for IC testing. This pin should be connected to VSS. VDD, VSS (Pin 21, 49, 51) These are power voltage supply and ground pins. 9/17 FEDL6786-03 ¡ Semiconductor MSM6786 Operating Description Display data input As shown in the section on data configuration, the data for display consists of data fields that correspond to segment ON/OFF and command fields which indicate display data input. Set the bits C0 to C1 of the command field to "0" or "1" according to the common to which the display data corresponds. To the other four bits, set the display data input commands. LED display data corresponds to common 1. Data input to the DATA I/O pin is saved in a shift register at the rising edge of the CLOCK pulse, and is transferred to a data latch for display while the LOAD pulse is at "H" level, and is then output through a segment driver. CLOCK DATAI/O D1 D2 D3 D4 D28 D29 D30 C0 C1 C2 C3 C4 C5 LOAD Old Data Display Output New Data Key data output The state of a key switch is indicated by ON = 1, OFF = 0, and is read as 30 bits serial data. (For information on the sequence, see the section on data configuration.) To output data, the output command must be written, which causes the data to be output in synchronization with the rising edge of the CLOCK pulse. By inputting a LOAD pulse after that, the DATA I/O pin returns to the input state, and the next data or command can be input. (If a LOAD pulse is applied earlier than the 30th data, the key data is output only by the number of the CLOCK pulse. If CLOCK pulses more than 30 data bits are applied, 30 data bits of key data are circulated.) CLOCK DATAI/O C3 C4 C5 O1 O2 O3 O29 O30 LOAD Output Command Write Key Data Read Next Command Input Note1 : The last key data must be read before the LOAD pulse rises. Note2 : Upon swiching from output mode to input mode, the state of the DATA I/O pin is unstable for the duration of 300 ns after the rising of LOAD pulse. For this reason, never input data to the DATA I/O pin during this period. 10/17 FEDL6786-03 ¡ Semiconductor MSM6786 Keyscan Keyscan starts when the key state is changed or when the "Keyscan Start" command is written. Scan continues until the "Keyscan Stop" command is written. (When powered on, the powerON reset sets at scan stop state.) When 1 keyscan cycle (TSCN) ends, the INT signal becomes "H", so this signal can be used as an interrupt flag, which is dependent on switching conditions of keys. The INT signal is reset when either the LOAD pulse is input after key data is output, when the "Keyscan Stop" command is set, or when a reset signal is applied. TSCN R0 R1 R2 R3 R4 INT Scan Start Command Write Data Read or Key Status Changed Data Read Data Read Scan Stop Command Write Notes : 1. A recognition error may occur if 3 or more key switches are pressed at the same time. (A switch that was not pressed is recognized as being pressed.) To properly recognize 3 or more key switches as being pressed at the same time, serially insert diodes at each switch. In order not to recognize 3 or more key switches as being pressed at the same time, a possible approach is to program the software so that the read data will be ignored when there are 3 or more ones in the data. The device recognizes simultaneous pressing of 2 key switches. However, take Note 2 into consideration. 2. A change of key state is detected as a change in column input (C0 - C5). Therefore even if multiple switches connected to the same column are pressed at the same time, nothing will be detected as a change. 11/17 FEDL6786-03 ¡ Semiconductor MSM6786 Display on, Display off In power ON reset state, display will go out. To turn the display on, write the display ON command. The display and LED can go out by writing the display OFF command, irrespective of display data. Display ON command releases the display OFF state. By writing this command, display will return to original state. CLOCK DATAI/O D1 D2 C4 C5 C2 C3 C4 C5 C2 C3 C4 C5 LOAD Display On/Off RESET Display On Command Write Display Data Input Display Off Command Write Command List Command Name C5 C4 C3 C2 C1 C0 F1 0 0 1 0 0 Operation 0 Display Data Input (Corresponding to Common 1) 1 Display Data Input (Corresponding to Common 2) 1 0 Display Data Input (Corresponding to Common 3) 1 Display Data Input (Corresponding to Common 4) ¥ Key Data Output F2 0 1 0 ¥ ¥ F3 0 1 1 0 0 1 0 Display Data Input (1) + Key Data Output 1 Display Data Input (2) + Key Data Output 0 Display Data Input (3) + Key Data Output 1 Display Data Input (4) + Key Data Output 0 ¥ ¥ Display Off 1 1 ¥ ¥ Display On 0 ¥ ¥ ¥ Key Scan Stop + Key Data Output 0 0 ¥ ¥ ¥ Key Scan Stop 1 1 ¥ ¥ ¥ Key Scan Start + Key Data Output F4 1 0 1 F5 1 0 F6 1 1 F7 1 F8 1 ¥ : Don't care 12/17 FEDL6786-03 ¡ Semiconductor MSM6786 Data Configuration (Input data) First Bit Corresponds to SEG29 Corresponds to SEG1 C5 C4 C3 C2 C1 C0 D30 Command D29 D28 D3 D2 D1 LCD Display Data LED Display Data Notes : 1. LED data corresponds to common 1 side (C0, C1 = 0). 2. D1 bit is unnecessary when LED output is not used. 3. Data output commands F2, F6 – F8 become effective if at least 3 bits (C3 – C5) are input. (D1 – D30 and C0 – C2 bits are not necessary.) Command F4 and command F5 become effective if at least 4 bits (C2 - C5) are input. (D1 - D30, C0 and C1 bits are not necessary.) 4 . If dummy bits are necessary, add them before first bit. (Output data) Last Bit First Bit 30 1 R4 R3 R2 R1 R0 C5 C4 C3 C2 C1 C0 C5 C4 C3 C2 C1 C0 C5 C4 C3 C2 C1 C0 C5 C4 C3 C2 C1 C0 C5 C4 C3 C2 C1 C0 13/17 FEDL6786-03 ¡ Semiconductor MSM6786 APPLICATION CIRCUIT COM1 COM2 1/4 duty LCD Panel COM3 COM4 SEG1 SEG29 SEG1 SEG29 COM1 COM2 COM3 COM4 LOAD DATAI/O CPU CLOCK INT MSM6786 LED VDD OSC 3/4SEL VSS RESET TEST C0 C1 C2 C3 C4 C5 +5V R0 R1 R2 R3 R4 5¥6 Key Matrix 14/17 FEDL6786-03 ¡ Semiconductor MSM6786 REFERENCE DATA fFRM vs. RO, CO Ta = 25 [°C] VDD= 5.0 [V] Frame Frequency fFRM [Hz] 1000 400 300 200 CO = 0.01µF 100 70 50 CO = 0.022µF 30 20 CO = 0.033µF 10 1 20 40 60 80 91 100 Resistance RO [kW] Frame frequency Characteristics The scanning period TSCN is defined by the following equation: TSCN = = 5 [ms] 6fFRM 20 fOSC [ms] 15/17 FEDL6786-03 ¡ Semiconductor MSM6786 PACKAGE DIMENSIONS (Unit : mm) QFP56-P-910-0.65-2K . Mirror finish Oki Electric Industry Co., Ltd. Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised Epoxy resin 42 alloy Solder plating (≥5 mm) 0.43 TYP. 4/Nov. 28, 1996 Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 16/17 FEDL6786-03 ¡ Semiconductor MSM6786 NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party’s right which may result from the use thereof. 6. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. No part of the contents contained herein may be reprinted or reproduced without our prior permission. 9. MS-DOS is a registered trademark of Microsoft Corporation. Copyright 2000 Oki Electric Industry Co., Ltd. Printed in Japan 17/17