PM4351 COMET Combined E1/T1/J1 Transceiver/Framer RECEIVE • Provides single-rail digital PCM and signaling outputs for 1.544 Mbit/s, 2.048 Mbit/s, 4.096 Mbit/s, or 8.192 Mbit/s backplane buses. • Guaranteed signal recovery of up to -36 dB at 1024 kHz (E1) and 772 kHz (T1/J1) under production test conditions (VDD = 3.069 V, 25 °C) using PIC-22 gauge cable emulation. • Frames to a G.704 E1 signal. • Frames to a JT-G704 J1 signal. • Frames to a DSX/DS-1 signal in D4, SF, ESF, or SLC96 formats. • Accommodates up to 0.4 UI peak-topeak, high frequency jitter as required by AT&T TR 62411. • Supports line and path performance monitoring to AT&T and ANSI specifications and ITU-T recommendations. • Detects both programmable in-band loopback activate and deactivate code sequences received in the DS1/E1 data stream. • Supports transfer of transmitted PCM and signaling data from 1.544 Mbit/s, 2.048 Mbit/s, 4.096 Mbit/s, or 8.192 Mbit/s backplane buses. • Supports tristate line outputs. • Generates DSX-1 T1 shorthaul- and T1 longhaul-compatible pulses with programmable pulse shape to AT&T and ANSI specifications and ITU-T recommendations. • Generates G.703 E1 pulses. • Detects violations of the ANSI T1.403 12.5% pulse density rule over a moving 192-bit window. • Allows insertion of in-band loopback code sequences. • Supports transmission of the Alarm Indication Signal (AIS) or the yellow alarm signal in all formats. • Provides a FIFO for jitter attenuation in the transmit path. • Complies to all jitter attenuation, jitter transfer and residual jitter specifications required by AT&T TR 62411 and ETSI TBR12/13. CSB ALE RSTB INTB TDO TDI TCK TMS JTAG Test Access Port PMC-1961230 (R3) RDAT RCLKI RXRING RXTIP RVREF TCLKI XCLK /VCLK TCLKO TVREF TXRING[1:0] TJAT Transmit Digital Jitter Attenuator T1-XBAS/ E1-TRAN Basic Transmitter: Frame Generation, Alarm Insertion, XBOC Bit-Oriented Signaling Insertion, Trunk Conditioning Code Generator TDPR #3 HDLC Transmitter TDPR #2 HDLC Transmitter TDPR #1 HDLC Transmitter CSD Clock Synthesis and Distribution CDRC Clock and Data Recovery TOPS Timing Options IBCD PMON In-band Performance Loopback Monitor Code Counters Detector FRMR ALMI Frame Alarm Alignment, Integrator Alarm Extraction RJAT Receive Digital Jitter Attenuator FRAM Framing RAM TX-ELST Elastic Store BTIF Backplane Transmit Interface IBCD In-Band Loopback Code Detector FRMR Frame Alignment, Alarm Extraction PMON Performance Monitor Counters PDVD Pulse Density Violation Detector ALMI Alarm Integrator BRIF Bit-Oriented Code Detector RDLC #3 HDLC Receiver RDLC #2 HDLC Receiver RDLC #1 HDLC Receiver RX-ELST Elastic Store PRGD RPSC BRIF E1/T1½ Pattern Per-DS0 Backplane SIGX Generator/ Serial Receive Signalling Detector Controller Interface Extractor BTPCM BTSIG BTFP BTCLK TRSTB MPIF Microprocessor Interface RLPS Receive LIU XLPG Transmit LIU PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE BRCLK BRFP BRPCM BRSIG D[7:0] A[8:0] RDB WRB TXTIP[1:0] TDAT BLOCK DIAGRAM TFP • Monolithic 3.3 V device that integrates an E1/T1/J1 Framer and line driver for shorthaul and longhaul applications. • Software selectable between T1/J1 and E1 operation on a per device basis. • Provides fully programmable shorthaul and longhaul pulse templates and line build out. • Meets or exceeds T1, J1, and E1 shorthaul and longhaul network access specifications, which include: ANSI T1.102, T1.403, T1.408, AT&T TR 62411, ITU-T G.703 and G.823, as well as the newer G.775 and ETSI 300-011 specifications. • Supports B8ZS, HDB3, and AMI line codes. • Provides receive clock recovery and line performance monitoring. • Provides on-board binary sequence generators and detectors that can be configured with various patterns for error testing, including those conforming to ITU-T 0.151. • Provides transmit and receive jitter attenuation. • Provides three full-featured HDLC controllers, each with 128-byte transmit and receive FIFOs, enabling dual compliance to the V5.1 and V5.2 interface standards. • Supports an IEEE P1149.1 JTAG test port. • Automatically generates DS1 performance report messages to ANSI T1.231 and other specifications. • Compatible with Mitel ST-bus, AT&T CHI, and MVIP PCM backplanes supporting rates of 1.544 Mbit/s, 2.048 Mbit/s, 4.096 Mbit/s and 8.192 Mbit/s. • Provides an 8-bit microprocessor bus interface for configuration, control, and status monitoring. • Low power +3.3 V CMOS technology. • Available in an 80-pin PQFP (14 mm by 14 mm) and an 81-pin CABGA (9 mm by 9 mm) package. • Provides a -40 °C to +85 °C industrial temperature operating range. TRANSMIT RSYNC FEATURES © Copyright PMC-Sierra, Inc. 2001 PM4351 COMET Combined E1/T1/J1 Transceiver/Framer APPLICATIONS • Wireless Base Transceiver Station and Digital LoopCarriers (DLCs). • BITS Timing Systems. • Integrated Access Device (IAD). • Channel and Data Service Units (CSU/DSU). • Enterprise Routers. • V5.1/V5.2 Interfaces. TYPICAL APPLICATIONS WIRELESS BASE TRANSCEIVER STATION (BTS) ATM UNI & AAL2 Processing PM4351 COMET E1 or T1 PM7815 PALADIN-15 Modem RF INTEGRATED ACCESS DEVICE (IAD) Ethernet (Data) 10 Base T PHY CrossConnect and Interworking E1 or T1 (Voice) T1 PM4351 COMET ATM or Packet PM4351 COMET BITS TIMING APPLICATION T1 BITS Timing Signal A T1 BITS Timing Signal B PM4351 COMET PLL Recovered Timing PM4351 COMET Timing Selector Head Office: PMC-Sierra, Inc. 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: 604.415.6000 Fax: 604.415.6200 To order documentation, send email to: [email protected] or contact the head office, Attn: Document Coordinator All product documentation is available on our web site at: http://www.pmc-sierra.com For corporate information, send email to: [email protected] PMC-1961230 (R3) © Copyright PMC-Sierra, Inc. 2001. All rights reserved. July 2001. SLC®96, ST, and CHI are registered trademarks of AT&T. COMET, PALADIN-15, and PMC-Sierra are trademarks of PMC-Sierra, Inc. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE