SN54ABTE16245, SN74ABTE16245 16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS226J – JULY 1993 – REVISED DECEMBER 2001 D D D D D D D D D Members of the Texas Instruments Widebus Family Support the VME64 ETL Specification Reduced, TTL-Compatible, Input Threshold Range High-Drive Outputs (IOH = –60 mA, IOL = 90 mA) Support 25-Ω Incident-Wave Switching VCCBIAS Pin Minimizes Signal Distortion During Live Insertion Internal Pullup Resistor on OE Keeps Outputs in High-Impedance State During Power Up or Power Down Distributed VCC and GND Pins Minimize High-Speed Switching Noise Equivalent 25-Ω Series Damping Resistor on B Port Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors SN54ABTE16245 . . . WD PACKAGE SN74ABTE16245 . . . DGG OR DL PACKAGE (TOP VIEW) 1DIR 1B1 2B1 GND 1B2 2B2 VCC 1B3 2B3 GND 1B4 2B4 1B5 2B5 GND 1B6 2B6 VCC 1B7 2B7 GND 1B8 2B8 2DIR description 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 19 30 20 29 21 28 VCCBIAS 1A1 2A1 GND 1A2 2A2 VCC 1A3 2A3 GND 1A4 2A4 1A5 2A5 GND 1A6 2A6 VCC 1A7 2A7 GND 1A8 2A8 OE The ’ABTE16245 devices are 16-bit (dual-octal) 22 27 noninverting 3-state transceivers designed for 23 26 synchronous two-way communication between 24 25 data buses. The control-function implementation minimizes external timing requirements. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. When OE is low, the device is active. The B port has an equivalent 25-Ω series output resistor to reduce ringing. Active bus-hold inputs also are on the B port to hold unused or floating inputs at a valid logic level. The A port provides for the precharging of the outputs via VCCBIAS, which establishes a voltage between 1.3 V and 1.7 V when VCC is not connected. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. Copyright 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ABTE16245, SN74ABTE16245 16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS226J – JULY 1993 – REVISED DECEMBER 2001 ORDERING INFORMATION –40°C to 85°C ORDERABLE PART NUMBER PACKAGE† TA SSOP – DL TSSOP – DGG Tube SN74ABTE16245DL Tape and reel SN74ABTE16245DLR Tape and reel SN74ABTE16245DGGR TOP-SIDE MARKING ABTE16245 ABTE16245 –55°C to 125°C CFP – WD Tube SNJ54ABTE16245WD SNJ54ABTE16245WD † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each 8-bit section) INPUTS DIR OE OPERATION L L A data to B bus L H B data to A bus H X Isolation logic diagram (positive logic) 1DIR OE 1B1 1 2DIR 24 25 2 2B1 47 3 46 1A1 To Seven Other Channels 2A1 To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC and VCCBIAS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Voltage range applied to any output in the high state or power-off state, VO . . . . . . . . . . . . . . –0.5 V to 5.5 V Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Package thermal impedance, θJA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ABTE16245, SN74ABTE16245 16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS226J – JULY 1993 – REVISED DECEMBER 2001 recommended operating conditions (see Note 3) VCC, VCCBIAS Supply voltage VIH High level input voltage High-level VIL Low level input voltage Low-level VI Input voltage IOH High level output current High-level IOL Low level output current Low-level ∆t/∆v Input transition rise or fall rate OE Except OE SN54ABTE16245 SN74ABTE16245 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 2 2 1.6 1.6 0.8 0.8 Except OE 1.4 1.4 0 V V OE 0 UNIT B bus VCC –12 VCC –12 A bus –24 –60 B bus 12 12 A bus 64 90 Outputs enabled 10 10 V V mA mA ns/V TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54ABTE16245, SN74ABTE16245 16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS226J – JULY 1993 – REVISED DECEMBER 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK B port VOH VCC = 4.5 V, VCC = 5.5 V, II = –18 mA IOH = –100 µA 5V VCC = 4 4.5 IOH = –1 mA IOH = –12 mA VCC = 5.5 V, A port VCC = 4 4.5 5V B port 5V VCC = 4 4.5 A port VCC = 4 4.5 5V II IOZH‡ IOZL‡ IO B port Control inputs A or B ports A port A port A port B port Ioff ICC A or B ports ICCD A or B ports Ci Control inputs Cio I/O ports MIN 2 4.5 2.4 VCC = 5 5.5 5V V, VI = VCC or GND VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.5 V 5V VCC = 5 5.5 V, 0.4 0.8 0.55 0.55 V 0.9 100 100 –100 –100 µA ±500 ±500 ±1 ±1 ±20 ±20 10 10 µA –10 µA –10 VCC = 0, VI or VO ≤ 4.5 V, VCCBIAS = 0 Outputs high VCC = 5.5 5 5 V, V IO = 0 0, Outputs low VI = VCC or GND Outputs disabled –50 –120 –180 –50 –180 –25 –52 –90 –25 –90 ±100 ±100 28 36 28 36 38 48 38 48 20 32 20 32 OE high 0.02 0.02 OE low 0.33 0.33 VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V POST OFFICE BOX 655303 V 2.4 † All typical values are at VCC = 5 V, TA = 25°C. ‡ The parameters IOZH and IOZL include the input leakage current. 4 V 2 5V VO = 2 2.5 VCC = 5 V,, CL = 50 pF 4.5 0.4 IOL = 90 mA VI = 0.8 V VCC = 5.5 V, –1.2 VCC–0.2 2 IOL = 12 mA IOL = 64 mA VI = 2 V VI = 0 to 5.5 V –1.2 UNIT 2.4 IOH = –64 mA IOL = 1 mA VCC = 4 4.5 5V SN74ABTE16245 TYP† MAX MIN VCC–0.2 2.4 IOH = –1 mA IOH = –32 mA VOL II(hold) ( ) SN54ABTE16245 TYP† MAX TEST CONDITIONS • DALLAS, TEXAS 75265 µA mA µA mA mA/ MHz 10 2.5 4 pF 13 4.5 8 pF SN54ABTE16245, SN74ABTE16245 16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS226J – JULY 1993 – REVISED DECEMBER 2001 live-insertion specifications over recommended operating free-air temperature range PARAMETER ICC (VCCBIAS) SN54ABTE16245 TYP† MAX TEST CONDITIONS SN74ABTE16245 TYP† MAX MIN VCC = 0 to 4.5 V, VCCBIAS = 4.5 V to 5.5 V, IO(DC) = 0 VCC = 4.5 V to 5.5 V‡, VCCBIAS = 4.5 V to 5.5 V, IO(DC) = 0 VO A port VCC = 0 VCCBIAS = 4.5 V to 5.5 V VCCBIAS = 4.75 V to 5.25 V IO A port VCC = 0 0, VCCBIAS = 4 4.5 5V 250 MIN 700 250 UNIT 700 µA 20 VO = 0 VO = 3 V 20 1.1 1.5 1.9 1.1 1.5 1.9 1.3 1.5 1.7 1.3 1.5 1.7 –20 –100 –20 –100 µA 20 100 20 100 µA V † All typical values are at VCC = 5 V, TA = 25°C. ‡ VCC – 0.5 V < VCCBIAS switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 2) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER VCC = 5 V, TA = 25°C SN54ABTE16245 SN74ABTE16245 MIN TYP MAX MIN MAX MIN MAX 1.5 3.3 4.2 1.5 5.4 1.5 5.2 1.5 3.8 4.6 1.5 5.4 1.5 5.2 1.5 3 3.8 1.5 4.7 1.5 4.5 1.5 3.1 4 1.5 4.7 1.5 4.5 2 3.9 5.3 2 6.4 2 6.2 2 4.4 5.9 2 7 2 6.8 2 4.5 6 2 7.3 2 7.1 2 5 6.4 2 7.5 2 7.3 2 4.9 5.9 2 7 2 6.7 2 3.7 4.6 2 5.4 2 5.1 2 5.2 6.2 2 7.2 2 7 2 4 5 2 5.8 2 5.5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT ns ns ns ns ns ns 5 SN54ABTE16245, SN74ABTE16245 16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS226J – JULY 1993 – REVISED DECEMBER 2001 extended switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 2) PARAMETER tPLH FROM (INPUT) TO (OUTPUT) LOAD B A RX = 13 Ω B A RX = 26 Ω B A RX = 56 Ω B A A B B tsk(o) tt† tt‡ UNIT MAX MIN MAX MIN MAX 1.5 3.2 4 1.5 5 1.5 4.8 1.5 3.8 4.7 1.5 5.8 1.5 5.6 1.5 3.1 4 1.5 4.8 1.5 4.6 1.5 3.5 4.4 1.5 5.2 1.5 4.9 1.5 3 3.8 1.5 4.7 1.5 4.5 1.5 3.3 4.2 1.5 5.1 1.5 4.7 RX = Open 0.1 0.6 2 2 RX = Open 0.4 0.8 2 2 A RX = 26 Ω 0.3 0.8 2 2 B A RX = Open 0.3 0.7 1.3 1.3 A B RX = Open 0.7 1.1 1.3 1.3 B A RX = 26 Ω 0.5 1 B A RX = 26 Ω 0.5 0.8 1.5 0.5 1.5 0.5 1.5 ns A B RX = Open 3.5 5.5 7.3 3.5 8.1 3.5 7.9 ns tPHL tsk( sk(p)) SN74ABTE16245 TYP tPHL tPLH SN54ABTE16245 MIN tPHL tPLH VCC = 5 V, TA = 25°C 1.3 ns ns ns ns ns 1.3 † tt is measured between 1 V and 2 V of the output waveform. ‡ tt is measured between 10% and 90% of the output waveform. extended output characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (see Figures 1 and 2) PARAMETER tsk(temp) k(t ) tsk(load) 6 FROM (INPUT) TO (OUTPUT) A B B A B B SN54ABTE16245 SN74ABTE16245 TEST CONDITIONS LOAD VCC = constant,, ∆TA = 20°C 3 2.5 RX = 56 Ω 4.5 4 VCC = constant, Temperature = constant RX = 13, 26, or 56 Ω 4.5 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN MAX MIN MAX UNIT ns ns SN54ABTE16245, SN74ABTE16245 16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS226J – JULY 1993 – REVISED DECEMBER 2001 PARAMETER MEASUREMENT INFORMATION Device 1 A Y1 A B Y2 Yn Device 1 – Y1 tPLH1 tPHL1 tsk(o) tsk(load) In Device n Device 1 – Yn tsk(temp) Y1 tPLH2 Device n – Yn B Y2 Yn NOTES: A. Pulse skew, tsk(p), is defined as the difference in propagation-delay times tPLH1 and tPHL1 on the same terminal at identical operating conditions. B. Output skew, tsk(o), is defined as the difference in propagation delay of any two outputs of the same device switching in the same direction (e.g., |tPLH1 – tPLH2|). C. Temperature skew, tsk(temp), is the output skew of two devices, both having the same value of VCC ± 1% and with package temperature differences of 20°C. D. Load skew, tsk(load), is measured with RX in Figure 2 at 13 W for one unit and 56 W for the other unit. Figure 1. Voltage Waveforms for Extended Characteristics POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN54ABTE16245, SN74ABTE16245 16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS226J – JULY 1993 – REVISED DECEMBER 2001 PARAMETER MEASUREMENT INFORMATION 7V S2 500 Ω 3.65 V 94 Ω S1 RX† From Output Under Test CL = 50 pF (see Note A) SWITCHING TABLE LOADS tPLH/tPHL (A and B port) tPLZ/tPZL tPHZ/tPZH Open 500 Ω 2 nF EXTENDED SWITCHING TABLE LOADS tPLH/tPHL/tsk (A port) tPLH/tPHL/tsk (B port) tt (A port) (see Note E) tt (B port) (see Note F) S1 S2 Up Up Up Open 7V Open S1 S2 Down Up Down Up X Open X Open † RX = 13, 26, or 56 Ω 3V Output Control (low-level enabling) LOAD CIRCUIT FOR OUTPUTS 1.5 V 0V tPZL 3V Input 1.5 V 1.5 V 0V tPLH VOH Output Output Waveform 1 S2 at 7 V (see Note B) 1.5 V 1.5 V VOL tPLZ 3.5 V 1.5 V tPZH tPHL Output Waveform 2 S2 at Open (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.5 V VOL + 0.3 V VOL tPHZ 1.5 V VOH VOH – 0.3 V ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. tt is measured between 1 V and 2 V of the output waveform. F. tt is measured between 10% and 90% of the output waveform.Figure 1 Figure 2. Load Circuit and Voltage Waveforms 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 18-Jul-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty 1 5962-9677501QXA ACTIVE CFP WD 48 ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74ABTE16245DLRG4 ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABTE16245DGGR ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABTE16245DL ACTIVE SSOP DL 48 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABTE16245DLG4 ACTIVE SSOP DL 48 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABTE16245DLR ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SNJ54ABTE16245WD ACTIVE CFP WD 48 TBD A42 SNPB MSL Peak Temp (3) 74ABTE16245DGGRE4 1 TBD Lead/Ball Finish A42 SNPB N / A for Pkg Type N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 MECHANICAL DATA MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997 WD (R-GDFP-F**) CERAMIC DUAL FLATPACK 48 LEADS SHOWN 0.120 (3,05) 0.075 (1,91) 0.009 (0,23) 0.004 (0,10) 1.130 (28,70) 0.870 (22,10) 0.370 (9,40) 0.250 (6,35) 0.390 (9,91) 0.370 (9,40) 0.370 (9,40) 0.250 (6,35) 48 1 0.025 (0,635) A 0.014 (0,36) 0.008 (0,20) 25 24 NO. OF LEADS** 48 56 A MAX 0.640 (16,26) 0.740 (18,80) A MIN 0.610 (15,49) 0.710 (18,03) 4040176 / D 10/97 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification only Falls within MIL STD 1835: GDFP1-F48 and JEDEC MO -146AA GDFP1-F56 and JEDEC MO -146AB POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001 DL (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0.025 (0,635) 0.0135 (0,343) 0.008 (0,203) 48 0.005 (0,13) M 25 0.010 (0,25) 0.005 (0,13) 0.299 (7,59) 0.291 (7,39) 0.420 (10,67) 0.395 (10,03) Gage Plane 0.010 (0,25) 1 0°–ā8° 24 0.040 (1,02) A 0.020 (0,51) Seating Plane 0.110 (2,79) MAX 0.004 (0,10) 0.008 (0,20) MIN PINS ** 28 48 56 A MAX 0.380 (9,65) 0.630 (16,00) 0.730 (18,54) A MIN 0.370 (9,40) 0.620 (15,75) 0.720 (18,29) DIM 4040048 / E 12/01 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). Falls within JEDEC MO-118 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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