LZ2346 Twopower supply (+5 V and +12 V) operation CCIR 1/3 type B/W CCD Area Sensor for CCIR LZ2346 PIN CONNECTIONS DESCRIPTION LZ2346 is 1 /3-type (6.0 mm) solid-state image sensor that consists of PN phote-diodes and CCDS (charge-coupled devices) driven by only positive voltages. Having approximately 220000 pixels (horizontal 384 X vertical 582), the sensor provides a stable B/W image. 16-PIN SDIP ~m 1 RD ● ● ● ● ● ● Pixel pitch : 13.6 Mm (H) x 6.3 Km (V) Number of optical black pixels : Horizontal; front 2 and rear 20 Low fixed pattern noise and lag No sticking and no image distortion Blooming suppression structure Built-in output amplifier Variable electronic shutter (1/50 to 1/10 000 s) Compatible with CCIR standard Package : 16-pin SDIPICERDIP](WDIPO1 6-N-0500B) 3 0s 4 I I I 1 I ! OD 5 I 1 4 4TG H2 B 6 1 3 4V2 I I I 1 I I 1 , I 4 1 2 4V1 1 1 4V4 , .—. ——— —— ..__ : 10 7 dH2 dHIB ! 15 OFD 2 GND ● Number of pixels : 362 (H) X 582 (V) VIEW 1 6 TI ,—— ———. —— —-— . FEATURES ● TOP 9 8 i — 4V3 tiH1 BLOCK DIAGRAM I I TI OFD GND 0s t O D R D 4175 4 4TG Horizontal Shift Register 4H1 4.2 6H16 6H2B “IO abwnca of confimtlm by device ~!ticatron shseb, WAR? tikaa rM msib!lm ti any dafecta Mat wcur in qu!mnt using any oi SHARPS dewcea, shm !n cshlcgs, 1741 data Wks, etc Untact SHARP order to obb+n me Iataat WM oi M deviw ~Ifimtion &b teti u~ng any SHARPS device” tie In LZ2346 PIN DESCRIPTION PIN NAME SYMBOL RD Reset transistor drain OD Output transistor drain I 0s ! dRs I Video OUtDUt I Reset transistor gate clock I I dVi, $V2rdV3, dV4 Vertical shift register gate clock 4HI,4H2,4H16,4H2B Horizontal shift register gate clock d TG Transfer gate clock I OFD I Overflow drain TI Test terminal GND Ground ABSOLUTE MAXIMUM RATINGS PARAMETER (Ta =25°C) SYMBOL RATING UNIT VOD Oto + 1 5 v Reset transistor drain voltage vRD Oto + 1 5 v Test terminal, T I VTI Oto + 1 5 v vdRs –0.3 to +15 v Vdv –0.3 to +15 v OutDut transistor drain VOltage Reset gate clock voltage Vertical shift register clock voltage V+t. –0.3 to +15 v Transfer gate clock voltage V+TG –0,3 to +15 v Overflow drain voltage vOFD O to +27 v Storage temperature Tstg – 4 0 t o +85 “c ODeratina ambient temperature Topr –20 to + 7 0 ‘c Horizontal shift register clock voltage 175 LZ2346 RECOMMENDED OPERATING CONDITIONS PARAM~ER Topr Output transistor drain voltage Voo Reset transistor drain voltage VRD Overflow When DC is applied drain voltage When pulse is applied p-p level Ground voltage V60m 12,0 Voo 0.0 HIGH level LOW level VdV1-4L HIGH level V4VI-4H Horizontal shift register clock LOW level VH! -2L, V 4 HI B-2BL Horizontal VdHI-ZH, VBd LOW level V4RSL HIGH level VdRSH shift register clock Horizontal shift register clock frequency fdH1-2, 12.0 – HI B-ZBH – phase twl , twz 1. When DC voltage is applied, shutter speed is 1 /50 seconds. ~ ‘H’” ~ ,, ,, ,, twl twz :: ‘“l’” UNIT 14.0 v 12,0 v 1 14.0 v 2 v v v 0.05 v 12.5 14,0 v 0.0 0,05 v 4.7 5.0 6.0 v 0.05 0,0 0.05 v 4.7 5.0 6.0 v v 0.0 VHD -10.5 V RD – 6.0 9,5 0.0 v 15.63 kHz 6,75 MHz 6.75 MHz 5,0 NOTE ‘c 0.05 f#HIB-2B 2. When pulse is applied, shutter spaed is less than 1/50 seconds. 176 0.0 f$m NOTES : “ – 0.05 fdvl-4 Reset gate clock frequency 12.5 VT1 Vertical shiti register clock V e r t i c a l shif-t r e g i s t e r c l o c k f r e q u e n c y 12.5 GND v $ TGL MAX. Voo v dTGH R e s e t g a t e clcck 3 12,0 3.0 LOW level HIGH level TYP. 25.0 VOFD Test terminal, T! Transfer gate clock MIN. SYMBOL Operating ambient temperature 10.0 ns 3 LZ2346 ELECTRICAL CHARACTERISTICS (Drive method : Field Accumulation) (Ta = 2SC, Operating conditions : typical values for the recommended operating conditions, Color temperature of light source :3200 K / IR cut-off filter (CM-500, 1 mmt)) PARAMHER Photo response non-uniformity Saturation signal SYMBOL MIN. TYP. PRNU vast MAX. UNIT 15 ~/0 2 mV 3 450 NOTE Dark output voltage Vdark 5.0 15.0 mV 1, 4 Dark signal non-uniformity DSNU 1.5 5.0 mV 1, 5 Sensitivity Smear ratio Image lag Blooming suppression ratio R 140 SMR 200 – 85 Al ABL 2.5 output impedance Ro 400 NOTES : 1 2 3 4 5 Ta : +WC The image area is divided mto 10X 10 segments. Tk ~ment’s voltage is the average output voltage of all the pixels within the segment. PRNU is defined by (Vmax – Vmin)/Vo, where Vmax and Vmin are the maximum and the minimum values of each segment’s voltage respectively, when the average output voltage Vo is 150 mV. The image area is divided into 10x 10 segments. The saturation signal is defined as the minimum of each segment’s voltage which is the average output voltage of all the pixels within the segment, when the exposure level is ~t as 10 times, compared to standard level. The average output voltage under a non-e-re @lticm. The image area is div!ded into 10x 10 segments. OSNU is defined by (Vdmax – Vdmin) under the non-exposure con- 6. 7, 8, 9 dB 7 1.0 % 8 9 IOD The standard output voltage is defined as 150 mV by the average output voltage under uniform illumination. ● The standard exposure level is defined when the average output voltage is 150 mV under uniform illumination. 6 – 76 1000 Output trasistor drain current ● mV 5.0 mA a dition where Vdmax and Vdmin are the maximum and M minimum values of each segment’s voltage, respective y, that is the average output voltage over al I pixels in the segment. The average output voltage when a 1 COO Iux light source attached with a 90% reflector is imaged by a lens of F4, f50 mm. The sensor is adjusted to position a V/l O square at the center of image area Mere V is the vetilcal length of the image area. SMR is defined by the ratio of the output voltage detected during the vertical blanking pericxl to the maximum of the pixel voltage in the V/l O square. The sensor is ex~d at the exmsure level corresWnding to the standard condition preceding ncm-exposure condition. Al is defined by the ratio between the output voltage measured at the 1st field during the non-exposure period and the standard output voltage. The sensor is adjusted to position a V/l O square at the center of image area. ABL is the ratio between the exDsure at the standard condition and the exposure at a mint where a blmming is observed. 177 gI < LZ2346 PIXEL STRUCTURE OPTICAL BIACK (2 PIXELS) 362 (H) X 582 (v) / OPTICAL BLACK (20 PIXELS) ~ SPECTRAL RESPONSE EXAMPLE 100 80 7 \ w > : 40 K 20 0 400 178 6~ 800 1 Ooil 1200 LZ2346 TIMING DIAGRAM EXAMPLE VERTICAL TRANSFER TIMING (Ist, 3rd FIELD) 19 5 623 625 1 HD n n n n n n n n n n n n n n n n n n n VD A I u u r u u u u u u u u u u u u u u H u u u u u I u u u u u u u u I d V2 u K u u u u u u u u u u u u u u u u u u u 4V1 d V3 d V4 dTG 0s J n n n n n n n 4V1 4 V2 d V3 n n n n n n n n n n n n n n n n J n n n n n n n n n n n n n n n n n n n ~ 582 WI n n n n n n n n n n 3 5 7 !+++ 2 4 6 8 I Juu (2nd. ., 4th HELD) HD VD n n 311 n n n n n J 331 318 n n n n n ,[ n n n n n n n n n n n u u u u u u u u u u u u u u u I u u u u u u u u u u u u u u u u u u u u u~Ll u u u u u ~~ n n n n n n n n n n n J n n n n n n n n n n n n n n n n 2 4 6 5:9 %+1 1 + 0s II w 582 + + ~ HORIZONTAL TRANSFER TIMING I dH1 dH2 d RS 0s 06(2) 1..0UPUT(362) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...362 OB(20) I 179 LZ2346 READOUT TIMING (1S, 3rd FIELD) (2nd, 180 SYSTEM CONFIGURATION EXAMPLE * — — 1 I dso *“ L ] mll II 181