ETC CXA1392R

CXA1392Q/R
Encoder for CCD Color Camera
Description
The CXA1392Q/R is a bipolar IC developed as an
encoder for CCD color cameras.
Color difference and luminance signals are input
to be output as composite video and Y/C separation
signals.
CXA1392R
48 pin LQFP (Plastic)
CXA1392Q
48 pin QFP (Plastic)
Features
• Carrier balance adjustment unnecessary
(Carrier leak above 36dB against burst)
• High S/N
• Low power consumption (140mW)
Absolute Maximum Ratings (Ta = 25°C)
• Supply voltage
Vcc
7
V
• Storage temperature
Tstg
–65 to +150 °C
• Allowable power dissipation
600
mW
PD
Appications
CCD camera
Structure
Bipolar silicon monolithic IC
Operating Conditions
• Supply voltage
• Ambient temperature
Vcc
Topr
4.75 to 5.25
–20 to +75
V
°C
SHP LEVEL
DLE
SHPCLP1
DLD
SHPCLP2
SHP OUT
Y LEVEL
FADER MODE
FADER SIG
SETUP LEVEL
SYNC LEVEL
SYNC
Block Diagram and Pin Configuration
36
35
34
33
32
31
30
29
28
27
26
25
YTBLK 37
24 WC LEVEL
LEVEL CONT
LEVEL CONT
NOISESLICE 38
23 SETUPCLP
1/2
LEVEL CONT
MAP GAIN SLICE
BLK
YHCLP 39
CLP4
BLK
REF V
22 YOUT
SYNC
C BLK
YTBLK
YHIN 40
LOGIC
ADD
ADD
CLP2 WC
SETUP SYNC
GC
21 VOUT
1.4 TYP
YL-YHCLP 41
20 CHROMA
CLP4
YL-YH IN 42
19 DGND
×1.6
CLP4
BURST
AGND 43
CLP4 44
MOD
BLK
3/2
18 CIN
17
CLP2
AVCC
2/3 TYP
CLP2 45
ADD
CLP4
BURST
B LEVEL 46
GC
16 COUT
MOD
BLK
3/2
ADD
CLP2
CLP4
15 CSY
LOGIC
B-Y IN 47
14 CSAGC
B. GEN
1/4
MODE GEN
B-Y CLP 48
13 MODE
1
2
3
4
5
6
7
8
9
10
11
12
R-Y IN
R-Y CLP
DVCC
4FSCIN
LALT
NC1
NC2
FSCOUT
BFG
BF
CBLK
CTBLK
BFG
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E89Z08B79-PS
CXA1392Q/R
Pin Description
Pin No.
Symbol
Description
Equivalent circuit
Pin voltage
AVCC
1k
2k
R-Y signal input pin.
Inputs through capacitor.
Clamped internally.
140
1
R-Y IN
3V
1
140
10µA
AGND
AVCC
1k
Pin connecting the capacitor for R-Y
modulator clamp.
Setting the capacitance to too small
a value will enlarge the carrier leak.
0.1µF and above is recommended.
2k
140
2
R-Y CLP
3.4V
2
140
10µA
AGND
DVCC
3
DVCC
Power supply pin for the 1/4 counter
block.
5V
3
DVCC
14.32MHz
1k
20k
4
4
4FSCIN
1Vp-p
80µA
80µA
DC2.5V
Input pin for the 4FSC used to make
up the Sub Carrier.
Input through capacitor.
Set amplitude to over 500mVp-p.
DGND
DVCC
Input pin for Line Alternate signal
during PAL mode.
VTH is at 2.5V. Input a pulse with an
amplitude larger than VTH ± 0.5V.
Set to GND during NTSC mode.
1k
140
5
LALT
0V
5
80µA
DGND
6
NC1
—
Not for use. Leave this pin open.
7
NC2
—
Not for use. Leave this pin open.
DVCC
200
8
FSCOUT
5V
140
8
500µA
DGND
–2–
Outputs a sub carrier with the same
phase as B-Y.
When not in use, connection to Vcc
prevents output and allows for 600µA
of current saving.
Determining phase to 4FSC is
impossible.
CXA1392Q/R
Pin No.
Symbol
Description
Equivalent circuit
Pin voltage
AVCC
1k
BF
140
5V
9
9
BFG
BFG
0V
40µA
AGND
AVCC
1k
5V
10
Inserts a pulse slightly larger than BF
on both ends.
140
BF
10
0V
VTH is at 2.5V. Input a pulse with an
amplitude larger than VTH ± 0.5V.
Inputs BF (burst flag) pulse.
During analog burst, the input pulse
smoothens the waveform.
The input pulse waveform becomes
the envelope of the analog burst
waveform.
3.5V
20µA
AGND
2.5V
During the usual burst, be sure to
input the pulse.
AVCC
1k
5V
11
Inputs CBLK (composite blanking)
pulse.
VTH is at 2.5V. Input a pulse with an
amplitude larger than VTH ± 0.5V.
140
11
CBLK
0V
40µA
AGND
AVCC
1k
5V
12
140
12
CTBLK
0V
80µA
AGND
AVCC
1k
140
13
MODE
0V
13
60µA
AGND
–3–
Inputs CT (chroma titler) pulse.
This signal prevents the application
of chroma suppress during the titler
signal period.
VTH is at 2.5V. Input a pulse with an
amplitude larger than VTH ± 0.5V.
Selects NTSC, PAL or
NTSC × 2, PAL × 2 modes.
0V: NTSC × 1
2.5V: NTSC × 2
3.5V: PAL × 2
5V: PAL × 1
CXA1392Q/R
Pin No.
Symbol
Description
Equivalent circuit
Pin voltage
AVCC
1k
Suppresses chroma signal at the
AGC gain control signal.
3V (100%) to 4.2V (50%)
140
14
CSAGC
0V
14
40µA
AGND
AVCC
1k
Suppress chroma signal at the Y
signal.
200mV (100%) to 700mV (0%)
Inputs through capacitor.
Clamped internally.
2k
140
15
CSY
2.4V
15
140
10µA
AGND
AVCC
200
16
COUT
Chroma signal output pin.
Output as rectangular waves.
2.8V
16
1500µA
AGND
AVCC
17
AVCC
Power supply pin for other than 1/4
counter block.
5V
17
AVCC
18
CIN
2.5V
Input pin for chroma signal passed
through BPF.
Internally biased with a 20kΩ
resistance.
Input through capacitor.
20k
18
AGND
19
19
DGND
0V
GND pin for 1/4 counter block.
DGND
AVCC
200
20
CHROMA
Signals input from CIN are amplified
and output through this pin.
Chroma signal output pin when used
for Y/C separation output.
2V
20
600µA
AGND
–4–
CXA1392Q/R
Pin No.
Symbol
Description
Equivalent circuit
Pin voltage
AVCC
200
21
VOUT
1.8V
Output pin of composite video signal.
When not in use, connection to Vcc
allows for 900µA of current saving.
140
21
600µA
AGND
AVCC
200
22
YOUT
2.4V
Y signal output pin when used for
Y/C separation output.
22
600µA
AGND
AVCC
1k
2k
Connecting pin for the white clip
clamp capacitor.
Over 0.1µF is recommended.
140
23
SETUPCLP
3.3V
23
140
10µA
AGND
AVCC
1k
24
WC LEVEL
3.4V
140
White clip level control pin.
1.6V (550mV) to 5V (1110mV)
24
80µA
AGND
AVCC
1k
25
Sync pulse input pin.
VTH is at 2.5V. Input a pulse with an
amplitude larger than VTH ± 0.5V.
140
5V
25
SYNC
0V
80µA
AGND
AVCC
1k
26
SYNC
LEVEL
Sync level control pin.
1.6V (180mV) to 5V (380mV)
0V (287mV) preset
140
0V
26
40µA
AGND
–5–
CXA1392Q/R
Pin No.
Symbol
Description
Equivalent circuit
Pin voltage
AVCC
1k
27
SETUP
LEVEL
140
3.5V
Setup level control pin.
2.4V (0mV) to 5V (120mV)
27
80µA
AGND
AVCC
1k
140
28
FADER SIG
0V
28
20µA
AGND
AVCC
20µA
1k
29
FADER
MODE
3.5V
140
29
40µA
AGND
Controls the signal suppress level
during Black Fader.
Controls the signal suppress level
during White Fader and at the same
time controls the setup level.
Signal suppress control:
2V (100%) to 2.9V (0%)
Setup level control:
2V (0%) to 2.9V (100%)
BIack Fader/White Fader mode
selection executed through Fader
Mode pin.
BIack Fader and White Fader mode
select pin.
Also controls the final value (100%)
of White Fader white level (setup
level) .
0V (Black Fader)
1.8V (100mV) to 5V (630mV) (White
Fader)
AVCC
1k
140
30
Y LEVEL
3.4V
Y signal level control pin.
1.6V (–3.5dB) to 5V (9dB)
30
80µA
AGND
AVCC
200
31
SHP OUT
3V
Aperture signal output pin.
When not in use, connection to Vcc
allows for 700µA of current saving.
140
31
600µA
AGND
–6–
CXA1392Q/R
Pin No.
Symbol
Description
Equivalent circuit
Pin voltage
AVCC
1k
2k
140
32
SHPCLP2
3.2V
Connects the clamp capacitor used
for the slice of the aperture signal.
32
140
10µA
AGND
AVCC
140
33
DLD
2.1V
Connects the delay line drive side of
the aperture signal.
33
80µA
AGND
AVCC
1k
2k
140
34
SHPCLP1
3.2V
Connects the clamp capacitor used
for the slice of the aperture signal.
34
140
10µA
AGND
AVCC
1k
35
DLE
2.1V
40µA
140
35
Connects the delay line end side of
the aperture signal.
When this pin signals are used as YH
signals, YHIN pin is connected to Vcc.
80µA
AGND
AVCC
1k
140
36
SHP LEVEL
3.5V
Control pin of the aperture signal level.
2.6V (14dB) to 4.2V (–25dB)
36
20µA
AGND
AVCC
1k
5V
37
Inputs YT (Y titler) pulse.
VTH is at 2.5V.
Input a pulse with an amplitude larger
than VTH ± 0.5V.
140
37
YTBLK
0V
80µA
AGND
–7–
CXA1392Q/R
Pin No.
Symbol
Description
Equivalent circuit
Pin voltage
AVCC
1k
Controls the slice level of the aperture
signal.
1.8V (0mV) to 5V (150mV)
140
38
NOISESLICE
3.5V
38
40µA
AGND
1k
140
39
YHCLP
2.7V
AVCC
2k
Connects the capacitor for YH input
clamp.
39
140
40µA
AGND
AVCC
20µA
1k
500mV
40
YHIN
40
140
1.05V
40µA
YH signal input pin.
When DLE pin signal is set as YH
signal, connect this pin to Vcc.
The input signal DC clamp range
stands at 1.05V ± 0.65V.
The standard signal level is at 500mV.
AGND
AVCC
1k
2k
140
41
YL-YHCLP
3.4V
Connects the capacitor for YL-YH
input clamp.
41
140
10µA
AGND
AVCC
1k
Inputs V aperture signals, titler signals
and YL-YH signals.
The input signal DC clamp range
stands at 2.8V ± 1.1V.
140
42
YL-YH IN
2.8V
42
40µA
AGND
43
43
AGND
GND pin for other than 1/4 counter
block.
0V
AGND
–8–
CXA1392Q/R
Pin No.
Symbol
Description
Equivalent circuit
Pin voltage
AVCC
1k
5V
44
CLP4
CLP4 pulse input pin.
VTH is at 2.5V. Input a pulse with an
amplitude larger than VTH ± 0.5V.
140
44
0V
40µA
AGND
AVCC
1k
5V
45
CLP2
CLP2 pulse input pin.
VTH is at 2.5V. Input a pulse with an
amplitude larger than VTH ± 0.5V.
140
45
0V
40µA
AGND
AVCC
1k
Controls the burst level.
1.6V (95mVp-p) to 5V (280mVp-p)
(NTSC pulse burst mode)
140
46
B LEVEL
3.5V
46
40µA
AGND
AVCC
1k
2k
R-Y signal input pin.
Inputs through capacitor.
Clamped internally.
140
47
B-Y IN
3V
47
140
10µA
AGND
AVCC
1k
Connects the capacitor for B-Y
modulator clamp.
Setting the capacitance to too small
a value will enlarge the carrier leak.
Over 0.1µF is recommended.
2k
140
48
B-Y CLP
3.4V
48
140
10µA
AGND
–9–
CXA1392Q/R
Electrical Characteristics
No.
Item
(VCC = 5V, Ta = 25°C)
Conditions
Symbol
Min.
Typ.
Max.
Unit
1
Supply Current
Icc
AVCC + DVCC
19
28
38
mA
2
YH GAIN TYP
YHTYP
FSCOUT = 5V VOUT = 5V SHPOUT = 5V
YHIN (500mV pulse) → YOUT
1.8
2.8
3.8
dB
3
YH GAIN MIN
YHMIN
YHIN (500mV pulse) → YOUT
YLEVEL = 1.6V
—
–4
–2
dB
4
YH GAIN MAX
YHMAX
YHIN (250mV pulse) → YOUT
YLEVEL = 5V
8
9.1
—
dB
5
YL-YH GAIN
YL-YH
YL-YHIN (500mV pulse) → YOUT
1.8
2.8
3.8
dB
6
DLE GAIN
DLE
DLE (1V pulse) → YOUT YHIN = 5V
–4.3
–3.3
–2.3
dB
7
VOUT GAIN
VOUT
YHIN (500mV pulse) → VOUT
1.3
2.3
3.3
dB
8
WHITE FADER
MIN
WFMIN
CBLK pulse FADERMODE = 1.6V
WFMIN = YOUT output level – SETMAX (No.13)
68
86
104
mV
9
WHITE FADER
MAX
WFMAX
CBLK pulse FADERMODE = 5V
WFMAX = YOUT output level – SETMAX (No.13)
527
620
713
mV
10
WHITE CLIP
MIN
WCMIN
YHIN (500mV pulse) → YOUT
CBLK pulse WCLEVEL = 1.6V
522
550
578
mV
11
WHITE CLIP
MAX
WCMAX
YHIN (500mV pulse) → YOUT
CBLK pulse WCLEVEL = 5V
1056 1112 1168
mV
12
WHITE CLIP
PRESET
WCPRE
YHIN (500mV pulse) → YOUT
CBLK pulse WCLEVEL = 0V
796
838
880
mV
13
SETUP MAX
SETMAX
CBLK pulse → YOUT
SETUPLEVEL = 5V
113
126
139
mV
14
SYNC MIN
SYNCMIN
SYNC pulse → YOUT
SYNCLEVEL = 1.6V
165
180
195
mV
15
SYNC MAX
SYNCMAX
SYNC pulse → YOUT
SYNCLEVEL = 5V
363
383
403
mV
16
SYNC PRESET
SYNCPRE
SYNC pulse → YOUT
SYNCLEVEL = 0V
272
287
302
mV
17
SHP-YOUT
GAIN
SHPYOUT
DLD (40mV pulse) → YOUT
SHPLEVEL = 2.6V YHIN (500mV pulse)
12
14
16
dB
18
SHP DOWN
MIN
SHPMIN
DLD (40mV pulse) → SHPOUT
SHPLEVEL = 4.2V
—
–25
–5.5
dB
19
SHP DOWN
TYP
SHPTYP
DLD (40mV pulse) → SHPOUT
SHPLEVEL = 3.4V
5.5
7
8.5
dB
20
SHP DOWN
MAX
SHPMAX
DLD (40mV pulse) → SHPOUT … (DOWNMAX)
SHPLEVEL = 2.6V
11.7
13.2
14.7
dB
21
SHP DOWN/
UP
SHPD/U
DLE (40mV pulse) → SHPOUT … (UPMAX)
SHPLEVEL = 2.6V
SHPD/U = DOWNMAX/UPMAX
2.4
2.8
3.2
times
22
SHP SLICE
MAX
SLICEMAX
DLD (40mV pulse) → SHPOUT … (SLMAX)
SHPLEVEL = 2.6V
SLICEMAX = DOWNMAX – SLMAX
135
150
165
mV
23
B-Y GAIN
B-Y
B-YIN (300mV pulse) → BPFOUT
4FSCIN = SIN 1Vp-p 14.32MHz
B-Y = 20 log {BPFOUT (mVp-p)/300mV}
0.4
1.6
2.8
dB
– 10 –
CXA1392Q/R
No.
Item
Symbol
Conditions
Min.
Typ.
Max.
Unit
0.4
1.6
2.8
dB
24
R-Y GAIN
R-Y
R-YIN (300mV pulse) → BPFOUT … (R-Y level)
4FSCIN = SIN 1Vp-p 14.32MHz
R-Y = 20 log {BPFOUT (mVp-p)/300mV}
25
CARRIER LEAK
3.58MHz
L358
4FSCIN = SIN 1Vp-p 14.32MHz
L358 = 20 log {286mVp-p/BPFOUT level (mVp-p)}
BURST (Typ.)
36
48
—
dB
26
CARRIER LEAK
500kHz
L500
4FSCIN = SIN 1Vp-p 2MHz
L500 = 20 log {286mVp-p/BPFOUT level (mVp-p)}
BURST (Typ.)
36
58
—
dB
27
COUT
DRANGE
COUTD
R-YIN (600mV pulse) → BPFOUT
4FSCIN = SIN 1Vp-p 14.32MHz
670
730
—
mV
28
CS AGC MAX
R-YIN (300mV pulse) → BPFOUT
4FSCIN = SIN 1Vp-p 14.32MHz
CSAGCMAX
CSAGC = 4.2V
CSAGCMAX = (BPFOUT level/R-Y level) × 100%
47
52
57
%
29
FSCOUT
amplitude
FSC
FSCOUT DC amplitude at 4FSCIN = 2V, 3V
585
673
760
mV
30
BURST NTSC
MIN
NTMIN
BFG pulse → BPFOUT BLEVEL = 1.6V
4FSCIN = SIN 1Vp-p 14.32MHz
80
95
110
mV
31
BURST NTSC
MAX
NTMAX
BFG pulse → BPFOUT BLEVEL = 5V
4FSCIN = SIN 1Vp-p 14.32MHz
250
280
312
mV
32
BURST PAL MIN
PALMIN
BFG pulse → BPFOUT
BLEVEL = 1.6V MODE = 5V
4FSCIN = SIN 1Vp-p 14.32MHz
89
105
120
mV
33
BURST PAL MAX PALMAX
BFG pulse → BPFOUT
BLEVEL = 5V MODE = 5V
4FSCIN = SIN 1Vp-p 14.32MHz
283
316
350
mV
34
BURST NTSC
× 2 MIN
NT2MIN
BFG pulse → BPFOUT
BLEVEL = 1.6V MODE = 2.5V
4FSCIN = SIN 1Vp-p 14.32MHz
153
180
207
mV
35
BURST NTSC
× 2 MAX
NT2MAX
BFG pulse → BPFOUT
BLEVEL = 5V MODE = 2.5V
4FSCIN = SIN 1Vp-p 14.32MHz
468
520
572
mV
36
BURST PAL
× 2 MIN
PAL2MIN
BFG pulse → BPFOUT
BLEVEL = 1.6V MODE = 3.5V
4FSCIN = SIN 1Vp-p 14.32MHz
171
202
232
mV
37
BURST PAL
× 2MAX
PAL2MAX
BFG pulse → BPFOUT
BLEVEL = 5V MODE = 3.5V
4FSCIN = SIN 1Vp-p 14.32MHz
535
595
655
mV
38
CIN-VOUT GAIN
CINVOUT
CIN (SIN 400mVp-p 3.58MHz) → VOUT
2.5
3.5
4.5
dB
39
CIN-CHROMA
GAIN
CINCHROMA CIN (SIN 400mVp-p 3.58MHz) → CHROMA
2.1
3.1
4.1
dB
Ref) YHIN → YOUT Frequency characteristics gain 10MHz, –2.3dB (Typ.)
– 11 –
CXA1392Q/R
5V
5V
0V
0V
0V
3.4V
2.1V
5V
2.1V
0.1µ
0.1µ
Electrical Characteristics Measurement Circuit
0.1µ
39
YHCLP
SETUP LEVEL
SYNC
LEVEL
SYNC
5V
FADER SIG
Y LEVEL
38 NOISESLICE
FADER MODE
SHP OUT
DLD
SHPCLP2
37 YTBLK
0V
SHPCLP1
SHP
LEVEL
DLE
36 35 34 33 32 31 30 29 28 27 26 25
WC
LEVEL 24
SETUPCLP 23
40 YHIN
1.05V
0.1µ
CHROMA 20
DGND 19
43 AGND
44
CLP4
AVCC 17
45
CLP2
COUT 16
CSAGC 14
NC2
FSCOUT
BFG
3
4
5
6
7
8
9 10 11 12
0.01µ
0V
5V
BPF
0.1µ
BPF OUT∗1
0V
0V
0V
5V
5V
5V
5V
1000p
0V
0V
0.1µ
5V
0V
CTBLK
NC1
2
CBLK
LALT
1
BF
4FSCIN
MODE 13
DVCC
48 B-Y CLP
0.1µ
0.1µ
CSY 15
B-Y IN
R-Y CLP
0.1µ
47
R-Y IN
0V
CIN 18
46 B LEVEL
0V
0.1µ
YOUT 22
VOUT 21
41 YL-YHCLP
42 YL-YH IN
2.8V
5V
Above conditions are given as the typical setting. The individual conditions of each item are indicated in the
chart.
∗1 For BPF characteristics proceed as follows.
(1) When 4FSC IN = 14.32MHz, use a 3.58MHz band-pass filter where through the input of a 3.58MHz sine
wave a ratio of 2 to 1 is obtained for the input vs. output.
(2) When 4FSC IN = 2MHz, use a 500kHz band-pass filter where through the input of a 500kHz sine wave a
ratio of 2 to 1 is obtained for the input vs. output.
– 12 –
CXA1392Q/R
Input Signal Timing Chart
Input signal
Pin name
0
10
20
30
40
50
60
(µs)
45. CLP2
5V
2µs
0V
44. CLP4
11. CBLK
25. SYNC
9.
BFG
5V
2µs
0V
5V
0V
5V
0V
5V
0V
40. YH
∗
1.05V
42. YL-YH
∗
2.8V
33. DLD
35. DLE
37. YTBLK
∗
2.1V
∗
2.1V
5V
0V
12. CTBLK
5V
0V
15. CSY
1.
R-Y
48. B-Y
∗
0V
∗
0V
∗
0V
Note) Level of ∗ is indicated in the conditions shown in the chart.
– 13 –
CXA1392Q/R
YH gain control characteristics
Y fader control characteristics
100
Black Fader
10
White Fader
Fader level [%]
YH gain [dB]
8
6
4
2
50
0
–2
–4
0
1
2
3
Y level pin [V]
4
0
5
2
White fader control characteristics
2.5
Fader SIG pin [V]
3
White clip control characteristics
White clip level [mV]
White fader level [mV]
800
600
400
1000
800
600
200
400
0
0
1
2
3
Fader mode pin [V]
4
5
0
Setup level control characteristics
1
2
3
WC level pin [V]
4
5
Sync level control characteristics
100
Sync level [mV]
Setup level [mV]
400
0
300
200
0
1
2
3
Setup level pin [V]
4
0
5
– 14 –
1
2
3
Sync level pin [V]
4
5
CXA1392Q/R
SHP gain control characteristics
SHP noise slice characteristics
5
200
Slice level [mV]
SHP OUT/DLD IN [times]
4
3
2
1
0
150
100
50
2
3
SHP level pin [V]
0
4
0
CS AGC control characteristics
1
2
3
Noise slice pin [V]
4
5
CS Y control characteristics
100
100
Degree of suppress [%]
Degree of suppress [%]
90
80
70
50
60
50
2.6
3
0
4
CS AGC pin [V]
Chroma fader control characteristics
Fader level [%]
100
50
0
2
2.5
Fader SIG pin [V]
3
– 15 –
0
500
CS Y signal level [mV]
1000
CXA1392Q/R
Burst level control characteristics
(PAL pulse mode)
Burst level [mV]
Burst level [mV]
Burst level control characteristics
(NTSC pulse mode)
300
200
100
0
300
200
100
0
1
2
3
B level pin [V]
4
0
5
0
500
500
400
400
300
200
100
0
0
1
2
3
B level pin [V]
4
5
300
200
0
5
Analog burst control
Analog Burst [%]
4
100
100
50
0
2
3
B level pin [V]
Burst level control characteristics
(PAL analog mode)
Burst level [mV]
Burst level [mV]
Burst level control characteristics
(NTSC analog mode)
1
2
3
BF pin [V]
4
– 16 –
0
1
2
3
B level pin [V]
4
5
CXA1392Q/R
YH gain typical temperature characteristics
White clip preset temperature characteristics
850
YH gain [dB]
White clip [mV]
3.0
2.5
840
–20
0
20
40
60
Ambient temperature [°C]
75
–20
Setup level temperature characteristics
(Setup level = 3.4V)
0
20
40
60
Ambient temperature [°C]
75
Y OUT DC temperature characteristics
50
Y OUT DC [V]
Setup level [mV]
2.5
40
2.3
2.2
–20
0
20
40
60
Ambient temperature [°C]
2.1
75
2.0
0
20
40
60
Ambient temperature [°C]
75
Burst level [mV]
290
1.5
1.0
–20
20
Burst NTSC maximum temperature characteristics
(NTSC pulse mode) Burst level = 5.0V
B-Y gain temperature characteristics
B-Y gain [dB]
2.4
0
20
40
60
Ambient temperature [°C]
280
270
–20
75
– 17 –
0
20
40
60
Ambient temperature [°C]
75
CXA1392Q/R
CIN → Chroma gain temperature characteristics
Carrier leak 3.58MHz temperature characteristics
–50
Carrier leak [dB]
CIN → Chroma gain [dB]
3.5
3.0
–45
2.5
–20
0
20
40
60
Ambient temperature [°C]
75
–20
Carrier leak 500kHz temperature characteristics
0
20
40
60
Ambient temperature [°C]
75
YH gain maximum supply voltage characteristics
10.0
YH gain [dB]
Carrier leak [dB]
–65
–60
9.5
–55
–20
0
20
40
60
Ambient temperature [°C]
75
4.5
950
60
Setup level [mV]
White clip [mV]
5.5
Setup level supply voltage characteristics
(Setup level = 3.4/5VCC)
White clip preset supply voltage characteristics
850
750
5.0
Supply voltage [V]
4.5
5.0
Supply voltage [V]
50
40
5.5
– 18 –
4.5
5.0
Supply voltage [V]
5.5
CXA1392Q/R
SYNC level preset supply voltage characteristics
B-Y gain supply voltage characteristics
2.0
B-Y GAIN
SYNC level [mV]
350
300
250
4.5
5.0
Supply voltage [V]
1.5
1.0
5.5
Burst level supply voltage characteristics
(NTSC pulse mode) Burst level = VCC
4.5
5.0
Supply voltage [V]
5.5
CIN → Chroma gain supply voltage characteristics
CIN → Chroma gain [dB]
3.5
Burst level [mV]
300
3.0
240
4.5
5.0
Supply voltage [V]
2.5
5.5
– 19 –
4.5
5.0
Supply voltage [V]
5.5
CXA1390 Series System Diagram
CCD
IHDL
IHDL
W/B
CONTROLLER
IHDL
37
36
35
34
33
R-MIX
MPX2-CLP
MPX1-CLP
B-MTX
ID
B-GAIN
B-CONT
R-CONT
R-GAIN
B-CLP
G-CLP
R-CLP
C
LEVEL
DLY1-OUT
54 Y1-GAIN
WB-B 30
55 DLY1-IN
WB-G 29
DLY2-IN
57 Y2-GAIN
42 YL-YH IN
LPF-ADJ2
61
LPF-ADJ3
62
VCC
CLP2
COUT 16
BPF
46
B LEVEL
CSY 15
14
15
16
17
18
48
B-Y CLP
R-Y
20
OUT
19
1
2
3
4
5
6
7
8
MODE 13
CBLK
13
CSAGC 14
B-Y HUE 21
B-Y OUT
12
B-Y GAIN
11
R-Y GAIN
10
CS-IN
9
CS-CLP
8
VAP-CLP
7
VAP-SLICE
6
VAP-GAIN
5
VAP-OUT
4
CLP2
3
CLP4
2
TP
1
YH-GAIN
12
YGAM-CONT
YH-IN
YH-OUT1
11
64
YH-OUT2
10
63
CLP1 13
DLYH-OUT
9
5V
45
R-Y HUE 22
DLYH-CLP
8
AVCC 17
47 B-Y IN
YHCLP
7
CLP4
VCS-GAIN 23
DLYH-IN
CS-AGC-GC
CS-AGC-SL
6
CS-OUT
5
CS-CCD-GC
4
CS-CLP
3
CS-CCD-SL
F1-OUT
2
F2-OUT
GY-OUT
1
F3-OUT
XSH1
XSH2
44
CS-OUT 24
PBLK 14
DC-OUT
9
10
11
12
5V
5V
LPF
5
TH-CONT
COMP-IN
CT-GC COMP-OUT
16 17
20
21
22 23
24
HYS-CONT
YT-GC
15
1
YB-IN
14
DY-IN
13
2
YR-IN
XSP2
3
18 19
CXA1393AN/AM
PBLK
XSP1
4
YG-IN
CR-IN
6
CG-IN
7
VCC
GND
8
CB-IN
DB-IN
CLP4
9
DR-IN
11 10
DY-CLP
ID
12
YT-BLK
CLP1
DL
DY-OUT
XSH2
IHDL
CT-BLK
XSH1
LPF
DB-OUT
LPF DL
DR-OUT
– 20 –
5V
CIN 18
YL-OUT 25
CTBLK
WND 15
LPF-ADJ1
BFG
F2-CLP
47 F1-CLP
DGND 19
BF
46
60
Vid
C
CXA1392Q/R
GND 26
43 AGND
59
Y
CHROMA 20
FSCOUT
VG-OUT 16
WC
24
LEVEL
SETUPCLP 23
VOUT 21
NC2
F3-CLP
25
YOUT 22
NC1
45
26
40 YHIN
4FSCIN
IRIS-OUT 17
27
39 YHCLP
LALT
FSHI
28
CGAM-CONT 27
CXA1391Q/R
58 GND
44
29
WB-R 28
GND 19
IRIS-CLP 18
30
41 YL-YHCLP
CXA1390Q/R
43 GND
31
38 NOISESLICE
56
42 XSP1
32
DVCC
DET-CLP 20
33
R-Y IN
41 XSP2
34
R-Y CLP
IRIS-LEVEL 21
35
37 YTBLK
C-SLICE
WB-DO 31
5V
IRIS-GC 22
40 XSP3
48
36
32
SYNC
38
SYNC
LEVEL
39
FADER SIG
40
SETUP LEVEL
41
Y LEVEL
42
FADER MODE
43
SHP OUT
44
DLD
45
SHPCLP2
46
DLE
47
SHPCLP1
48
SHP
LEVEL
49
C1-GAIN
53
39 VCC1
50
DLY0-OUT
24 DETECTOR
VCC2 23
51
DLCO-OUT
DET-OUT
38 DATA-IN
5V
52
S2-IN
25
DLC1-IN
26
YOCLP
27
S1-IN
28
DETLEVEL
29
AGC-CLP
30
OPIN-P
XSHP
AGC-SEL
31
AGC-OUT
CLP4
37 PG-IN
32
OPIN-N
33
OP-OUT
34
AGC-MAX
35
AGC-CONT
36
XSHD
DL
CLP2
CLP4
TG
XSHD
CR
WND
XSHP
YR
BFG
BLK
BF
SYNC
CG
CB
CONTROLLER
FOR TITLER
SG
LALT
YG
YB
4fSC
CXA1392Q/R
CXA1392Q/R
Package Outline
Unit: mm
CXA1392Q
48PIN QFP (PLASTIC)
15.3 ± 0.4
+ 0.1
0.15 – 0.05
+ 0.4
12.0 – 0.1
0.15
36
25
24
48
13
13.5
37
12
+ 0.15
0.3 – 0.1
0.8
0.24
M
0.9 ± 0.2
1
+ 0.2
0.1 – 0.1
+ 0.35
2.2 – 0.15
PACKAGE STRUCTURE
SONY CODE
QFP-48P-L04
EIAJ CODE
QFP048-P-1212
JEDEC CODE
PACKAGE MATERIAL
EPOXY RESIN
LEAD TREATMENT
SOLDER / PALLADIUM
PLATING
LEAD MATERIAL
42/COPPER ALLOY
PACKAGE MASS
0.7g
NOTE : PALLADIUM PLATING
This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame).
CXA1392R
48PIN LQFP (PLASTIC)
9.0 ± 0.2
7.0 ± 0.1
36
37
24
48
13
(8.0)
25
A
0.5 ± 0.2
∗
(0.22)
12
1
+ 0.05
0.127 – 0.02
0.5
+ 0.08
0.18 – 0.03
+ 0.2
1.5 – 0.1
0.13 M
0.1
0° to 10°
0.5 ± 0.2
0.1 ± 0.1
NOTE: Dimension “∗” does not include mold protrusion.
DETAIL A
PACKAGE STRUCTURE
PACKAGE MATERIAL
EPOXY RESIN
SOLDER/PALLADIUM
PLATING
SONY CODE
LQFP-48P-L01
LEAD TREATMENT
EIAJ CODE
LQFP048-P-0707
LEAD MATERIAL
42/COPPER ALLOY
PACKAGE MASS
0.2g
JEDEC CODE
– 21 –