SE1020W 1.25 Gb/s Transimpedance Amplifier Product Preview Applications Product Description Gigabit-Ethernet systems, test equipment and modules SiGe Semiconductor offers a portfolio of optical networking ICs for use in high-performance optical transmitter and receiver functions, from 155 Mb/s up to 12.5 Gb/s. OC-24 fibre optic modules and line termination Fibre Channel optical systems SiGe Semiconductor’s SE1020W is a fully integrated, silicon bipolar transimpedance amplifier; providing wideband, low noise preamplification of signal current from a photodetector. It features differential outputs and incorporates an automatic gain control mechanism to increase dynamic range, allowing input signals up to 2.6 mA peak. A decoupling capacitor on the supply is the only external circuitry required. A system block diagram is shown after the functional description, on page 3. Features Single +3.3 V power supply Power dissipation = 110 mW (typ) Input noise current = 180 nA rms when used with a 0.7 pF detector Transimpedance gain = 4.0 kΩ into a 50 Ω load (differential) On-chip automatic gain control gives input current overload of 2.6 mA pk and max output voltage swing of 300 mV pk-pk Differential 50 Ω outputs Bandwidth (-3 dB) = 1.2 GHz Wide data rate range = 50 Mb/s to 1.25 Gb/s Constant photodiode reverse bias voltage = 1.5 V (anode to input, cathode to VCC) Minimal external components, supply decoupling only Operating junction temperature range = -40°C to +125°C Ordering Information Type Package Remark SE1020W Bare Die None Functional Block Diagram Automatic Gain Control SE1020 TzAmp 1.25 Gb/s Integrator Rectifier VCC or +ve supply Input Current Rf TZ_IN Tz Amp 50 Ω Output Driver 50 Ω OUTP OUTN Bandgap Reference 42-DST-01 Rev 1.3 May 27/02 Confidential 1 of 7 SE1020W 1.25 Gb/s Transimpedance Amplifier Product Preview Bondpad Diagram VCC 1 10 VCC 9 OUTP 8 OUTN Top View TZ_IN 2 3 4 5 VEE2 VEE1 VEE1 6 7 VEE1 VCC Bondpad Description Pad No. Name 1 VCC 2 TZ_IN Description Positive supply (+3.3 V), pads 1, 7 & 10 are connected on chip. Only one pad needs to be bonded. Input pad (connect to photodetector anode). Negative supply (0V) – Note this is separate ground for the input stage, which is AC coupled on chip. There is no DC current through this pad. Negative supply (0V), pads 4, 5 & 6 are connected on chip. Only one pad needs to be bonded. Negative supply (0V), pads 4, 5 & 6 are connected on chip. Only one pad needs to be bonded. Negative supply (0V), pads 4, 5 & 6 are connected on chip. Only one pad needs to be bonded. Positive supply (+3.3 V), pads 1, 7 & 10 are connected on chip. Only one pad needs to be bonded. 3 VEE2 4 VEE1 5 VEE1 6 VEE1 7 VCC 8 OUTN Negative differential voltage output. 9 OUTP Positive differential voltage output. 10 VCC 42-DST-01 Rev 1.3 Positive supply (+3.3 V), pads 1, 7 & 10 are connected on chip. Only one pad needs to be bonded. May 27/02 Confidential 2 of 7 SE1020W 1.25 Gb/s Transimpedance Amplifier Product Preview (+3.3 V) connection with the remainder of the circuitry, which has a separate ground (VEE1). Functional Description Amplifier front-end Output driver stage The transimpedance front-end amplifies an input current from a photodetector, at pin TZ_IN, to produce an output voltage with the feedback resistor Rf determining the level of amplification (see the functional block diagram on page 1). An automatic gain control loop varies this resistor, to ensure that the output from the front-end does not saturate the output driver stage that follows. This gain control allows input signals of up to 2.6 mA peak. The output driver acts as a buffer stage, capable of swinging up to 300 mVpk-pk differential into a 100 Ω load. The small output swings allow ease of use with low voltage post amplifiers (e.g. 3.3 V parts). Increasing optical input level gives a positive-going output signal on the OUTP pin. Automatic Gain Control (AGC) The AGC circuit monitors the voltages from the output driver and compares them to an internal reference level produced via the on-chip bandgap reference circuit. When this level is exceeded, the gain of the front-end is reduced by controlling the feedback resistor Rf. The input pin TZ_IN is biased at 1.5 V below the supply voltage VCC, allowing a photodetector to have a constant reverse bias by connecting the cathode to 3.3 V. This enables full single rail operation. A long time-constant integrator is used within the control loop of the AGC with a typical low frequency cut-off of 10 kHz. The front-end stage has its own supply ground connection (VEE2) to achieve optimum noise performance and maintain integrity of the highspeed signal path. The front-end shares the VCC System Block Diagram Receiver Module 1.25 GHz 1.25 Gb/s 2 2 AGC Amplifier Clock Clock & Data Recovery 2 SE1230 SE1020W PIN Data LOS 42-DST-01 2 Rev 1.3 May 27/02 Confidential TZ Amplifier 3 of 7 SE1020W 1.25 Gb/s Transimpedance Amplifier Product Preview Electrical Specifications Absolute Maximum Ratings These are stress ratings only. Exposure to stresses beyond these maximum ratings may cause permanent damage to, or affect the reliability of the device. Avoid operating the device outside the recommended operating conditions defined below. Symbol Parameter Min Max Unit VCC Supply Voltage –0.7 6.0 V VIO Voltage at any input or output –0.5 VCC+0.5 V IIO Current sourced into any input or output except TZ_IN –20 +20 mA IIO Current sourced into pin TZ_IN –5 +5 mA VESD Electrostatic Discharge (100 pF, 1.5 kΩ) except TZ_IN –2 2 kV VESD Electrostatic Discharge (100 pF, 1.5 kΩ) pin TZ_IN –0.25 0.25 kV Tstg Storage Temperature –65 150 °C Recommended Operating Conditions Symbol Parameter Min Typ Max Unit VCC Supply Voltage 3.1 3.3 3.5 V Tj Operating Junction Temperature –40 125 °C DC Electrical Characteristics Symbol Parameter ICC max Typ Max Unit Supply Current (max input current) 41 65 mA ICC zero Supply Current (zero input current) 33 52 mA lagc AGC Threshold Vin Input Bias Voltage Vout Output Bias Voltage Rout Output Resistance 42-DST-01 Rev 1.3 Min May 27/02 µA pk-pk 24 VCC–1.57 VCC–1.52 VCC–1.47 VCC–0.15 35 Confidential 50 V V 65 Ω 4 of 7 SE1020W 1.25 Gb/s Transimpedance Amplifier Product Preview AC Electrical Characteristics Symbol Parameter Min Typ BW (3dB) Small Signal Bandwidth at –3dB point 0.95 1.2 Tz Differential Transimpedance (50 Ω on each output, f = 100 MHz) 2.9 4.0 Dri Input Data Rate 50 Voutmax Maximum Differential Output Voltage Flf Low Frequency Cut-off lOL Input Current before overload (1.25 Gb/s NRZ data) 2600 µA pk-pk Pol Optical Overload +3.3 dBm Nrms Input Noise Current (in 1 GHz) 10 180 Max Unit GHz 5.4 kΩ 1250 Mb/s 300 mV pk-pk 20 kHz 255 nA rms DC and AC electrical characteristics are specified under the following conditions: Supply Voltage (VCC) ................................... 3.1 V to 3.5 V Junction Temperature (Tj) ............................. –40°C to 125°C Load Resistor (RL) ......................................... 50 Ω AC coupled via 220 nF, for each output Photodetector Capacitance (Cd) ................... 0.7 pF Input bond wire inductance............................ 1 nH Photodetector responsivity ............................ 0.6 A/W Transimpedance (Tz) measured with 4 µA mean photocurrent 42-DST-01 Rev 1.3 May 27/02 Confidential 5 of 7 SE1020W 1.25 Gb/s Transimpedance Amplifier Product Preview Bondpad Configuration The diagram below shows the bondpad configuration of the SE1020W Transimpedance Amplifier: Note that the diagram is not to scale. Bondpad openings are 82 µm x 82 µm. There are three VCC and three VEE1 pads for ease of wire bonding – the VCC and VEE1 pads respectively are connected on-chip and only one pad of each type is required to be bonded out. 1.25 mm VCC 10 1 VCC Top View TZ_IN 0.925 mm 9 OUTP 8 OUTN 2 3 4 5 VEE2 VEE1 VEE1 6 7 VEE1 VCC Applications Information For optimum performance it is recommended that the device be configured as in the circuit shown in the diagram below. Note that all VCC pads (1, 7, 10) are connected on-chip, as are the VEE1 pads (4, 5, 6),.and only one pad of each type is required to be bonded out. However, in order to minimize inductance for optimum high speed performance, it is recommended that all power pads are wire bonded. The VEE2 pad is not connected on chip to VEE1 and must be bonded out separately. +3.3 V PIN or APD Bias 1 7 1 nF min 10 VCC 1 nF min 2 TZ Amplifier SE1020W OUTP OUTN TZ_IN PIN or APD VEE2 3 5 8 To 50 Ω loads, AC coupled VEE1 4 9 6 0V 42-DST-01 Rev 1.3 May 27/02 Confidential 6 of 7 SE1020W 1.25 Gb/s Transimpedance Amplifier Product Preview http://www.sige.com Headquarters: Canada Phone: +1 613 820 9244 Fax: +1 613 820 4933 2680 Queensview Drive Ottawa ON K2B 8J9 Canada [email protected] U.S.A. United Kingdom 1150 North First Street San Jose, CA USA 95112 1010 Cambourne Business Park Cambourne Cambridge CB3 6DP Phone: +1 408 998 5060 Fax: +1 408 998 5062 Phone: +44 1223 598 444 Fax: +44 1223 598 035 Product Preview The datasheet contains information from the product concept specification. SiGe Semiconductor reserves the right to change information at any time without notification. Preliminary The datasheet contains information from the design target specification. SiGe Semiconductor reserves the right to change information at any time without notification. Final The datasheet contains information from the final product specification. SiGe Semiconductor reserves the right to change information at any time without notification. Production testing may not include testing of all parameters. Information furnished is believed to be accurate and reliable and is provided on an “as is” basis. SiGe Semiconductor Inc. assumes no responsibility or liability for the direct or indirect consequences of use of such information nor for any infringement of patents or other rights of third parties, which may result from its use. No license or indemnity is granted by implication or otherwise under any patent or other intellectual property rights of SiGe Semiconductor Inc. or third parties. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SiGe Semiconductor Inc. products are NOT authorized for use in implantation or life support applications or systems without express written approval from SiGe Semiconductor Inc. Copyright 2002 SiGe Semiconductor All Rights Reserved 42-DST-01 Rev 1.3 May 27/02 Confidential 7 of 7