SLS SL74HCT138D

SL74HCT138
1- of-8 Decoder/Demultiplexer
High-Performance Silicon-Gate CMOS
The SL74HCT138 is identical in pinout to the LS/ALS138. The
SL74HCT138 may be used as a level converter for interfacing TTL or
NMOS outputs to High Speed CMOS inputs.
The SL74HCT138 decodes a three-bit Address to one-of-eight
active-lot outputs. This device features three Chip Select inputs, two
active-low and one active-high to facilitate the demultiplexing,
cascading, and chip-selecting functions. The demultiplexing function is
accomplished by using the Address inputs to select the desired device
output; one of the Chip Selects is used as a data input while the other
Chip Selects are held in their active states.
• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 µA
ORDERING INFORMATION
SL74HCT138N Plastic
SL74HCT138D SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
PIN 16 =VCC
PIN 8 = GND
Outputs
CS1 CS2 CS3
A2 A1 A0
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
X X H
X H X
L X X
X X X
X X X
X X X
H H H H H H H H
H H H H H H H H
H H H H H H H H
H
H
H
H
L
L
L
L
L
L
L
L
L L L
L L H
L H L
L H H
L
H
H
H
H
L
H
H
H
H
L
H
H
H
H
L
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H L L
H L H
H H L
H H H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L H H H
H L H H
H H L H
H H H L
H
H
H
H
H
H
H
H
H
H
H
H
H = high level (steady state)
L = low level (steady state)
X = don’t care
SLS
System Logic
Semiconductor
SL74HCT138
MAXIMUM RATINGS *
Symbol
Parameter
Value
Unit
-0.5 to +7.0
V
VCC
DC Supply Voltage (Referenced to GND)
VIN
DC Input Voltage (Referenced to GND)
-1.5 to VCC +1.5
V
DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
DC Input Current, per Pin
±20
mA
DC Output Current, per Pin
±25
mA
ICC
DC Supply Current, VCC and GND Pins
±50
mA
PD
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
-65 to +150
°C
260
°C
VOUT
IIN
IOUT
Tstg
Storage Temperature
TL
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
DC Supply Voltage (Referenced to GND)
VIN, VOUT
DC Input Voltage, Output Voltage (Referenced to GND)
TA
Operating Temperature, All Package Types
tr, t f
Input Rise and Fall Time (Figure 2)
Min
Max
Unit
4.5
5.5
V
0
VCC
V
-55
+125
°C
0
500
ns
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range
GND≤(VIN or VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).
Unused outputs must be left open.
SLS
System Logic
Semiconductor
SL74HCT138
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
VCC
Guaranteed Limit
Test Conditions
V
25 °C
to
-55°C
≤85
°C
≤125
°C
Unit
Minimum High-Level
Input Voltage
VOUT=0.1 V or VCC-0.1 V
IOUT≤ 20 µA
4.5
5.5
2.0
2.0
2.0
2.0
2.0
2.0
V
VIL
Maximum Low -Level
Input Voltage
VOUT=0.1 V or VCC-0.1 V
IOUT ≤ 20 µA
4.5
5.5
0.8
0.8
0.8
0.8
0.8
0.8
V
VOH
Minimum High-Level
Output Voltage
VIN=VIH or VIL
IOUT ≤ 20 µA
4.5
5.5
4.4
5.4
4.4
5.4
4.4
5.4
V
VIN=VIH or VIL
IOUT ≤ 4.0 mA
4.5
3.98
3.84
3.7
VIN=VIH or VIL
IOUT ≤ 20 µA
4.5
5.5
0.1
0.1
0.1
0.1
0.1
0.1
VIN=VIH or VIL
IOUT ≤ 4.0 mA
4.5
0.26
0.33
0.4
Symbol
Parameter
VIH
VOL
Maximum Low-Level
Output Voltage
V
IIN
Maximum Input
Leakage Current
VIN=VCC or GND
5.5
±0.1
±1.0
±1.0
µA
ICC
Maximum Quiescent
Supply Current
(per Package)
VIN=VCC or GND
IOUT=0µA
5.5
4.0
40
160
µA
∆ICC
Additional Quiescent
Supply Current
VIN = 2.4 V, Any One Input
VIN=VCC or GND, Other
Inputs
≥-55°C
25°C to
125°C
mA
2.9
2.4
IOUT=0µA
5.5
SLS
System Logic
Semiconductor
SL74HCT138
AC ELECTRICAL CHARACTERISTICS (VCC =5.0 V, CL=50pF,Input t r=t f=6.0 ns)
Guaranteed Limit
Symbol
Parameter
25 °C to
-55°C
≤85°C
≤125°C
Unit
tPLH, t PHL
Maximum Propagation Delay, Input A to
Output Y (Figures 1 and 4)
30
38
45
ns
tPLH, t PHL
Maximum Propagation Delay , CS1 to
Output Y (Figures 2 and 4)
27
34
41
ns
tPLH, t PHL
Maximum Output Transition Time , CS2 or CS3 to
Output Y (Figures 3 and 4)
30
38
45
ns
tTLH, t THL
Maximum Output Transition Time, Any Output
(Figures 2 and 4)
15
19
22
ns
Maximum Input Capacitance
10
10
10
pF
CIN
Power Dissipation Capacitance (Per Enabled
Output)
CPD
Used to determine the no-load dynamic power
consumption:
PD=CPDVCC2f+ICCVCC
Figure 1. Switching Waveforms
SLS
System Logic
Semiconductor
Typical @25°C,VCC=5.0 V
51
pF
Figure 2. Switching Waveforms
SL74HCT138
Figure 3. Switching Waveforms
Figure 4. Test Circuit
EXPANDED LOGIC DIAGRAM
SLS
System Logic
Semiconductor