CXA2504N Sample-and-Hold Driver IC for LCD Description The CXA2504N comprises a 6-channel sampleand-hold circuit and driver for liquid crystal display. Features • Built-in sample-and-hold circuit for phase matching • Sample-and-hold circuit slew rate 280V/µs (Typ.) • Driver slew rate 190V/µs (Typ.) (for 300pF load capacitance) • Sample-and-hold circuit slew rate adjustment function • Driver slew rate adjustment function Structure Bipolar silicon monolithic IC Applications • Liquid crystal projectors • Liquid crystal viewfinders • Small liquid crystal monitors 40 pin SSOP (Plastic) Absolute Maximum Ratings (Ta = 25°C) • Supply voltage VCC1 17 VCC2 17 VCC3 7 ∗ 1 • Input pin voltage 1 VIN1 Vcc1 ∗ 2 • Input pin voltage 2 VIN2 Vcc3 • Digital input pin voltage VP∗3 –0.3 to Vcc3 + 0.3 V V V V V V °C °C • Operating temperature Topr –25 to +75 • Storage temperature Tstg –55 to +150 • Allowable power dissipation (Ta ≤ 25°C) PD 1.72∗4 W ∗ 4 • Reduction rate (Ta > 25°C) 13.8 mW/°C Operating Conditions Supply voltage VCC1 VCC2 VCC3 15.5 ± 0.8 15.5 ± 0.8 5.0 ± 0.5 V V V ∗1 Applies to Pins 4, 5, 6, 7, 8, 13, 14, 15, 16, 24, 26, 28, 34, 36 and 38. ∗2 Applies to Pins 17 and 39. ∗3 Applies to Pins 1, 2, 3, 18, 19, 20, 21 and 40. ∗4 When mounted on 40 × 40mm2 square epoxy board. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E96652A82-PS CXA2504N Block Diagram SH4 1 SH5 2 SH6 3 BIAS IN56 4 IN6 5 IN5 6 BIAS IN34 7 IN4 8 GND 9 40 SH8 Current Setting 39 I DR 38 BIAS OUT6 Level Shifter S/H S/H DR 37 OUT6 36 BIAS OUT5 Level Shifter S/H S/H DR 35 OUT5 34 BIAS OUT4 Level Shifter S/H S/H DR 33 OUT4 32 VCC2 GND 10 31 GND GND 11 30 GND VCC1 12 29 GND IN3 13 BIAS IN12 14 28 BIAS OUT3 Level Shifter S/H S/H DR 26 BIAS OUT2 IN2 15 IN1 16 Level Shifter S/H S/H DR I SH 17 SH1 18 27 OUT3 25 OUT2 24 BIAS OUT1 Level Shifter S/H S/H SH2 19 DR 23 OUT1 22 VCC3 SH3 20 Current Setting –2– 21 SH7 CXA2504N Pin Description Pin No. Symbol Pin voltage Equivalent circuit Description 1 SH4 2 SH5 3 SH6 2 CH6 sampling pulse input SH1 3 CH1 sampling pulse input 18 19 SH2 20 SH3 21 SH7 40 SH8 4 BIAS IN56 CH4 sampling pulse input VCC3 1 3.0 to 5.0V 200µ 18 CH2 sampling pulse input 19 0V 20 CH5 sampling pulse input 200 21 CH3 sampling pulse input Pulse input for simultaneous resampling of CH1, 2, and 3 100 40 Pulse input for simultaneous resampling of CH4, 5, and 6 GND VCC1 Inputs IN5 and 6 signal center voltage 4 7 7 BIAS IN34 14 14 BIAS IN12 5 IN6 6 IN5 8 IN4 13 IN3 20µ GND IN2 16 IN1 Inputs IN1and 2 signal center voltage CH6 input∗1 CH5 input∗1 VCC1 11.5V 5 CH4 input∗1 6 8 13 200 CH3 input∗1 15 2V 15 Inputs IN3 and 4 signal center voltage 200 100µ 16 CH2 input∗1 GND CH1 input∗1 VCC3 17 I SH Sets sample-and-hold circuit current. Sample-and-hold circuit slew rate changes. 1.2V 2k 17 39 39 I DR 200 1.2V 10k GND ∗1 Do not input a signal of 2V or less to IN1 to IN6. –3– Sets output driver circuit current. Output driver circuit slew rate changes. CXA2504N Pin No. 23 Symbol Pin voltage Description Equivalent circuit CH1 output∗2 OUT1 VCC2 25 OUT2 23 27 OUT3 27 33 OUT4 35 CH2 output∗2 25 CH3 output∗2 10 33 CH4 output∗2 10 37 CH5 output∗2 35 OUT5 37 OUT6 CH6 output∗2 24 BIAS OUT1 Inputs OUT1 signal center voltage 26 BIAS OUT2 GND VCC1 Inputs OUT2 signal center voltage 24 28 26 BIAS OUT3 Inputs OUT3 signal center voltage 28 34 34 BIAS OUT4 200 Inputs OUT4 signal center voltage 36 36 20µ 38 BIAS OUT5 Inputs OUT5 signal center voltage GND 38 BIAS OUT6 12 Vcc1 15.5V Power supply for level shifter and S/H circuit 22 Vcc3 5.0V 5V system power supply 32 Vcc2 15.5V 9 GND Output driver power supply GND∗3 10 GND 11 GND 29 GND 30 GND GND∗3 GND∗3 31 GND GND∗3 Inputs OUT6 signal center voltage GND∗3 GND∗3 ∗2 Power consumption varies depending on the output signal when driving load capacitance. Be careful not to go over the package allowable power dissipation. ∗3 Pins 9 to 11 and 29 to 31 must be connected to GND potential; they must not be open. –4– CXA2504N Electrical Characteristics Unless otherwise specified: Vcc1 = Vcc2 = 15.5V, Vcc3 = 5.0V, Ta = 25°C SW1 → b, SW2 → b, SW3 → b, SW4 → b, SW5 → a, SW6 → a, SW7 → b, SW8 → a, SW13 → a, SW14 → b, SW15 → a, SW16 → a, SW18 → b, SW19 → b, SW20 → b, SW21 → b, SW24 → b, SW26 → b, SW28 → b, SW34 → b, SW36 → b, SW38 → b, SW40 → b V1 = 5V, V2 = 5V, V3 = 5V, V18 = 5V, V19 = 5V, V20 = 5V, V21 = 5V, V40 = 5V, CL = 300pF No. Item Symbol Measurement conditions Min. Typ. Max. Unit — 17 24 mA — 8 14 mA — 12 17 mA 1 Current consumption (1) Icc1 2 Current consumption (2) Icc2 3 Current consumption (3) Icc3 4 SH4 “H” pin current I1H SW1 → b, V1 = 5V –0.1 0 0.1 µA 5 SH4 “L” pin current I1L SW1 → b, V1 = 0V –12 –5.0 — µA 6 SH5 “H” pin current I2H SW2 → b, V2 = 5V –0.1 0 0.1 µA 7 SH5 “L” pin current I2L SW2 → b, V2 = 0V –12 –5.0 — µA 8 SH6 “H” pin current I3H SW3 → b, V3 = 5V –0.1 0 0.1 µA 9 SH6 “L” pin current I3L SW3 → b, V3 = 0V –12 –5.0 — µA 10 BIAS IN56 pin current I4 SW4 → a, V4 = 7V –0.2 0 0.2 µA 11 IN6 pin current I5 SW5 → b, V5 = 7V — 0.5 2.0 µA 12 IN5 pin current I6 SW6 → b, V6 = 7V — 0.5 2.0 µA 13 BIAS IN34 pin current I7 SW7 → a, V7 = 7V –0.2 0 0.2 µA 14 IN4 pin current I8 SW8 → b, V8 = 7V — 0.5 2.0 µA 15 IN3 pin current I13 SW13 → b, V13 = 7V — 0.5 2.0 µA 16 BIAS IN12 pin current I14 SW14 → a, V14 = 7V –0.2 0 0.2 µA 17 IN2 pin current I15 SW15 → b, V15 = 7V — 0.5 2.0 µA 18 IN1 pin current I16 SW16 → b, V16 = 7V — 0.5 2.0 µA 19 SH1 “H” pin current I18H SW18 → b, V18 = 5V –0.1 0 0.1 µA 20 SH1 “L” pin current I18L SW18 → b, V18 = 0V –12 –5 — µA 21 SH2 “H” pin current I19H SW19 → b, V19 = 5V –0.1 0 0.1 µA 22 SH2 “L” pin current I19L SW19 → b, V19 = 0V –12 –5 — µA 23 SH3 “H” pin current I20H SW20 → b, V20 = 5V –0.1 0 0.1 µA 24 SH3 “L” pin current I20L SW20 → b, V20 = 0V –12 –5 — µA 25 SH7 “H” pin current I21H SW21 → b, V21 = 5V –0.1 0 0.1 µA 26 SH7 “L” pin current I21L SW21 → b, V21 = 0V –12 –5 — µA 27 BIAS OUT1 pin current I24 SW24 → a, V24 = 7V –0.2 0 0.2 µA 28 BIAS OUT2 pin current I26 SW26 → a, V26 = 7V –0.2 0 0.2 µA 29 BIAS OUT3 pin current I28 SW28 → a, V28 = 7V –0.2 0 0.2 µA 30 BIAS OUT4 pin current I34 SW34 → a, V34 = 7V –0.2 0 0.2 µA 31 BIAS OUT5 pin current I36 SW36 → a, V36 = 7V –0.2 0 0.2 µA SW5 → b, SW6 → b, SW8 → b, SW13 → b, SW15 → b, SW16 → b, V1 = V6 = V8 = V13 = V15 = V16 = 7V –5– CXA2504N No. Item Symbol Measurement conditions Min. Typ. Max. Unit 32 BIAS OUT6 pin current I38 SW38 → a, V38 = 7V –0.2 0 0.2 µA 33 SH8 “H” pin current I40H SW40 → b, V40 = 5V –0.1 0 0.1 µA 34 SH8 “L” pin current I40L SW40 → b, V40 = 0V –12 –5 — µA 35 I SH pin voltage V17 — 1.2 — V 36 I DR pin voltage V39 — 1.2 — V ∆VO Set SW5 → b, SW6 → b, SW8 → b, SW13 → b, SW15 → b, SW16 → b, V5 = V6 = V8 = V13 = V15 = V16 = 2V, 7V, 11.5V. Measure output DC voltage for TP23, TP25, TP27, TP33, TP35 and TP37 relative to each input DC voltage. ∆VO = MAX (output voltage – input voltage) – MIN (output voltage – input voltage) — — 25 mV ∆Vd Set SW4 → a, SW5 → b, SW6 → b, SW7 → a, SW8 → b, SW13 → b, SW14 → a, SW15 → b, SW16 → b, SW24 → a, SW26 → b, SW28 → b, SW34 → b, SW36 → b, SW38 → b, V4 = V7 = V14 = V24 = V26 = V28 = V34 = V36 = V38 = 7V, V5 = V6 = V8 = V13 = V15 = V16 = 2V, 11.5V. Measure output DC voltage for TP23, TP25, TP27, TP33, TP35 and TP37 relative to each input DC voltage. ∆Vdmax = MAX (output voltage (11.5V input) – output voltage (2.0V input)) ∆Vdmin = MIN (output voltage (11.5V input) – output voltage (2.0V input)) And, calculate the difference between channels of its voltage difference. ∆Vd =∆Vdmax – ∆Vdmin — — 25 mW GIO Set SW4 → a, SW7 → a, SW14 → a, SW24 → a, SW26 → a, SW28 → a, SW34 → a, SW36 → a, SW38 → a, V4 = V7 = V14 = V24 = V26 = V28 = V34 = V36 = V38 = 7V. –0.5 Input SG1 to (IN1) to (IN6) and measure gain between input and output for TP23, TP25, TP27, TP33, TP35 and TP37 (refer to output waveforms (1)). –0.1 — dB RTSH1 Set SW1 → a, SW2 → a, SW3 → a, SW4 → a, SW7 → a, SW14 → a, SW18 → a, SW19 → a, SW20 → a, SW24 → a, SW26 → a, SW28 → a, SW34 → a, SW36 → a, SW38 → a, V4 = V7 = V14 = V24 = V26 = V28 = V34 = V36 = V38 = 7V, (SH1) to (SH6) = SG4. Input SG2 and SG3 to (IN1) to (IN6) and measure output waveform (2) V for TP23, TP25, TP27, TP33, TP35 and TP37. V RTSH1 = (V/µs) 15 × 10–3 220 280 — V/µs RTSH2 Set SW4 → a, SW7 → a, SW14 → a, SW21 → a, SW24 → a, SW26 → a, SW28 → a, SW34 → a, SW36 → a, SW38 → a, SW40 → a, V4 = V7 = V14 = V24 = V26 = V28 = V34 = V36 = V38 = 7V, (SH7) = (SH8) = SG4. Input SG2 and SG3 to (IN1) to (IN6) and measure output waveform (2) V for TP23, TP25, TP27, TP33, TP35 and TP37. V RTSH2 = (V/µs) 15 × 10–3 220 280 — V/µs 37 38 39 40 41 Output potential difference between channels Gain difference between channels Input/output gain Sample-and-hold slew rate (1) Sample-and-hold slew rate (2) –6– CXA2504N No. Item Symbol Measurement conditions Min. Typ. Max. Unit — — ±40 mV/ µs RD1 Set SW1 → a, SW2 → a, SW3 → a, SW4 → a, SW5 → b, SW6 → b, SW7 → a, SW8 → b, SW13 → b, SW14 →a, SW15 → b, SW16 → b, SW18 → a, SW19 → a, SW20 → a, SW24 → a, SW26 → a, SW28 → a, SW34 → a, SW36 → a, SW38 → a, V4 = V7 = V14 = V24 = V26 = V28 = V34 = V36 = V38 = 7V, (SH1) to (SH6) = SG5, V5 = V6 = V8 = V13 = V15 = V16 = 2V, 7V, 11.5V. Measure output waveform (3) V for TP23, TP25, TP27, TP33, TP35 and TP37 relative to each input DC. V RD1 = (mV/µs) 10 RD2 Set SW4 → a, SW5 → b, SW6 → b, SW7 → a, SW8 → b, SW13 → b, SW14 → a, SW15 → b, SW16 → b, SW21 → a, SW24 → a, SW26 → a, SW28 → a, SW34 → a, SW36 → a, SW38 → a, SW40 → a, V4 = V7 = V14 = V24 = V26 = V28 = V34 = V36 = V38 = 7V, (SH7) = (SH8) = SG5, V5 = V6 = V8 = V13 = V15 = V16 = 2V, 7V, 11.5V. Measure output waveform (3) V for TP23, TP25, TP27, TP33, TP35 and TP37 relative to each input DC. V RD2 = (mV/µs) 10 — — ±40 mV/ µs RTDR Set SW4 → a, SW7 → a, SW14 → a, SW21 → a, SW24 → a, SW26 → a, SW28 → a, SW34 → a, SW36 → a, SW38 → a, SW40 → a, V4 = V7 = V14 = V24 = V26 = V28 = V34 = V36 = V38 = 7V, (SH7) = (SH8) = SG8. Input SG6 and SG7 to (IN1) to (IN6) and measure output waveform (4) t and V for TP23, TP25, TP27, TP33, TP35 and TP37. V × 0.8 RTDR = (V/µs) t 130 190 — V/µs tPLH (H) tPHL (H) tPLH (L) tPHL (L) Set SW4 → a, SW7 → a, SW14 → a, SW21 → a, SW24 → a, SW26 → a, SW28 → a, SW34 → a, SW36 → a, SW38 → a, SW40 → a, V4 = V7 = V14 = V24 = V26 = V28 = V34 = V36 = V38 = 7V, (SH7) = (SH8) = SG8. Input SG6 and SG7 to (IN1) to (IN6) and for each of the four conditions for input signal rise and fall, measure output waveform (4) tP for TP23, TP25, TP27, TP33, TP35 and TP37. 13 17 21 ns 46 Input → output propagation delay time tDLH (H) tDHL (H) tDLH (L) tDHL (L) Set SW4 → a, SW7 → a, SW14 → a, SW24 → a, SW26 → a, SW28 → a, SW34 → a, SW36 → a, SW38 → a, V4 = V7 = V14 = V24 = V26 = V28 = V34 = V36 = V38 = 7V, CL = 0pF. Input SG9 and SG10 to (IN1) to (IN6) and for each of the four conditions for input signal rise and fall, measure output waveform (5) tD for TP23, TP25, TP27, TP33, TP35 and TP37. 7 10 13 ns 47 Input dynamic range VDIN 2.0 — 11.5 V 42 43 44 45 Sample-and-hold droop rate (1) Sample-and-hold droop rate (2) Driver slew rate SH7, SH8 → output propagation delay time –7– CXA2504N 11.5V Input waveform SG1 30µs 30µs 2V approx. 11.5V measurement level Output waveform (1) approx. 2V 11.5V Input signal SG2 6.5V 7V Input signal SG3 2V 5V Input signal SG4 0 15ns Output waveform (2) 75ns measurement level V Sample-and-hold slew rate = measurement level V V 15 × 10–3 SG2 and SG3 must change completely within SG4 “L” interval. –8– CXA2504N 5V Input signal SG5 0V 20µs 10µs 5µs Output waveform (3) 20µs measurement level V droop rate = V (mV/µs) 10 11.5V Input signal SG6 8V 5.5V Input signal SG7 2V 5V Input signal SG8 50% 50% 0V 15ns 75ns measurement level propagation delay time tp 90% Output waveform (4) 50% 10% 50% measurement level t Slew rate = V × 0.8 t SG5 and SG6 must change completely within SG7 “L” interval. –9– measurement level V CXA2504N 11.5V SG9 tr, tf = 1ns 8V 5.5V SG10 tr, tf = 1ns 50% 50% 2V 30µs 30µs measurement level tD Output waveform (5) 50% – 10 – CXA2504N Electrical Characteristics Measurement Circuit (a) (SH4) V1 (SH5) V2 (SH6) V3 V4 (IN6) (IN5) (IN4) 390k (a) V5 V6 (b) SW5 (a) (b) SW6 V7 390k (a) V8 (b) SW8 (b) (a) (b) (a) (b) (a) SW1 40 1 TP39 SW2 SW3 SW4 2 39 38 3 SW38 390k 0.1µ (a) SW7 390k 0.1µ 5 36 SW36 CL 7 34 SW34 (b) SW13 (a) (IN2) V14 390k (b) SW15 (a) V15 (IN1) (b) V16 9 32 10 31 11 30 12 29 13 28 SW16 390k 0.1µ (a) (b) 390k SW14 (SH2) (SH3) (a) V36 (b) 0.1µ 390k (a) V34 (b) 0.1µ 390k TP37 TP35 TP33 VCC2 0.1µ 390k 0.1µ 390k 0.1µ SW28 (a) V28 (b) 0.1µ 390k 27 14 CL 26 15 SW26 (a) V26 (b) 0.1µ 390k 25 16 TP27 TP25 CL 22k (SH1) 0.1µ 390k 10µ 10µ V13 V38 CL (a) (IN3) (b) 33 8 (SH8) (b) 47k 35 6 0.1µ VCC1 V40 37 4 CL 390k 0.1µ (a) 0.01µ (a) (b) 390k (b) 390k SW40 17 TP17 0.01µ (a) SW18 18 V18 (b) (a) SW19 19 V19 (b) (a) SW20 20 V20 (b) 24 SW24 (a) V24 (b) 0.1µ 390k 23 TP23 CL VCC3 22 0.1µ 21 (a) 10µ SW21 – 11 – V21 (b) (SH 7) CXA2504N Application Circuit Resample-and-hold pulse input 0.01µ 1 40 2 39 3 38 4 37 CH6 input 5 36 CH5 input 6 35 7 34 8 33 CH4 output 9 32 15.5V 10 31 11 30 12 29 13 28 14 27 CH2 input 15 26 CH1 input 22k 16 25 17 24 18 23 CH1 output 19 22 5.0V 20 21 Sample-and-hold pulse input 47k 390k ∗2 CH6 output 390k 0.01µ CH4 input 15.5V CH3 input 390k 1µ ∗1 1µ ∗1 CH3 output 390k 1µ ∗1 CH2 output 390k Sample-and-hold pulse input 1µ ∗1 CH5 output 390k 0.01µ 1µ ∗1 1µ ∗1 Resample-and-hold pulse input ∗1 Use a ceramic capacitor with low leak. ∗2 Adjust to CH1 to 6 input signal DC voltage (within ±150mV). Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. – 12 – CXA2504N Package Outline Unit: mm 40PIN SSOP(PLASTIC) S 8.4 ± 0.4 *6.3 ± 0.2 0.12 M A (1.05) 20 1 (6.95) 21 40 0.3 ± 0.1 0.65 (1.05) ∗13.5 ± 0.2 0.15 ± 0.05 0.1 S 1.45 ± 0.2 0.65 (1.05) 0.1 ± 0.1 0° to 10° DETAIL A NOTE : ‘‘*’’ Dimensions do not include mold protrusion. PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN LEAD TREATMENT SOLDER PLATING EIAJ CODE LEAD MATERIAL COPPER ALLOY JEDEC CODE PACKAGE WEIGHT 0.3g SONY CODE SSOP-40P-L111 – 13 – S