HV3922 High Voltage PIN Diode Driver Ordering Information Package Device 20 Pin Ceramic DIP 28 Pin Ceramic J-Lead HV3922 HV3922C HV3922DJ Features General Description ❏ Processed with HVCMOS® technology The HV3922 is a monolithic high-voltage quad-output driver that is designed to be used in conjunction with the Supertex VN2222NC*, a separate N-channel DMOS FET quad array, whose device characterics are briefly described below. Together, these devices per-form a 220V push-pull function that is especially suited for driving PIN diodes in applications such as frequency-hopping radios, microwave communication systems and phased array radar. ❏ 5V CMOS logic – low power dissipation ❏ DMOS output voltage up to 220V ❏ Low power level shifting – 5V to 220V ❏ Source current 1.7mA ❏ Output fault detection ❏ Latched data output Absolute Maximum Ratings Supply Voltage, VCC -0.5V to +7.0V Logic Input Voltage -0.3V to VCC + 0.3V Supply Voltage VLL -5.0V Supply Voltage VPP +230V Max Power Dissipation Junction Temperature 0.8W +150 °C Storage Temperature Range -65 °C to +150 °C Operating Temperature Range -55 °C to +125 °C Lead Soldering Temperature for 10 Seconds Used as a microwave or RF switch, the HV3922 has 4 highvoltage P-channel outputs: PD0, PD1, PD2 and PD3. Additional controls are Chip Select (CS) and Output Enable (OE) functions. The HV3922 also has an output fault detection function that protects the outputs from damage by putting them into a high impedance state when a short is detected. The HV3922 provides 4 low-voltage outputs—DRV0, DRV1, DRV2 and DRV3—that drive the gates of the 4 N-channel FETs in the VN2222NC device. See the diagram below for an example of the push-pull output structure that these two devices provide. For detailed electrical characteristics of the VN2222NC, please see the data sheet in Chapter 8. Currently, the HV3922 is available in through-hole and surface-mount ceramic packages that are suitable for military applications, while the VN2222NC is offered in ceramic quad and discrete packages (VN2224N2 and VN2224N3). For commercial product availability, please consult the factory. +300 °C Push-Pull Configuration VHIGH VCC FAULT CS HV39 PD0 • • PD3 OE 4 * VN2222NC is an N-channel DMOS FET quad array recommended for use in conjunction with HV39 outputs to form four 220V push-pull outputs. Each of the four devices has a max RDS(ON) of 1.25Ω, min ID(ON) of 5.0 amps, and BVDSS of 220V. 220V Push-Pull Output ENA 5V Digital Control D0 – D3 GND DRV0 • • DRV3 *VN2222NC (1 of 4 FETs) VLL VLL 12/13/01 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to 1 workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website. HV3922 Electrical Characteristics (over recommended operating conditions unless noted) DC Characteristics Symbol Parameter Min Max Units Conditions ICCQ Maximum Quiescent VCC Supply Current 1.0 mA VCC = 5.5V All ouputs open ILLQ Maximum Quiescent VLL Supply Current 4.0 mA VLL= -3.5V DRV(N) high or low IPPQ Maximum Quiescent VPP Supply Current 100 µA VPP = 220V PD(N) high or low IIH High-level logic current 10 µA H = VCC IIL Low-level logic current 10 µA L = 0V VFH Minimum high-level logic output voltage (fault detect) V VCC = 4.5V, IOH = 20µA VFL Maximum low-level logic output voltage (fault detect) V VCC = 5.5V, IOL =-20µA VDH Minimum PD(N) high-level output voltage 198 V VPP = 203V, IOH=1.7mA VDH Minimum DRV(N) high-level output voltage 4 V VCC = 4.5V, IOH=100µA VDL Maximum DRV(N) low-output voltage V VLL = -2.5V, IDL = -500µA VTH(min) Minimum fault threshold for PD(N) output high 0.5 x VPP fault V PD(N) = HIGH, OE = VCC VTH(max) Maximum fault threshold for PD(N) output high 0.85 x VPP fault V PD(N) = HIGH, OE = VCC VTL(min) Minimum fault threshold for PD(N) output Hi-Z V(PDN) = 0V V PD(N) = Hi-Z, OE = VCC VTL(max) Maximum fault threshold for PD(N) output Hi-Z V PD(N) = Hi-Z, OE = VCC 4.4 0.1 -2.3 V(PDN) = 25 AC Characteristics (over recommended operating conditions unless noted) Symbol Parameter Min Max Units Conditions tWCS Minimum CS pulse to latch data 100 ns VCC= 4.5V, ENA = 0V tWENA Minimum ENA pulse width to latch data 100 ns VCC= 4.5V, CS = 0V tWOE OE pulse width 10 50 µs VCC= 4.5V, OE = 0V, VPP = 220V PD(N) LOAD = 20K to GND 16 50 µs VPP = 220V, PD(N) LOAD = 20K and 3000pF to GND 0 200 ns VCC= 4.5V TT Input transition rise and fall times TSU1 Minimum set-up time DN and CS to ENA 150 ns VCC= 4.5V TSU2 Minimum set-up time ENA to OE falling edge 150 ns VCC= 4.5V TH Minimum hold time 5 ns VCC= 4.5V CIN Maximum input capacitance 10 pF Not tested, reference only TO PD(N) transition time from OE low to PD(N) high/low 50 µs VPP = 220V PD(N) output loaded by 20K ohms & 3000pF to GND 1 2 HV3922 Recommended Operating Conditions Symbol Parameter Min Max Units VCC Logic Supply Voltage 4.5 5.5 V VIN DC Logic Input Voltage 0 VCC V VLL VLL Supply Voltage -3.5 -2.5 V VPP VPP Supply Voltage 200 220 V IPD(N)H High-State Continuous PD(N) Source Current 1.7 mA TA Ambient Operating Temp -55 +125 °C CL DRV(N) Load Capacitance 0 0.006 µF Notes: 1.VPP rise time (dv/dt) should be less than 50V/µS. 2.Power-up sequence should be the following: A) Connect ground; B) Apply VCC; C) Apply VLL; D) Apply VPP; E) Set all inputs to a known state. Power-down sequence should be the reverse of the above. Function Table Input Output CS ENA OE Data D(N) VTH Level2 Internal Latch Q(N) PD(N) DRV(N) Fault H X H X Pass Previous State Previous State Previous State VFH X H H X Pass Previous State Previous State Previous State VFH L L H H Pass Set Previous State Previous State VFH L L H L Pass Reset Previous State Previous State VFH L L H>L H P/F Set VDH VDL VFH L L H>L L P/F Reset HI-Z VDH VFH H X H>L X X X H H>L Previous State P/F Set VDH VDL VFH P/F Reset HI-Z VDH VFH X Previous State Pass Set VDH VDL VFH Pass Reset HI-Z VDH VFH X H X Fail — HI-Z VDL VFL X VIH X P/F Set VDH VDL VFH (At Power Up) X Notes: 1. X indicates “Don’t Care” input state (L or H). 2. The output threshold is internally tested for each PD(N) output; the pass condition occurs when OE = H and: A) PD(N) driving high with output > VTH (MAX), or may occurs if PD(N) driving high and output > VTH (MIN) and < VTL (MAX). OR B) PD(N) driving Low with output < VTH (MIN), or may occur if PD(N) driving low and output < VTH (MAX) and < VTL (MIN). The fail condition occurs when OE = H and conditions for “pass” are not satisfied. 3. Fault output = VFL indicates a fault has been detected in at least one of the PD(N) output loads when OE = H. All other outputs shall function normally when a fault condition has been detected for one of the outputs. The Fault output shall remain in the low state, regardless of the state of the output which initiated the fault status, until the next falling edge of OE. Whenever OE = L, the Fault output is forced to VFH, and the fault latch is reset. If the fault condition persists, the fault response repeats each time the OE input is set to H. 4. H>L indicates falling edge (H to L). 5. HI-Z indicates no current is sourced to output PD(N). 6. P/F indicates “Pass” or “Fail” fault threshold conditions. 3 HV3922 Functional Block Diagram VPP VLL VCC GND OE DO V PP Drive Circuit Gate Control Circuit Q FF CLK Set Latch Set Voltage Sense PD0 DRV0 Q Fault 0 ENA CS D1 D2 D3 Q Latch Set FF CLK Set Q Latch Set FF CLK Set Q Latch Set FF CLK Set Q Q Q Drive Circuit 1 PD1 Drive Circuit 2 PD2 Drive Circuit 3 PD3 DRV1 DRV2 DRV3 Fault Power-Up Circuit Timing Diagram DATA LOW and CS 10% 10% tWCS 90% 90% DATA HIGH tSU1 TH 90% ENA 10% 10% tWENA TT TT 90% OE 10% 10% tWOE tSU2 tOH 90% PD(N) 10% DRV(N) 4 HV3922 Pin Configurations Package Outline 20 Pin, 300 Mil Wide Package Pin Function 1 D1 2 D2 3 D3 4 VLL 5 GND 6 DRV3 7 DRV2 8 PD3 9 PD2 10 PD1 Pin 11 12 13 14 15 16 17 18 19 20 Function PD0 DRV1 DRV0 VPP VCC ENA OE CS Fault D0 28 Pin, J-Lead Package Pin Function 1 D1 2 D2 3 D3 4 N/C 5 VLL 6 GND 7 N/C 8 DRV3 9 DRV2 10 N/C 11 PD3 12 N/C 13 PD2 14 N/C Pin 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Function PD1 PD0 N/C DRV1 DRV0 N/C VPP N/C VCC ENA OE CS Fault D0 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 20 Pin, 300 Mil Wide DIP HV3922C 25 24 23 22 21 20 19 26 18 27 17 28 16 1 15 2 14 3 13 4 12 5 6 7 8 9 10 11 28 Pin J-Lead Package HV3922DJ 20 Pin, 300 Mil Wide Package Pin Function 1 S 2 S 3 S 4 G1 5 G2 6 G3 7 G4 8 S 9 S 10 S Pin 11 12 13 14 15 16 17 18 19 20 Function S S N/C D4 D3 D2 D1 N/C S S 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 20 Pin, 300 Mil Wide DIP VN2222NC 12/13/010 ©2001 Supertex Inc. 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