PRELIMINARY INFORMATION 2-WIRE SERIAL TEMPERATURE SENSOR AND THERMAL MONITOR TCN75 TCN75 2-WIRE SERIAL TEMPERATURE SENSOR AND THERMAL MONITOR FEATURES Solid State Temperature Sensing; 2°C Accuracy (Typ.) Operates from – 55°C to +125°C Operating Range ..................................... 2.7V - 5.5V Programmable Trip Point and Hysteresis with Power-up Defaults Standard 2-Wire Serial Interface Thermal Event Alarm Output Functions as Interrupt or Comparator / Thermostat Output Up to 8 TCN75's May Share the Same Bus Shutdown Mode for Low Standby Power Consumption Low Power ......................... 250µA (Typ.) Operating 1µA (Typ.) Shutdown Mode 8-Pin Plastic DIP, SOIC, and MSOP Packaging ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ TYPICAL APPLICATIONS ■ ■ ■ ■ Thermal Protection for High Performance CPU's Solid-State Thermometer Fire/Heat Alarms Thermal Management in Electronic Systems: Computers Telecom Racks Power Supplies / UPS* / Amplifiers Copiers / Office Electronics Consumer Electronics Process Control ■ ■ ■ perature exceeds a user-programmed setpoint. Hysteresis is also programmable. The INT/CMPTR output is programmable as either a simple comparator for thermostat operation or as a temperature event interrupt. Communication with the TCN75 is accomplished via a two-wire bus that is compatible with industry standard protocols. This permits reading the current temperature, programming the setpoint and hysteresis, and configuring the device. The TCN75 powers up in Comparator Mode with a default setpoint of 80°C with 5°C hysteresis. Defaults allow independent operation as a stand-alone thermostat. A shutdown command may be sent via the 2-wire bus to activate the low-power standby mode. Address selection inputs allow up to eight TCN75's to share the same 2-wire bus for multi-zone monitoring. All registers can be read by the host and the INT/ CMPTR output's polarity is user programmable. Both polled and interrupt driven systems are easily accommodated. Small physical size, low installed cost, and ease of use make the TCN75 an ideal choice for implementing sophisticated system management schemes. ORDERING INFORMATION Supply Voltage (V) Package Part No. The TCN75 is a serially programmable temperature sensor that notifies the host controller when ambient tem- TCN75-3.3MOA TCN75-5.0MOA TCN75-3.3MPA TCN75-5.0MPA TCN75-3.3MUA TCN75-5.0MUA FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATIONS GENERAL DESCRIPTION 3.3 5.0 3.3 5.0 3.3 5.0 8-Pin SOIC 8-Pin SOIC 8-Pin PDIP 8-Pin PDIP 8-MSOP 8-MSOP Junction Temp. Range – 55°C to +125°C – 55°C to +125°C – 55°C to +125°C – 55°C to +125°C – 55°C to +125°C – 55°C to +125°C 8-Pin Plastic DIP INT/CMPTR 9 Bit ∆Σ A/D Converter VDD Temp Sensor Control Logic SDA 1 SCL 2 INT/CMPTR 3 GND 4 8 TCN75MPA 7 A0 6 A1 5 A2 Register Set Configuration TSET Temperature THYST VDD SCL 2 8-Pin SOIC SDA SCL A0 A1 A2 TCN75-04 6/16/97 Two Wire Serial Port Interface SDA 1 SCL 2 INT/CMPTR 3 GND 4 INT/CMPTR 3 8 VDD 7 A0 6 A1 5 A2 TCN75 1 TelCom Semiconductor reserves the right to make changes in the circuitry and specifications of its devices. 8-Pin MSOP SDA 1 TCN75MOA GND 4 TCN75MUA 8 VDD 7 A0 6 A1 5 A2 2-WIRE SERIAL TEMPERATURE SENSOR AND THERMAL MONITOR PRELIMINARY INFORMATION TCN75 ABSOLUTE MAXIMUM RATINGS* Lead Temperature (Soldering, 10 sec) ................. +300°C Thermal Resistance (Junction to Ambient) 8-Pin DIP ...................................................... 110°C/W 8-Pin SOIC .................................................. 170°C/W 8-Pin MSOP ................................................ 250°C//W Supply Voltage (VDD) .................................................6.0V ESD Susceptibility (Note 2) ..................................... (TBD) Voltage on Any Pin ............. (GND – 0.3V) to (VDD + 0.3V) Operating Temperature Range (TJ) ...... – 55°C to +125°C Storage Temperature Range (TSTG) ..... – 65°C to +150°C *This is a stress rating only and functional operation of this device at these or any other conditions above those indicated in the operations sections of this specification is not implied. ELECTRICAL CHARACTERISTICS: VDD = 2.7V – 5.5V, – 55°C ≤ (TA = TJ) ≤ 125°C, unless otherwise noted. Symbol Parameter Test Conditions Min Typ Max Unit Serial Port Inactive (TA = TJ = 25°C) Serial Port Active Shutdown Mode, Serial Port Inactive 2.7 — — — — 0.250 — 1 5.5 — 1.0 — V mA Note 1 — 1 4 mA User Programmable IOL = 4.0mA 1 — — — 6 0.8 tCONV V – 55°C ≤ TA ≤ +125°C VDD = 3.3V : TCN75-3.3MOA, TCN75-3.3MPA, TCN75-3.3MUA VDD = 5.0V: TCN75-5.0MOA, TCN75-5.0MPA, TCN75-5.0 MUA 25°C ≤ TA ≤ 100°C — ±3 — °C — — — — ±0.5 100 80 75 ±2 — — — °C msec °C °C VDD x 0.7 — — — — — — — — 15 ±100 — — VDD x 0.3 0.4 — — 6 Power Supply VDD IDD Power Supply Voltage Operating Current IDD1 Standby Supply Current µA (TA = TJ = 25°C) INT/CMPTR Output IOL tTRIP VOL Sink Current: INT/CMPTR, SDA Outputs INT/CMPTR Response Time Output Low Voltage Temp-to-Bits Converter ∆T Temperature Accuracy (Note 2) tCONV TSET(PU) THYST(PU) Conversion Time TEMP Default Value THYST Default Value Power Up Power Up 2-Wire Serial Bus Interface VIH VIL VOL CIN ILEAK IOL(SDA) Logic Input High Logic Input Low Logic Output Low Input Capacitance SDA, SCL I/O Leakage SDA Output Low Current IOL = 3mA (TA = TJ = 25°C) V V V pF pA mA SERIAL PORT TIMING: 2.7V ≤ VDD ≤ 5.5V; – 55°C ≤ (TA = TJ ) ≤ 125°C, CL = 80pf, unless otherwise noted. Symbol Parameter fSC tLOW tHIGH tR tF tSU(START) Serial Port Frequency Low Clock Period High Clock Period SCL and SDA Rise Time SCL and SDA Fall Time Start Condition Setup Time (for repeated Start Condition) TCN75-04 6/16/97 Test Conditions 2 Min Typ Max Unit 0 1250 1250 — — 1250 100 — — — — — 400 — — 250 250 — kHz nsec nsec nsec nsec nsec PRELIMINARY INFORMATION 2-WIRE SERIAL TEMPERATURE SENSOR AND THERMAL MONITOR TCN75 SERIAL PORT TIMING (Cont.): 2.7V ≤ VDD ≤ 5.5V; – 55°C ≤ (TA = TJ ) ≤ 125°C, CL = 80pf, unless otherwise noted. Symbol Parameter Test Conditions tH(START) tDSU tDH tSU(STOP) tIDLE Start Condition Hold Time Data in Setup Time to SCL High Data in Hold Time after SCL Low Stop Condition Setup Time Bus Free Time Prior to New Transition Min Typ Max Unit 1250 100 0 1250 1250 — — — — — — — — — — nsec nsec nsec nsec nsec NOTES: 1. Output current should be minimized for best temperature accuracy. Power dissipation within the TCN75 will cause self-heating and temperature drift. At maximum rated output current and saturation voltage, 4mA and 0.8V, respectively, the error amounts to 0.352°C for the PDIP, and 0.544°C for the SOIC. 2. All part types of the TCN75 will operate properly over the wider power supply range of 2.7V to 5.5V. Each part type is tested and specified for rated accuracy at its nominal supply voltage. As VDD varies from the nominal value, accuracy will degrade 1°C/V of VDD change. 3. Human body model, 100pF discharged through a 1.5k resistor, machine model, 200pF discharged directly into each pin. PIN DESCRIPTION Pin Number Symbol 1 2 3 4 5 6 7 8 SDA SCL INT/CMPTR GND A2 A1 A0 VDD Description Bidirectional Serial Data. Serial Data Clock Input. Interrupt or Comparator Output. System Ground. Address Select Pin (MSB). Address Select Pin. Address Select Pin (LSB). Power Supply Input. output is unconditionally reset upon entering Shutdown Mode. If programmed as an active-low output, it can be wire-ORed with any number of other open collector devices. Most systems will require a pull-up resistor for this configuration. Note that current sourced from the pull-up resistor causes power dissipation and may cause internal heating of the TCN75. To avoid affecting the accuracy of ambient temperature readings, the pull-up resistor should be made as large as possible. INT/CMPTR's output polarity may be programmed by writing to the INT/CMPTR POLARITY bit in the CONFIG register. The default is active low. DETAILED DESCRIPTION A typical TCN75 hardware connection is shown in Figure 1. Serial Data (SDA) Bidirectional. Serial data is transferred in both directions using this pin. Serial Clock (SCL) Input. Clocks data into and out of the TCN75. INT/CMPTR Open Collector, Programmable Polarity. In Comparator Mode, unconditionally driven active any time temperature exceeds the value programmed into the TSET register. INT/ CMPTR will become inactive when temperature subsequently falls below the THYST setting. (See Register Set and Programmer's Model.) In Interrupt Mode, INT/CMPTR is also made active by TEMP exceeding TSET; it is unconditionally reset to its inactive state by reading any register via the 2-wire bus. If and when temperature falls below THYST, INT/ CMPTR is again driven active. Reading any register will clear the THYST interrupt. In Interrupt Mode, the INT/CMPTR TCN75-04 6/16/97 Address (A2, A1, A0) Inputs. Sets the three least significant bits of the TCN75 8-bit address. A match between the TCN75's address and the address specified in the serial bit stream must be made to initiate communication with the TCN75. Many protocolcompatible devices with other addresses may share the same 2-wire bus. Slave Address The four most significant bits of the Address Byte (A6, A5, A4, A3) are fixed to 1001[B]. The states of A2, A1 and 3 2-WIRE SERIAL TEMPERATURE SENSOR AND THERMAL MONITOR PRELIMINARY INFORMATION TCN75 A0 in the serial bit stream must match the states of the A2, A1 and A0 address inputs for the TCN75 to respond with an Acknowledge (indicating the TCN75 is on the bus and ready to accept data). The Slave Address is represented by: Serial Port Operation The Serial Clock input (SCL) and bidirectional data port (SDA) form a 2-wire bidirectional serial port for programming and interrogating the TCN75. The following conventions are used in this bus scheme: TCN75 Slave Address 1 MSB 0 0 1 A2 A1 A0 LSB TCN75 Serial Bus Conventions Comparator/Interrupt Modes INT/CMPTR behaves differently depending on whether the TCN75 is in Comparator Mode or Interrupt Mode. Comparator Mode is designed for simple thermostatic operation. INT/CMPTR will go active anytime TEMP exceeds TSET. When in Comparator Mode, INT/CMPTR will remain active until TEMP falls below THYST, whereupon it will reset to its inactive state. The state of INT/CMPTR is maintained in shutdown mode when the TCN75 is in comparator mode. In Interrupt Mode, INT/CMPTR will remain active indefinitely, even if TEMP falls below THYST, until any register is read via the 2-wire bus. Interrupt Mode is better suited to interrupt driven microprocessor-based systems. The INT/ CMPTR output may be wire-OR'ed with other interrupt sources in such systems. Note that a pull-up resistor is necessary on this pin since it is an open-drain output. Entering Shutdown Mode will unconditionally reset INT/ CMPTR when in Interrupt Mode. Explanation Transmitter Receiver Master The device sending data to the bus. The device receiving data from the bus. The device which controls the bus: initiating transfers (START), generating the clock, and terminating transfers (STOP). The device addressed by the master. A unique condition signaling the beginning of a transfer indicated by SDA falling (High-Low) while SCL is high. A unique condition signaling the end of a transfer indicated by SDA rising (Low - High) while SCL is high. A Receiver acknowledges the receipt of each byte with this unique condition. The Receiver drives SDA low during SCL high of the ACK clock-pulse. The Master provides the clock pulse for the ACK cycle. Slave Start Stop ACK NOT Busy Data Valid SHUTDOWN MODE When the appropriate bit is set in the configuration register (CONFIG) the TCN75 enters its low-power shutdown mode (IDD = 1µA, typical) and the temperature-todigital conversion process is halted. The TCN75's bus interface remains active and TEMP, TSET, and THYST may be read from and written to. Transitions on SDA or SCL due to external bus activity may increase the standby power consumption. If the TCN75 is in Interrupt Mode, the state of INT/ CMPTR will be RESET upon entering shutdown mode. When the bus is idle, both SDA & SCL will remain high. The state of SDA must remain stable during the High period of SCL in order for a data bit to be considered valid. SDA only changes state while SCL is low during normal data transfers. (See Start and Stop conditions) All transfers take place under control of a host, usually a CPU or microcontroller, acting as the Master, which provides the clock signal for all transfers. The TCN75 always operates as a Slave. This serial protocol is illustrated in Figure 2. All data transfers have two phases; and all bytes are transferred MSB first. Accesses are initiated by a start condition (START), followed by a device address byte and one or more data bytes. The device address byte includes a Read/Write selection bit. Each access must be terminated by a Stop Condition (STOP). A convention called Acknowledge (ACK) confirms receipt of each byte. Note that SDA can change only during periods when SCL is LOW (SDA changes while SCL is HIGH are reserved for Start and Stop Conditions). Fault Queue To lessen the probability of spurious activation of INT/ CMPTR the TCN75 may be programmed to filter out transient events. This is done by programming the desired value into the Fault Queue. Logic inside the TCN75 will prevent the device from triggering INT/CMPTR unless the programmed number of sequential temperature-to-digital conversions yield the same qualitative result. In other words, the value reported in TEMP must remain above TSET or below THYST for the consecutive number of cycles programmed in the Fault Queue. Up to a six-cycle "filter" may be selected. See Register Set and Programmer's Model. TCN75-04 6/16/97 Term Start Condition (START) The TCN75 continuously monitors the SDA and SCL lines for a start condition (a HIGH to LOW transition of SDA while SCL is HIGH), and will not respond until this condition is met. 4 PRELIMINARY INFORMATION 2-WIRE SERIAL TEMPERATURE SENSOR AND THERMAL MONITOR TCN75 over the power supply voltage range of 2.7V to 5.5V, but with a lower measurement accuracy. Figure 2 shows the worst case temperature measurement error for the TCN75CO_-3 operated at a power supply voltage of 5V ± 10%. Figure 3 shows the worst case temperature measurement error for the TCN75CO_-3 operated at a power supply voltage of 3.3V ±10%. Address Byte Immediately following the Start Condition, the host must next transmit the address byte to the TCN75. The four most significant bits of the Address Byte (A6, A5, A4, A3) are fixed to 1001(B). The states of A2, A1 and A0 in the serial bit stream must match the states of the A2, A1 and A0 address inputs for the TCN75 to respond with an Acknowledge (indicating the TCN75 is on the bus and ready to accept data). The eighth bit in the Address Byte is a Read-Write Bit. This bit is a 1 for a read operation or 0 for a write operation. ±5 Acknowledge (ACK) Acknowledge (ACK) provides a positive handshake between the host and the TCN75. The host releases SDA after transmitting eight bits then generates a ninth clock cycle to allow the TCN75 to pull the SDA line LOW to acknowledge that it successfully received the previous eight bits of data or address. ERROR (°0) ±4 ±2 Data Byte After a successful ACK of the address byte, the host must next transmit the data byte to be written or clock out the data to be read. (See the appropriate timing diagrams.) ACK will be generated after a successful write of a data byte into the TCN75. ±1 8 I2C Interface SDA SCL 80 95 110 125 ERROR (°0) ±3 ±2 ±1 0.1µF Recommended Unless Device is Mounted Close to CPU 20 35 50 65 80 95 110 125 TCN75 Case Temeprature (°C) Figure 3. TCN75CO_-5 Measurement Error at VDD = 3.3V ± 10% TO PROCESSOR INT/CMPTR 1 2 4 Figure 1. Typical Application TCN75-04 6/16/97 65 ±4 3 TCN75 50 ±5 +VDD (3V to 5.5V) 7 6 5 35 Figure 2. TCN75CO_-3 Measurement Error at VDD = 5V ± 10% Power Supply To minimize temperature measurement error, the TCN75VO_-3 is factory calibrated at a supply voltage of 3.3V ±5V and the TCN75CO_-5 is factory calibrated at a supply voltage of 5V ±5%. Either device is fully operational A0 Address (Set as Desired) A1 A2 20 TCN75 Case Temeprature (°C) Stop Condition (STOP) Communications must be terminated by a stop condition (a LOW to HIGH transition of SDA while SCL is HIGH). The Stop Condition must be communicated by the transmitter to the TCN75. CBypass ±3 5 2-WIRE SERIAL TEMPERATURE SENSOR AND THERMAL MONITOR PRELIMINARY INFORMATION TCN75 9 1 1 0 Start by Master 0 1 A2 A1 A0 R/W 1 D7 D6 D5 D4 D3 D2 D1 Ack by TCN75 Address Byte 9 Most Significant Data Byte D0 1 9 D7 D6 D5 D4 D3 D2 D1 D0 Ack by Master Stop No Ack Cond by by Master Master Least Significant Data Byte (a) Typical 2-Byte Read From Preset Pointer Location Such as Temp, TOS, THYST 9 1 1 9 ..... 1 0 Start by Master 0 1 A2 A1 A0 R/W 0 0 0 Ack by TCN75 Address Byte 9 0 Repeat Start by Master 0 1 0 0 D1 A2 A1 A0 R/W Ack by TCN75 1 9 D7 D6 D5 D4 D3 D2 D1 D0 Ack by TCN75 Address Byte ..... D0 Pointer Byte 1 1 0 1 D7 D6 D5 D4 D3 D2 D1 D0 Ack by Master Most Significant Data Byte 9 Stop No Ack Cond by by Master Master Least Significant Data Byte (b) Typical Pointer Set Followed by Immediate Read for 2-Byte Register Such as Temp, TOS, THYST 9 1 1 0 Start by Master 0 1 A2 A1 A0 R/W Address Byte 1 9 D7 D6 D5 D4 D3 D2 D1 D0 Ack by TCN75 Stop No Ack Cond by by Master Master Data Byte (c) Typical 1-Byte Read From Configuration Register With Preset Pointer 9 1 1 0 Start by Master 0 1 A2 A1 A0 R/W Address Byte 1 0 9 0 Ack by TCN75 0 0 0 0 0 1 D0 1 9 0 Ack Repeat by Start TCN75 by Master Pointer Byte 0 1 A2 A1 A0 R/W 1 D7 D6 D5 D4 D3 D2 D1 D0 Ack by TCN75 Address Byte 9 Stop No Ack Cond by by Master Master Data Byte (d) Typical Pointer Set Followed by Immediate Read from Configuration Register 9 1 1 0 Start by Master 0 1 A2 A1 A0 R/W Address Byte 1 0 9 0 Ack by TCN75 0 0 0 0 D1 D0 1 0 Ack by TCN75 Pointer Byte 9 0 0 D4 D3 D2 D1 D0 Stop Ack Cond by by TCN75 Master Configuration Byte (e) Configuration Register Write 9 1 1 Start by Master 0 0 1 A2 A1 A0 R/W Address Byte Ack by TCN75 1 0 9 0 0 0 0 Pointer Byte 0 D1 D0 1 9 D7 D6 D5 D4 D3 D2 D1 D0 Ack by TCN75 Most Significant Data Byte (f) TOS and THYST Write Figure 2. Timing Diagrams TCN75-04 6/16/97 6 1 9 D7 D6 D5 D4 D3 D2 D1 D0 Ack by TCN75 Least Significant Data Byte Stop Ack Cond by by TCN75 Master PRELIMINARY INFORMATION 2-WIRE SERIAL TEMPERATURE SENSOR AND THERMAL MONITOR TCN75 REGISTER SET AND PROGRAMMER'S MODEL Configuration Register (CONFIG), 8-bits, Read/Write Register (POINT), 8-bits, Write-only Configuration Register (CONFIG) D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0] Must Be Set To Zero Fault INT/CMPTR. COMP/ ShutQueue POLARITY INT. Down Pointer Register (POINT) D[7] D[6] D[5] D[4] D[3] Must Be Set To Zero D[2] D[1] D[0] Pointer D0: Shutdown: 0 = Normal Operation 1 = Shutdown Mode Register Selection via the Pointer Register: D1 0 0 1 1 D0 0 1 0 1 D1: CMPTR/INT: 0 = Comparator Mode 1 = Interrupt Mode Register Selection TEMP CONFIG THYST TSET D2: INT/CMPTR POLARITY: 0 = Active Low 1 = Active High D3 - D4: Fault Queue: Number of sequential temperatureto-digital conversions with the same result before the INT/CMPTR output is updated: D4 0 0 1 1 TCN75-04 6/16/97 7 D3 0 1 0 1 Number of Conversions 1 (Power-up-default) 2 4 6 2-WIRE SERIAL TEMPERATURE SENSOR AND THERMAL MONITOR PRELIMINARY INFORMATION TCN75 Temperature (TEMP) Register, 16-bits, Read-only The binary value in this register represents ambient temperature following a conversion cycle. Temperature Register (TEMP) D[15] MSB D[14] D7 D[13] D6 D[12] D5 D[11] D4 D[10] D3 D[9] D2 D[8] D1 D[7] LSB D[6] X D[5] X D[4] X D[3] X D[2] X D[1] X D[0] X Temperature Setpoint (TSET) and Hysteresis (THYST) Register, 16-bits, Read-Write: Temperature Setpoint Register (TSET) D[15] MSB D[14] D7 D[13] D6 D[12] D5 D[11] D4 D[10] D3 D[9] D2 D[8] D1 D[7] LSB D[6] X D[5] X D[4] X D[3] X D[2] X D[1] X D[0] X D[11] D4 D[10] D3 D[9] D2 D[8] D1 D[7] LSB D[6] X D[5] X D[4] X D[3] X D[2] X D[1] X D[0] X Hysteresis Register (THYST) D[15] MSB D[14] D7 D[13] D6 D[12] D5 In the TEMP, TSET, and THYST registers, each unit value represents one-half degree (Celsius). The value is in 2's complement binary format such that a reading of 000000000b corresponds to 0°C. Examples of this temperature to binary value relationship are shown in the following table. Temperature to Digital Value Conversion Temperature Binary Value HEX Value +125°C +25°C +0.5°C 0°C – 0.5°C – 25°C – 40°C – 55°C 0 11111010 0 00110010 0 00000001 0 00000000 1 11111111 1 11001110 1 10110000 1 10010010 0FA 032 001 00 1FF 1CE 1B0 192 The TCN75's register set is summarized below Name TEMP TSET THYST POINT CONFIG TCN75-04 6/16/97 Description Ambient Temperature Temperature Setpoint Temperature Hysteresis Register Pointer Configuration Register Width Read 16 16 16 8 8 X X X X X 8 Write X X X X Notes 2's Complement Format 2's Complement Format 2's Complement Format PRELIMINARY INFORMATION 2-WIRE SERIAL TEMPERATURE SENSOR AND THERMAL MONITOR TCN75 PACKAGE DIMENSIONS 8-Pin Plastic DIP PIN 1 .260 (6.60) .240 (6.10) .045 (1.14) .030 (0.76) .070 (1.78) .045 (1.14) .310 (7.87) .290 (7.37) .400 (10.16) .348 (8.84) .200 (5.08) .140 (3.56) .040 (1.02) .020 (0.51) .150 (3.81) .115 (2.92) .110 (2.79) .090 (2.29) .015 (0.38) .008 (0.20) 3°MIN. .400 (10.16) .310 (7.87) .022 (0.56) .015 (0.38) 8-Pin SOIC PIN 1 .157 (3.99) .150 (3.81) .244 (6.20) .228 (5.79) .050 (1.27) TYP. .197 (5.00) .189 (4.80) .069 (1.75) .053 (1.35) .010 (0.25) .007 (0.18) 8°MAX. .018 (0.46) .010 (0.25) .014 (0.36) .004 (0.10) .050 (1.27) .016 (0.40) Dimensions: inches (mm) TCN75-04 6/16/97 9 2-WIRE SERIAL TEMPERATURE SENSOR AND THERMAL MONITOR PRELIMINARY INFORMATION TCN75 8-Pin MSOP PIN 1 .122 (3.10) .114 (2.90) .197 (5.00) .187 (4.80) .026 (0.65) TYP. .122 (3.10) .114 (2.90) .043 (1.10) MAX. .016 (0.40) .010 (0.25) .008 (0.20) .005 (0.13) 6°MAX. .006 (0.15) .002 (0.05) .028 (0.70) .016 (0.40) Dimensions: inches (mm) Sales Offices TelCom Semiconductor 1300 Terra Bella Avenue P.O. Box 7267 Mountain View, CA 94039-7267 TEL: 415-968-9241 FAX: 415-967-1590 E-Mail: [email protected] TCN75-04 6/16/97 TelCom Semiconductor Austin Product Center 9101 Burnet Rd. Suite 214 Austin, TX 78758 TEL: 512-873-7100 FAX: 512-873-8236 10 TelCom Semiconductor H.K. Ltd. 10 Sam Chuk Street, Ground Floor San Po Kong, Kowloon Hong Kong TEL: 852-2324-0122 FAX: 852-2354-9957 Printed in the U.S.A.