WIRELESS COMMUNICATIONS DIVISION TQ5622 DATA SHEET Sleep Control GND 1 16 RF IN 2 15 LNA Out GND 3 14 GND VDD LNA 4 13 MXR RF IN LO IN 5 12 GND Vdd MXR 6 11 IF OUT/Vdd GND 7 10 GND GND 8 9 GND 3V PCS Receiver IC With Power- Down Features Product Description Power-Down, “Sleep” Mode Single 2.8V operation Low-current operation Small QSOP-16 plastic package The TQ5622 is a 3V, RF receiver IC designed specifically for PCS band TDMA applications. It’s RF performance meets the requirements for products designed to the IS-136 TDMA standards. The TQ5622 includes a power–down mode which allows current saving during standby and the non-operating portion of the TDMA pulse. The TQ5622 contains LNA and Mixer circuits matched to the 1900MHz PCS band. The mixer uses a high-side LO frequency. The IF has a usable frequency range of 85 to 150MHz. The LNA Output and Mixer Input ports are internally matched to simplify the design and keep the number of external components to a minimum. The TQ5622 achieves excellent RF performance with low current consumption which gives long standby times in portable applications. The small QSOP-16 package is ideally suited for PCS band mobile phones. Few external components Applications PCS, IS-136 based TDMA Mobile Phones Electrical Specifications1 Parameter Min Frequency 1930 Gain Typ Max Units 1990 MHz 17.5 dB Noise Figure 2.8 dB 3rd -9 dBm 12.0 mA Input Order Intercept DC supply Current Note 1: Test Conditions: Vdd=2.8VDC, Tc=25°C, Filter IL=2.5dB, RF=1960MHz, LO=2095MHz, IF=135MHz, LO input=-7dBm For additional information and latest specifications, see our website: www.triquint.com 1 TQ5622 Data Sheet Electrical Characteristics1,2 Parameter Conditions Min. Typ/Nom Max. Units RF Frequency 1930 1990 MHz LO Frequency 2015 2140 MHz IF Frequency 85 150 MHz LO input level -7 -4 0 dBm Supply voltage 2.7 2.8 4.0 V Gain 16.0 17.5 Gain Variation vs. Temp. -40 to 85 °C Noise Figure 2.8 Input 3rd Order Intercept Return Loss Isolation IF Output Impedance Power Down, “sleep” -11.0 dB +/-2.0 dB 3.5 dB -9 dBm LNA input – with external match 10 dB LNA output 10 dB Mixer RF input, externally matched 10 dB Mixer LO input 10 dB LO to LNA RF in 35 dB LO to IF; after external IF match 40 dB RF to IF; after external IF match 20 dB Vdd = 2.8V; Sleep mode, Device On 500 Ohm Vdd = 2.8V; Sleep mode, Device Off Approx. Open Ohm Vdd = 0V <50 Ohm Device On Voltage Vdd Device Off Voltage 0 Vdd 0 VDC VDC Supply Current, Sleep mode, Device On Tc = + 25 °C 12 15 mA Supply Current, Sleep mode, Device Off Enable voltage = 0, LO Drive off 100 1000 µA 25 +85 °C Operating Temperature, case -40 Note 1: Test Conditions: Vdd=2.8VDC, Filter IL=2.5dB, RF=1960MHz, LO=2095MHz, IF=135MHz, LO input=-7dBm, TC = 25°C, unless otherwise specified. Note 2: Min./Max. limits are at +25°C case temperature unless otherwise specified. Absolute Maximum Ratings Parameter Value Units DC Power Supply 5.0 V Power Dissipation 500 mW Operating Temperature -55 to 100 °C Storage Temperature -60 to 150 °C Signal level on inputs/outputs +20 dBm Voltage to any non supply pin -0.3 to Vdd + 0.3 V 2 For additional information and latest specifications, see our website: www.triquint.com TQ5622 Data Sheet Typical Performance Test Conditions (Unless Otherwise Specified): Vdd=2.8VDC, Tc=25°C, filter IL=2.5dB, RF=1960MHz, LO=2095MHz, IF=135MHz, LO input=-7dBm Gain vs. Vdd vs. Temperature 25 25 20 20 Gain (dB) Gain (dB) Gain vs. Frequency vs. Temperature 15 -40C 10 15 -40C 10 +25C +25C 0 1930 +85C +85C 5 5 0 1940 1950 1960 1970 Frequency (MHz) 1980 1990 2.7 2.8 Input IP3 vs. Frequency vs. Temperature -2 3.1 3.2 3.3 Vdd (volts) -2 +85C 3.6 3.5 3.6 3.5 3.6 +25C Input IP3 (dBm) -4 -40C -6 -8 -4 -40C -6 -8 -10 -12 1940 1950 1960 1970 Frequency (MHz) 1980 1990 2.7 2.8 2.9 NF vs. Frequency vs. Temperature 3 3.1 3.2 3.3 Vdd (volts) 3.4 NF vs. Vdd vs. Temperature 4 6 +85C 5 3.5 +25C 3 -40C NF (dB) 4 3 2.5 2 1.5 2 +85C 1 1 0 1930 3.5 +85C +25C -12 1930 3.4 Input IP3 vs Vdd vs Temperature -10 NF (dB) 3 0 0 Input IP3 (dBm) 2.9 +25C 0.5 -40C 0 1940 1950 1960 1970 Frequency (MHz) 1980 1990 2.7 2.8 2.9 3 3.1 3.2 3.3 Vdd (volts) For additional information and latest specifications, see our website: www.triquint.com 3.4 3 TQ5622 Data Sheet Application/Test Circuit 1 16 2 15 3 14 V LNA 4 13 LO in 5 12 6 11 7 10 8 9 Sleep Mode L1 LNA in L3 F1900 C2 R2 C7 L4 V IF C6 IF out R1 V MX L3 R3 C4 C5 C3 Bill of Material for TQ5622 Receiver Application/Test Circuit* Component Reference Designator Part Number Value Receiver IC U1 TQ5622 Capacitor C1 Not used Capacitor C2 5.6pF 0603 Capacitor C3,C6 1000pF 0603 Capacitor C4 10pF 0603 Capacitor C5 15pF 0603 Capacitor C7 1.0pF 0402 Inductor L1 2.2nH 0603 Inductor L2 150nH 0805 Inductor L3 2.7nH 0603 Inductor L4 3.9nH 0402 Filter F1 1930-1990MHz * May vary due to printed circuit board layout and material. 4 For additional information and latest specifications, see our website: www.triquint.com Size Manufacturer QSOP-16 TriQuint Semiconductor Toyocom TQ5622 Data Sheet presented to the input pin. Highest gain and lowest return loss TQ5622 Product Description occur when Γs is equal to the complex conjugate of the LNA The TQ5622 3V RFIC Downconverter is designed specifically for PCS band TDMA applications. The TQ5622 contains LNA, Mixer and LO buffer circuits matched to the 1900 MHz US PCS frequency band. Any IF frequency may be selected between 85 and 150 MHz. Most RF ports are internally matched to 50 Ω input impedance. A different source reflection coefficient, Γopt, which is experimentally determined, will provide the lowest noise figure, Fmin. The noise resistance, Rn, provides an indication of the sensitivity simplifying the design and minimizing the number of external of the noise performance to changes in Γs as seen by the LNA components. The TQ5622 also includes a power–down mode input. switch which allows current saving during standby and the non- Γopt − ΓS 4 RN ⋅ Z 0 1 + Γopt 2 ⋅ 1 − Γs 2 2 operating portion of the TDMA pulse. FLNA = FMIN + Operation Components such as filters and mixers placed after the LNA Please refer to the test circuit above. degrade the overall system noise figure according to the ( ) following equation: Low Noise Amplifier (LNA) The LNA section of the TQ5622 are cascaded common source FSYSTEM = FLNA + FET’s, see Figure 1. It is designed to operate on DC supply F2 − 1 GLNA voltages from 2.7V to 5V. The source terminal must be FLNA and GLNA represent the linear noise factor and gain of the grounded as close as possible to Pin 1 to avoid significant gain LNA and F2 is the noise factor of the next stage. The system reduction due to degeneration. The LNA requires an input noise figure is a compromise between the highest gain and matching circuit to obtain best noise figure, gain and return loss. minimum noise figure of the LNA. See Table 1 for noise The LNA output is close to 50 Ω for direct connection to a 50 Ω parameters. image reject filter. Table 1. TQ5622 Noise Parameters Vdd LOAD LNA out LNA in Freq. MHz 1930 1960 1990 |Gopt| 0.70 0.70 0.69 / Gopt 97 94 91 Fmin 1.2 1.2 1.2 Rn 17 18 19 LNA Output Match BIAS The output impedance of the LNA was designed for 50Ω. The BIAS internal 50Ω match eliminates the need for external Figure 1. Simplified Schematic of LNA Section components at this port. It also improves IP3 performance and power gain. LNA Input Match The designer can make some Noise Figure and Gain trade off by varying the off chip LNA input matching circuit values and topology. This allows the TQ5622 to be optimized for specific system requirements. The output of the LNA is intended to be connected directly to an image reject filter. Depending on the filter, additional components may be needed to better match to the LNA output. Some image reject filters may require a series inductor to smooth the frequency response and improve overall The LNA gain, noise figure and input return loss are a function performance. of the source impedance (Zs), or reflection coefficient (Γs), For additional information and latest specifications, see our website: www.triquint.com 5 TQ5622 Data Sheet Mixer model and the line length between the mixer input pin and the The mixer of the TQ5622 uses a common source depletion mode MESFET. The mixer is designed to operate on supply filter. In some cases a small inductance can be added between the filter and the mixer input to compensate. With some line voltages from 2.7V to 5V. A 50Ω matched on-chip buffer lengths and filter combinations, no inductor is necessary. amplifier allows direct connection of the LO input to Mixer IF Port commercially available VCO’s with output drive levels as low as The Mixer IF output is an "open-drain" configuration, allowing -7dBm. The LO buffer provides good input match and supplies flexibility in matching to various filter types and various IF the voltage gain needed to drive the mixer FET. The mixer also frequencies. has an "open-drain" IF output which provides flexibility in matching to various IF frequencies and filter impedances, see Figure 2. For evaluation of the LNA and mixer, it is usually necessary to impedance match the IF port to the 50Ω test system. When verifying or adjusting the matching circuit on the prototype circuit LO Bias and Tuning Mixer RF Input Open Drain IF Output board, the LO drive should be injected at pin 5 at the nominal power level of -4 dBm, since the LO level does have an impact on the IF port impedance. There are several networks that can be used to properly match LO Input the IF port to the SAW or ceramic IF filter. The mixer supply voltage is applied through the IF port, so the matching circuit topology must contain either an RF choke or shunt inductor. An Figure 2, Mixer Section LO Input Port The LO input port is matched to 50Ω. This allows the TQ5622 to operate at low LO drivel levels. However, the position of C3 shown in the applications circuit may effect the gain of the LO buffer amplifier, it should be placed as close as practicable to Pin 6. extra DC blocking capacitor is not necessary if the output will be attached directly to a SAW or ceramic bandpass filter. Figure 3 illustrates a shunt L, series C, shunt C IF matching network. It is one of the simplest matching networks and requires the fewest components. DC current can be easily injected through the shunt inductor and the series C provides a DC block, if needed. The shunt C, is used to reduce the LO leakage. The buffer amplifier provides the voltage gain needed to drive 10 pF the gate of the mixer FET while using very little current (approximately 1.5mA). Because of the 50Ω input match of the buffer amplifier and the internal DC blocking capacitor, the system VCO output can be Pin 11 IF out 100nH 15pF Pin 10 1000pF directly connected to the TQ5622 LO input via a 50Ω transmission line with no additional components. V IF Figure 3, IF Output Match, 135 MHz Mixer Input Power down, “sleep” mode TriQuint has found that LO leakage through the Mixer RF input pin, can in some cases, reflect off the SAW image reject filter and return back to the mixer out of phase. This may cause some degradation in conversion gain and system noise figure. Sensitivity to the phenomena depends on the particular filter 6 The power down circuit is used to reduce average power consumption of the receiver in TDMA applications by toggling the receiver on and off within the TDMA receive time slot when no signal is present. The power down circuitry operates through For additional information and latest specifications, see our website: www.triquint.com TQ5622 Data Sheet the incorporation of enhancement-mode FET switches in all DC 16, draws approximately 40uA when 2.8V is applied. Less than paths. Level shifting circuitry is incorporated to provide an 1uA is sourced from the power-down pin when 0V is applied. interface compatible with CMOS logic levels. The entire TQ5622 chip nominally draws 100uA when the power-down pin is at 0V. When the power-down pin is at 2.8V (Vdd), the chip draws nominal specified current. The power-down pin itself, Pin For additional information and latest specifications, see our website: www.triquint.com 7 TQ5622 Data Sheet Package Pinout Sleep Control GND 1 16 RF IN 2 15 LNA Out GND 3 14 GND VDD LNA 4 13 MXR RF IN LO IN 5 12 GND Vdd MXR 6 11 IF OUT/Vdd GND 7 10 GND GND 8 9 GND Pin Descriptions Pin Name Pin # GND, LNA 1 Description and Usage LNA first stage ground connection. Direct connection to ground required. LNA IN 2 LNA RF input. DC blocked. Requires external matching elements for noise match and match to 50Ω GND 3 Ground VDD LNA 4 LNA DC supply voltage. Local external bypass capacitor required. MXR LO IN 5 Mixer LO input. DC blocked, matched to 50Ω VDD_MXR 6 Mixer LO buffer supply voltage. Local external bypass capacitor required. GND 7 Ground GND 8 Ground GND 9 Ground GND 10 Ground IF OUT 11 IF output. Open drain output, connection to Vdd required. External matching is required. GND 12 Ground MXR_RF 13 Mixer RF input, DC blocked. Matched to 50Ω. GND 14 Ground LNA OUT 15 LNA RF Output. DC blocked. Matched to 50Ω. SLEEP 16 Power-Down mode control. For ground pins 1,3,7,8,9,10,12, and 14, TriQuint recommends use of several via holes to the backside ground immediately adjacent to the pin. Package Type: Power QSOP-16 Plastic Package 8 For additional information and latest specifications, see our website: www.triquint.com TQ5622 Data Sheet D NOTE A E E1 b NOTE B c A e DESIGNATION A A1 b c D e E E1 L θ A1 DESCRIPTION OVERALL HEIGHT STANDOFF LEAD WIDTH LEAD THICKNESS PACKAGE LENGTH LEAD PITCH LEAD TIP SPAN PACKAGE WIDTH FOOT LENGTH FOOT ANGLE L ENGLISH 0.064 +/-.005 in 0.007 +/-.003 in 0.010 +/-.002 in 0.085 +/-.015 in 0.193 +/-.004 in 0.025 BSC 0.236 +/-.008 in 0.154 +/-.003 in 0.033 +/-.017 in 4 +/-4 DEG θ METRIC 1.63 +/-.13 mm 0.18 +/-.08 mm 0.25 +/-.05 mm 2.16 +/-.38 mm 4.90 +/-.10 mm 0.635 BSC 5.99 +/-.20 mm 3.91 +/-.08 mm 0.84 +/-.43 mm 4 +/-4 DEG NOTE C C C C A, C C B, C C NOTES: A. The D dimension does not include mold flashing and mismatch. Mold flashing and mismatch shall not exceed .006 in (.15 mm) per side. B. The E1 dimension does not include mold flashing and mismatch. Mold flashing and mismatch shall not exceed .010 in (.25 mm) per side. C. Primary units are English inches. The metric equivalents are subject to rounding error. Additional Information For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Tel: (503) 615-9000 Email: [email protected] Fax: (503) 615-8900 For technical questions and additional information on specific applications: Email: [email protected] The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems. Copyright © 1999 TriQuint Semiconductor, Inc. All rights reserved. Revision A, September 20, 1999 For additional information and latest specifications, see our website: www.triquint.com 9