WIRELESS COMMUNICATIONS DIVISION PCS LNA GND 16 GND VDD PCS MODE CTL 15 14 13 TQ3M31 DATA SHEET 1 12 PCS LNA OUT GND 2 11 GND GND 3 10 GND Cell_LNA input 4 9 Cell LNA OUT PCS_LNA input Dual Band LNA: 2.8V Cellular and PCS Band CDMA/AMPS LNA IC Features 5 6 7 Cell LNA GND GND Vdd Cell Product Description 8 Small size: Leadless 3x3mm Gain CTL Single 2.8V operation The TQ3M31 is a 2.8V, RF dual band LNA IC designed specifically for Cellular &PCS band CDMA/AMPS applications. It’s RF performance meets the requirements of products designed to the IS-95 and AMPS standards. The TQ3M31 is designed to be used with the TQ5131 (Cellular CDMA/AMPS mixer) and the TQ5631 (PCS CDMA mixer) which provides a complete Tri-Mode CDMA receiver for 800MHz dualmode and 1900MHz phones. The LNA incorporates on-chip switches which determine CDMA, AMPS, and bypass mode select. When used with the TQ5131 and TQ5631, four gain states are available in each band. The RF output port is internally matched to 50 Ω, greatly simplifying the design and keeping the number of external components to a minimum. The TQ3M31 achieves good RF performance with low current consumption, supporting long standby times in portable applications. Coupled with the very small MLF 3x3 package, the part is ideally suited for Cellular & PCS band mobile phones. Electrical Specifications1 Noise Figure Input 3rd Order Intercept DC supply Current Gain Select Mode Select High IP3 performance Few external components Applications IS-95 CDMA Mobile Phones AMPS Mobile Phones Parameter Gain Low-current operation Min Typ Max Units Dual Mode CDMA Cellular applications 881MHz 13.0 dB Dual Band CDMA Cellular & PCS 1960MHz 13.5 dB 832-870MHz CDMA applications 881MHz 1.4 dB 1930-1990MHz CDMA applications 1960MHz 1.5 dB 881MHz 12.5 dBm 1960MHz 9.0 dBm 881MHz 10.0 mA 1960MHz 11.0 mA Note 1: Test Conditions: Vdd=2.8V, Tc=25C, CDMA High Gain state. For additional information and latest specifications, see our website: www.triquint.com 1 TQ3M31 Data Sheet Electrical Characteristics Parameter Conditions Min. Typ/Nom Max. Units Cellular LNA: RF Frequency 832 881 894 MHz PCS LNA: RF Frequency 1930 1960 1990 MHz 881MHz 12.0 13.0 dB 1960MHz 12.0 13.5 dB CDMA Mode-High Gain Gain Noise Figure Input IP3 881MHz 1.4 1.8 dB 1960MHz 1.5 2.0 dB 881MHz 10.0 12.5 dBm 1960MHz 8.0 9.0 dBm LNA IN Return Loss (with external matching) All modes, both bands 10 dB LNA OUT Return Loss All modes, both bands 10 dB Supply Current 881MHz 10.0 13.0 mA 1960MHz 11.0 13.0 mA Bypass Mode Gain Noise Figure Input IP3 Supply Current 881MHz -6.0 -5.0 dB 1960MHz -3.5 -2.0 dB 881MHz 5.0 6.0 dB 1960MHz 2.0 3.2 dB 881MHz 18.0 dBm 1960MHz 18.0 dBm 881MHz 1.0 2.0 mA 1960MHz 1.0 2.0 mA 881MHz 11.0 dB 1960MHz 11.5 dB 881MHz 1.6 dB 1960MHz 1.7 dB 881MHz 7.5 dBm 1960MHz 6.0 dBm 881MHz 4.5 mA 1960MHz 4.5 mA High Gain Low Linearity Mode Gain Noise Figure Input IP3 Supply Current Supply Voltage 2.7 Logic low input Logic high input 3.3 V 0 0.25 V Vcc-0.25 Vcc V Note 1: Test Conditions: Vdd=2.8V, TC = 25° C, unless otherwise specified. Note 2: Min/Max limits are at +25°C case temperature, unless otherwise specified. 2 For additional information and latest specifications, see our website: www.triquint.com 2.8 TQ3M31 Data Sheet Absolute Maximum Ratings Parameter Value Units DC Power Supply 5.0 V Power Dissipation 250 mW Operating Temperature -30 to 85 C Storage Temperature -60 to 150 C Signal level on inputs/outputs +20 dBm Voltage to any non supply pin +0.3 V For additional information and latest specifications, see our website: www.triquint.com 3 TQ3M31 Data Sheet Typical Performance Cellular Band Test Conditions, unless Otherwise Specified: Vdd=2.8V, Tc=+25C, RF=881MHz CDMA High Gain Mode Idd v Vdd v Temp 15.00 14.50 14.00 13.50 13.00 12.50 12.00 11.50 11.00 10.50 10.00 12.00 11.50 11.00 Idd (mA) Gain (dB) CDMA High Gain Mode Gain v Freq v Temp -30C +25C +85C 10.50 10.00 9.50 -30C +25C +85C 9.00 8.50 869 875 881 887 2.7 893 2.8 CDMA High Gain Mode IIP3 v Freq v Temp High Gain Low Linearity Mode Gain v Freq v Temp 14.00 12.50 13.50 12.00 13.00 12.50 Gain (dB) IIP3 (dBm) 12.00 11.50 -30C +25C +85C 11.00 10.50 11.50 11.00 10.50 -30C +25C +85C 10.00 9.50 10.00 869 875 881 887 869 893 2.00 1.80 1.60 1.40 1.20 1.00 0.80 0.60 0.40 0.20 0.00 -30C +25C +85C 875 881 881 887 893 High Gain Low Linearity Mode IIP3 v Freq v Temp 887 893 IIP3 (dBm) CDMA High Gain Mode Noise Figure v Freq v Temp 869 875 Frequency (MHz) Frequency (MHz) Noise Figure (dB) 3.15 Voltage (Volts) Frequency (MHz) 9.50 9.00 8.50 8.00 7.50 7.00 6.50 6.00 5.50 5.00 -30C +25C +85C 869 Frequency (MHz) 4 3 For additional information and latest specifications, see our website: www.triquint.com 875 881 887 Frequency (MHz) 893 TQ3M31 Data Sheet High Gain Low Linearity Mode Noise Figure v Freq v Temp Bypass Mode IIP3 v Freq v Temp 37.00 36.00 2.00 35.00 IIP3 (dBm) Noise Figure (dB) 2.50 1.50 1.00 -30C +25C +85C 0.50 33.00 32.00 -30C +25C +85C 31.00 30.00 0.00 869 875 881 887 869 893 881 887 893 Frequency (MHz) High Gain Low Linearity Mode Idd v Vdd v Temp Bypass Mode Noise Figure v Freq v Temp 7.00 4.10 6.00 3.90 3.80 3.70 -30C +25C +85C 3.50 Noise Figure (dB) 4.20 3.60 5.00 4.00 3.00 -30C +25C +85C 2.00 1.00 3.40 0.00 2.7 2.8 3 3.15 869 Voltage (Volts) 875 881 887 893 Frequency (MHz) Bypass Mode Gain v Freq v Temp Bypass Mode Idd v Vdd v Temp 1.60 -3.80 -30C +25C +85C -4.20 -4.40 -4.60 -4.80 1.40 1.20 Idd (mA) -4.00 Gain (dB) 875 Frequency (MHz) 4.00 Idd (mA) 34.00 1.00 0.80 0.60 -5.00 0.40 -5.20 0.20 -5.40 -30C +25C +85C 0.00 869 875 881 887 Frequency (MHz) 893 2.7 2.8 3 Voltage (Volts) For additional information and latest specifications, see our website: www.triquint.com 3.15 5 TQ3M31 Data Sheet Typical Performance PCS Band Test Conditions, unless Otherwise Specified: Vdd=2.8V, Tc=+25C, RF=1960MHz 15.00 14.50 14.00 13.50 13.00 12.50 12.00 11.50 11.00 10.50 10.00 CDMA High Gain Mode Idd v Vdd v Temp 11.50 11.00 Idd (mA) Gain (dB) CDMA High Gain Mode Gain v Freq v Temp -30C +25C +85C 10.50 10.00 9.50 -30C +25C +85C 9.00 8.50 1930 1945 1960 1975 1990 2.7 2.8 Frequency (MHz) High Gain Low Linearity Mode Gain v Freq v Temp 12.00 10.00 11.50 11.00 9.00 Gain (dB) IIP3 (dBm) 9.50 8.50 8.00 -30C +25C +85C 7.50 10.50 10.00 9.50 -30C +25C +85C 9.00 8.50 8.00 7.00 1930 1945 1960 1975 1990 1930 1945 1960 1975 Frequency (MHz) Frequency (MHz) CDMA High Gain Mode Noise Figure v Freq v Temp High Gain Low Linearity Mode IIP3 v Freq v Temp 1990 8.00 2.50 7.50 2.00 IIP3 (dBm) Noise Figure (dB) 3.15 Voltage (Volts) CDMA High Gain Mode IIP3 v Freq v Temp 1.50 1.00 -30C +25C +85C 0.50 1930 1945 1960 1975 7.00 6.50 6.00 -30C +25C +85C 5.50 0.00 1990 5.00 1930 Frequency (MHz) 6 3 For additional information and latest specifications, see our website: www.triquint.com 1945 1960 1975 Frequency (MHz) 1990 TQ3M31 Data Sheet Bypass Mode IIP3 v Freq v Temp High Gain Low Linearity Mode Noise Figure v Freq v Temp 3.00 2.00 IIP3 (dBm) Noise Figure (dB) 2.50 1.50 1.00 -30C +25C +85C 0.50 0.00 1930 1945 1960 1975 Frequency (MHz) 40.00 38.00 36.00 34.00 32.00 30.00 28.00 26.00 24.00 22.00 20.00 -30C +25C +85C 1930 1990 4.00 -30C +25C +85C Noise Figure (dB) Idd (mA) 4.50 2.50 2.7 2.8 3 5.00 4.50 4.00 3.50 3.00 2.50 2.00 1.50 1.00 0.50 0.00 3.15 1930 -30C +25C +85C Idd (mA) Gain (dB) -1.50 -2.00 -2.50 -3.00 -3.50 1945 1960 1975 Frequency (MHz) 1960 1975 1990 Bypass Mode Idd v Vdd v Temp 0.00 1930 1945 Frequency (MHz) Bypass Mode Gain v Freq v Temp -1.00 1990 -30C +25C +85C Voltage (Volts) -0.50 1975 Bypass Mode Noise Figure v Freq v Temp 5.00 3.00 1960 Frequency (MHz) High Gain Low Linearity Mode Idd v Vdd v Temp 3.50 1945 1990 2.00 1.80 1.60 1.40 1.20 1.00 0.80 0.60 0.40 0.20 0.00 -30C +25C +85C 2.7 2.8 3 3.15 Voltage (Volts) For additional information and latest specifications, see our website: www.triquint.com 7 TQ3M31 Data Sheet Application/Test Circuit Vdd_PCS Mode_CTL R2 C8 C5 Lbrd PCS LNA GND L1 PCS_LNA_in Mode Ctl PCS Vdd GND PCS RF in PCS RF out PCS LNA output PCS LNA C1 GND GND GND GND Cell LNA L2 Cell_LNA_in C2 Cell RF in Cell RF out Cell LNA GND Cell Vdd GND Cell LNA output Gain Ctl Lbrd C7 C4 R1 Vdd_Cell Gain_CTL Bill of Material for TQ3M31 LNA Application/Test Circuit Component Reference Designator Part Number Receiver IC U1 TQ3M31 Capacitor C1 1.2pF 0402 Capacitor C2 2.2pF 0402 Capacitor C3, C4, C5, C6 1000pF 0402 Capacitor C7 39pF 0402 Capacitor C8 10pF 0402 Resistor R1, R2 3.3Ω 0402 Inductor L1 4.7nH 0603 Inductor L2 18nH 0603 Inductor Lbrd 8 Value See application note For additional information and latest specifications, see our website: www.triquint.com Size Manufacturer Leadless 3x3mm TriQuint Semiconductor TQ3M31 Data Sheet TQ3M31 Product Description The TQ3M31 LNA uses two cascode low noise amplifiers along with signal path switching. Two bias control circuits set each LNA’s quiescent current for each mode and ensure peak performance over process and temperature, see Figure 1. In the application, a switch control logic linked to the mode control and gain control pins sets the device to the desired mode. See Table 1 for truth table. Each LNA is selected by applying the supply voltage to the Vdd PCS or Cell pin as desired. In the high-gain and high-gain-low-linearity modes, switches S1, S2, S5 (only on high band) and S6 are closed, with switches S3 and S4 opened. In the bypass mode, switches S1, S2, and S5 are opened, with switches S3, S4 and S6 closed. Internal switches ensure there are no parasitic feedback paths for the RF signal. In the AMPS mode, control logic switches the LNA into a low current bias condition. Only four external components are needed for the input and output match of the LNA. The chip uses an external cap and inductor for each LNA input match to pin 1 and 4. The outputs are internally matched to 50 ohms at pin 12 and 9. A Vdd bypass cap is required close to each of the pins 7 and 14. External degeneration of the cascode is required between pin 5&16 and ground. However, a small amount of PC board trace can be used as the inductor. Alternatively, if an extra component can be tolerated, a small value chip inductor could be used. See Figure 2 Vdd_PCS Mode_CTL R2 C8 C5 Lbrd 16 15 13 S5 L1 PCS_LNA_in 14 S3 S4 1 12 PCS LNA output S6 C1 S1 S2 PCS LNA 2 11 Bias Control Switch Control Logic 3 10 Bias Control Cell LNA S1 S2 S6 L2 Cell_LNA_in 4 9 S3 S4 6 7 Cell LNA output C2 5 8 Lbrd C7 R1 Vdd_Cell C4 Gain_CTL Figure 1 TQ3M31 Simplified Schematic For additional information and latest specifications, see our website: www.triquint.com 9 TQ3M31 Data Sheet Operation MODE Gain_Ctl Mode Ctl Cell Vdd PCS Vdd PCS HG PCS HGLL PCS Bypass Cell HG Cell HGLL Cell Bypass 0 0 1 0 0 1 0 1 1 0 1 1 0 0 0 Vdd Vdd Vdd Vdd Vdd Vdd 0 0 0 Typical gain 13.5 (dB) 11.5 (dB) -2 (dB) 13 (dB) 11 (dB) -5 (dB) Table 1 LNA States and Control Bits LNA Input Network Design Input network design for most LNA’s is a straightforward compromise between noise figure and gain. The TQ3M31 is no exception, even though it has 3 different modes. The device was designed so that one only needs to optimize the input match in the high gain mode. As long as the proper grounding and source inductance are used, the other two modes will perform well with the same match. It is probably wise to synthesize the matching network component values for some intermediate range of Gamma values, and then by experimentation, find the one which provides the best compromise between noise figure and gain. The quality of the chip ground will have some effect on the match, which is why some experimentation will likely be needed. The input match will affect the output match to some degree, so S22 should be monitored. The values used on our evaluation board may be taken as a starting point. It has to be noted that another input match network was tested (PCS: 7pF series cap & 2.2nH shunt ind; Cell: 5.6nH series ind & 5.6nH shunt ind) but it proved to degrade the NF and IIP3. Noise Parameter Analysis A noise parameter analysis is shown below for the high gain and HGLL modes. A “nominal” device was mounted directly on a standard evaluation board without matching network (through connected). The input reference plane was set at pin 1 & 4 and board loss was included in the calculations. C7 was set to 39pf and C8 to 18pF. Gamma Opt analysis for TQ3M31 High Gain Mode – PCS band Freq. Γopt Γangle F min R noise Point# 1800 0.38 81.2 1.19 17.4 1 1960 0.33 86.6 1.23 17.0 2 2040 0.33 91.4 1.28 15.9 3 (MHz) 10 For additional information and latest specifications, see our website: www.triquint.com TQ3M31 Data Sheet Gamma Opt analysis for TQ3M31 HGLL Mode – PCS band Γopt Γangle 1800 0.46 77.0 1.61 27.2 1 1960 0.41 83.1 1.69 26.4 2 2040 0.40 86.7 1.75 24.1 3 Freq. F min R noise Point# (MHz) Gamma Opt analysis for TQ3M31 High Gain Mode – Cell band Freq. Γopt Γangle F min R noise Point# 700 0.51 37.4 1.11 26.6 1 880 0.45 40.5 1.04 19.4 2 1000 0.41 41.0 1.15 19.3 3 (MHz) Gamma Opt analysis for TQ3M31 HGLL Mode – Cell band Freq. Γopt Γangle F min R noise Point# 700 0.57 36.9 1.52 43.8 1 880 0.50 40.2 1.40 31.4 2 1000 0.50 43.8 1.47 31.1 3 (MHz) For additional information and latest specifications, see our website: www.triquint.com 11 TQ3M31 Data Sheet Gain Control via Pin 5 & 16 Inductance The source connection of the LNA cascode is brought out separately through pin 5&16. That allows the designer to make some range of gain adjustment. The total amount of inductance present at the source of the cascode is equal to the bond wire plus package plus external inductance. One should generally use an external inductance such that gain in the high gain PCS mode = 13.5dB. Although it is possible to increase the gain of the TQ3M31, 3 effects are to be expected: the NF and IIP3 will be degraded, and the input match may not work for all modes at the same time anymore. The cell band LNA is especially sensitive to this effect. Figure 2 shows how a rectangular PC board trace can be used as the external inductance. It is suggested that such a circuit be used for the initial design prototype. Then the optimum inductance can be found by simply solder bridging across the inductor. The final PC board design can then include the proper-shorted version of the inductor. Figure 2 Showing Lbrd and Grounding on Evaluation Board Selection of the Vdd Bypass Cap for Optimum Performance The Vdd bypass capacitor has the largest effect on the LNA output match, and is required for proper operation. Because the input match affects the output match to some degree as well, the process of picking the bypass cap value involves some iteration. First, an input match is selected which gives adequate gain and noise figure. Then the bypass capacitor is varied to give the best output match. The demo board achieves at least 12dB of return loss for the PCS band, and at least 11.5dB for the Cell band, which is adequate for connection directly to the input of a SAW filter. Grounding An optimal ground for the device is important in order to achieve datasheet specified performance. Symptoms of a poor ground include reduced gain and the inability to achieve <2:1 VSWR at the output when the input is matched. It is recommended to use multiple vias to a mid ground plane layer. The vias at pins 2, 3, 10 and 11 to this layer should be as close to the lead pads as possible. Additionally, the ground return on the Vdd bypass cap should provide minimal inductance back to chip pins 2, 3, 10 and 11. 12 For additional information and latest specifications, see our website: www.triquint.com TQ3M31 Data Sheet TQ3M31 S-Parameters Following are S-Parameter graphs for the HG and HGLL modes in both bands. Data was taken on a single “nominal” device at 2.8v Vdd. The reference planes were set at the end of the package pins. Cell band - High Gain Mode S-parameters For additional information and latest specifications, see our website: www.triquint.com 13 TQ3M31 Data Sheet Cell band - HGLL Mode S-Parameters 14 For additional information and latest specifications, see our website: www.triquint.com TQ3M31 Data Sheet PCS band - High Gain Mode S-parameters For additional information and latest specifications, see our website: www.triquint.com 15 TQ3M31 Data Sheet PCS band - HGLL Mode S-Parameters 16 For additional information and latest specifications, see our website: www.triquint.com TQ3M31 Data Sheet Leadless 3x3 mm Package NOTES 1 ONLY GROUND SIGNAL TRACES ARE ALLOWED DIRECTLY UNDER THE PACKAGE 2 PRIMARY DIMENSIONS ARE IN MILIMETERS ALTERNATE DIMENSIONS ARE IN INCHES LEADLESS 3X3-16 PCB FOOTPRINT 0.13 [0.005] 1.10 [0.043] 0.25 [0.010] 0.55 [0.022] 0.53 [0.021] A 1.10 [0.043] DETAIL A 0.50 [0.020] PITCH 4X SIDES 1.10 [0.043] PACKAGE OUTLINE For additional information and latest specifications, see our website: www.triquint.com 17 TQ3M31 Data Sheet Additional Information For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Tel: (503) 615-9000 Email: [email protected] Fax: (503) 615-8900 For technical questions and additional information on specific applications: Email: [email protected] The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems. Copyright © 1998 TriQuint Semiconductor, Inc. All rights reserved. Revision A, June, 2001 18 For additional information and latest specifications, see our website: www.triquint.com