TRIQUINT TQ5635

TQ5635
WIRELESS COMMUNICATIONS DIVISION
GND/LNA
Gain
GND/LNA
Gain
DATA SHEET
Mixer
Vdd
LNA Out
GND
RF In
3 V PCS LNA/Mixer
Receiver IC
Active
Bias
1
MXR In
LNA
GND
Mixer
Features
LO
Vdd
GND
?? Single 3.0 V Operation
LNA
Bias
active
bias
?? Adjustable Gain/IP3/Current
LO
In
LO Buffer
IF Amp
?? Low Current Operation
?? Few external components
LNA Vdd
GND
IF Out
?? QFN 3x3 mm, 16 Pin Leadless Plastic
Package
GIC
Product Description
?? High Input IP3
The TQ5635 is an LNA-Downconverter optimized for use in the Korea CDMA
PCS bands. The integrated LNA has a single high gain mode that provides over
15 dB of gain, and features very low NF and excellent IP3. An external resistor
controls LNA bias, making LNA Idd adjustable. The integrated mixer features
very high IP3 and provision for external adjustment of gain, IP3, and Idd.
Because of the external LO tuning inductor, IF’s in the range of 85 to 200Mhz
can be used. The excellent RF performance with low current coupled with very
small lead-less plastic package is ideally suited for PCS band mobile phone.
Applications
?? PCS band CDMA mobile Applications
Electrical Specifications 1
Parameter
?? Low Noise Figure
?? Wireless data applications
Min
Typ
Max
Units
RF Frequency
1855
MHz
Conversion Gain
24.5
dB
Noise Figure
2.3
dB
Input 3rd Order Intercept
-4.75
dBm
DC supply Current
23.4
mA
Note 1. Test Conditions:
Vdd=+2.8V, TC=+25C, RF=1855MHz, RF in =-30dBm LO=1635MHz,
LO input=-4dBm, IF=220MHz
2. Data includes image reject filter (Sawtek P/N: 356083) insertion loss of 1.7 dB
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1
TQ5635
Data Sheet
Absolute Maximum Ratings
Parameter
Symbol
Minimum
Nominal
Maximum
Units
Tstore
-40
25
125
deg. C
Tc
-40
25
85
deg. C
VDD
0
2.8
5.0
V
Voltage to any non supply pin
-
-
-
-
VDD+0.5V
Power Dissipation
P
-
-
100
mW
Signal Power
Ps
-
-
20
dBm
Storage Temperature
Case Temperature w/bias
Supply Voltage
Note 1. All voltages are measured with respect to GND (0V), and they are continuous.
2. Absolute maximum ratings as detailed in this table, are ratings beyond which the device’s performance may be impaired and/or permanent damage may occur.
Typical Electrical Characteristics –Korea PCS band, Cascade
Parameter
Conditions
RF Frequency
Min.
1840
IF Frequency
LO input
-7
Supply voltage
Input 3rd Order Intercept1,3,4
21.5
2.
2
-4
1870
MHz
MHz
-1
-6.5
dB
2.8
-4.75
23.4
dBm
V
24.5
2.3
Supply Current2,3
3.
4.
Units
2.8
1,3,4
Noise Figure1,4
Note 1.
Max.
220
level2
Conversion Gain
Typ/Nom
dB
dBm
25.0
mA
Test Conditions (devices screened for Conversion Gain, Noise Figure, and IIP3 to the above limits): Vdd = +2.8V, RF = 1855MHz, LO = 1635MHz, IF =
220MHz, LO input = -4dBm, RF input = -30dBm, TC = +25? C, unless otherwise specified.
Min./Max. limits are at +25? C case tempera ture unless otherwise specified.
Conversion Gain and Idd depends on the values of the two resistors used in the GIC circuit and LNA Bias resistor.
Data includes image reject filter (Sawtek P/N: 356083) insertion loss of 1.7 dB
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TQ5635
Data Sheet
Typical Electrical Characteristics – Korea PCS band, LNA only:
Parameter
Conditions
RF Frequency
Input
1,3
Figure1
3rd
Supply
Order
Typ/Nom
1840
Conversion Gain
Noise
Min.
Intercept1,3
Current3
Max.
Units
1870
MHz
17.5
dB
1.8
dB
1.1
dBm
7.0
mA
Note 1. Test Conditions: Vdd = +2.8V, RF = 1855MHz, LO = 1635MHz, IF = 220MHz, LO input = -4dBm, RF input = -30dBm, TC = +25?C, unless otherwise specified.
2.
3.
Min./Max. limits are at +25? C case temperature unless otherwise specified.
Conversion Gain and Idd depends on the values of the Bias resistor.
Typical Electrical Characteristics – Korea PCS band, Mixer only:
Parameter
Conditions
RF Frequency
Min.
1840
IF Frequency
Conversion Gain
Noise
Input
1,3
Figure1
3rd
Supply
Order
Typ/Nom
Intercept1,3
Current3
Max.
Units
1870
MHz
220
MHz
9.1
dB
8.2
dB
11.6
dBm
16.5
mA
Note 1: Test Condition: Vdd = +2.8V, RF = 1855MHz, LO = 1635MHz, IF = 220MHz, LO input = -4dBm, RF input = -30dBm,TC = +25?C, unless otherwise specified..
2.
3.
4.
Min./Max. limits are at +25? C case temperature unless otherwise specified.
Conversion Gain and Idd depends on the values of the two resistors used in the GIC circuit.
Data includes image reject filter (Sawtek P/N: 356083) insertion loss of 1.7 dB
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3
TQ5635
Data Sheet
Typical Test Circuit for CDMA KPCS:
Test Conditions (Unless Otherwise Specified): Vdd = +2.8V, RF = 1855MHz, LO = 1635MHz, IF = 220MHz, LO input = -4dBm, RF input = -30dBm, TC = +25?C
B+
AUXin
NC
C11
Vdd
F1
Vdd
R8
GND
L1
RF In
MX VD D
RFin
LNA Out
GND
LNA Mode
C6
L4
MXR
In
C7
GND
C8
TQ5635
Vdd
R7
IF Bias
V DD
GND
LNA
Bias
IF Out
C5
LOin
V DD
GND
L2
LO
In
R6
C10
Vdd
R9
C9
TOKO
R12
R16
L3
TOKO
C14
0603
C13
C15
IFout
RL 021401
Bill of Material for TQ5635 LNA/Downconverter Mixer for GIC tuning plots
Component
Reference Designator
Receiver IC
Part Number
Value
TQ5635
Size
Manufacturer
3x3mm
TriQuint Semiconductor
Capacitor
C11, C13
0.1uF
0402
Capacitor
C5
2.2pF
0402
Capacitor
C6
1.0pF
0402
Capacitor
C7
1000pF
0402
Capacitor
C8, C9, C10,C13
1000pF
0402
Capacitor
C14
15pF
0402
Capacitor
C15
12pF
0402
Inductor
L1
3.9nH
0402
Coil Craft
Inductor
L2
5.6nH
0402
TOKO
Inductor
L3
56nH
0603
TOKO
Inductor
L4
3.3nH
0402
TOKO
Resistor
R8, R16
3.3O
0402
Resistor
R6
20O
0402
Resistor
R7
2.7KO
0402
4
* LNA Bias
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TQ5635
Data Sheet
Resistor
R9
Resistor
R12
* GIC
RF Saw Filter
F1
856083
1.8O
0402
39O
0402
2x2mm
SAWTEK
CDMA KPCS Band Typical LNA Performance
Test Conditions (Unless Otherwise Specified): Vdd=+2.8V, Tc=+25C, RF = 1852MHz, LO = 1635MHz, I F = 220MHz
Conversion Gain vs Vdd vs Freq
Conversion Gain vs Vdd vs Temp
19
Conversion Gain (dB)
Conversion Gain (dB)
20
19
18
17
16
-40C
25C
18.5
18
17.5
17
15
2.5
2.7
2.9
3.1
2_7V
3_2V
16.5
85C
3.3
16
1830
3.5
1840
Vdd (V)
Conversion Gain vs Vdd vs Temp
1870
1880
Input IP3 vs Vdd vs Temp
3
19
2
IP3 (dBm)
Conversion Gain (dB)
1860
RF Freq (MHz)
20
18
17
1
0
16
-40C
25C
85C
-40C
15
2.5
2.7
2.9
3.1
3.3
3.5
2.5
Input IP3 vs Temperature vs Freq
85C
2.7
2.9
3.1
Vdd (V)
3.3
3.5
Idd vs Vdd vs Temperature
9
1.5
8
Idd (mA)
2
1
0.5
7
6
-40C
0
1830
25C
-1
Vdd (V)
IP3 (dBm)
1850
2_8V
3V
1840
25C
1850
1860
RF Freq (MHz)
85C
1870
1880
-40C
25C
85C
5
2.5
2.7
2.9
3.1
Vdd (V)
3.3
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3.5
5
TQ5635
Data Sheet
Idd vs Temperature vs Frequency
Noise Figure vs Temp vs Frequency
9
2.5
Noise Figure (dB)
Idd (mA)
8
7
6
-40C
5
1830
1840
25C
1850
1860
2.1
1.7
1.3
0.9
-40C
85C
1870
1880
0.5
1830
1840
1850
Noise Figure vs Vdd vs Temp
2.5
Noise Figure (dB)
2.1
1.7
1.3
0.9
25C
85C
0.5
2.5
2.7
2.9
3.1
3.3
3.5
Vdd (V)
6
1860
RF Freq (MHz)
RF Freq (MHz)
-40C
25C
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85C
1870
1880
TQ5635
Data Sheet
CDMA KPCS Band Typical Mixer Performance
Test Conditions (Unless Otherwise Specified): Vdd=+2.8V, Tc=+25C, RF = 1852MHz, LO = 1635MHz, I F = 220MHz, LO input = 4dBm
Gain vs Vdd vs Frequency
13
11
12
10.5
Conversion Gain (dB)
Conversion Gain (dB)
Gain vs Vdd vs Temperature
11
10
9
8
-40C
25C
85C
7
2.5
2.7
2.9
3.1
3.3
3.5
10
9.5
9
8.5
8
1830
3.7
Vdd (V)
1840
1850
2_8V
3V
1860
1870
1880
RF Freq (MHz)
Conversion Gain vs LO vs Freq
Gain vs Temperature vs Frequency
13
10
Conversion Gain (dB)
Conversion Gain (dB)
2_7V
3_5V
12
11
10
9
8
-40C
7
1830
1840
25C
1850
1860
85C
1870
9.5
9
8.5
-1dBm
8
1830
1880
1840
-4dBm
1850
1860
-7dBm
1870
1880
RF Freq (MHz)
RF Freq (MHz)
Input IP3 vs Temp vs Frequency
Input IP3 vs Vdd vs Temperature
14
14
13
13
IP3 (dBm)
IP3 (dBm)
12
12
11
10
11
10
9
9
-40C
25C
85C
8
2.5
2.7
2.9
3.1
3.3
Vdd (V)
3.5
3.7
8
7
1830
-40C
1840
1850
25C
1860
85C
1870
1880
RF Freq (MHz)
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7
TQ5635
Data Sheet
Idd vs Vdd vs Temperature
22
11.9
20
Idd (mA)
IP3 (dBm)
Input IP3 vs LO Drive vs Frequency
12.3
11.5
11.1
18
16
14
10.7
-1dBm
10.3
1830
-4dBm
-40C
-7dBm
1840
1850
1860
1870
2.5
1880
2.7
2.9
Idd vs Temperature vs Frequency
3.3
3.5
3.7
10
9
Noise Figure (dB)
18
Idd (mA)
3.1
Noise Figure vs Vdd vs Temp
19
17
16
15
8
7
6
-40C
5
-40C
14
1830
25C
85C
4
1840
1850
1860
1870
1880
2.5
2.7
2.9
Noise Figure vs Temp vs Frequency
9
7
5
-40C
1840
1850
25C
1860
3.1
Vdd (V)
11
3
1830
25C
85C
RF Freq (MHz)
Noise Figure (dB)
85C
Vdd (V)
RF Freq (MHz)
85C
1870
1880
RF Freq (MHz)
8
25C
12
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3.3
3.5
3.7
TQ5635
Data Sheet
CDMA KPCS Band Typical Cascade Performance
Test Conditions (Unless Otherwise Specified): Vdd=+2.8V, Tc=+25C, RF = 1852MHz, LO = 1635MHz, I F = 220MHz, LO input = -4dBm
Gain vs LO vs Frequency
Gain vs Vdd vs Temperature
28
Conversion Gain (dB)
Conversion Gain (dB)
28
26
26
24
24
22
22
-40C
25C
-1dBm
85C
20
1830
20
2.5
2.7
2.9
3.1
Vdd (V)
3.3
1840
-4dBm
1850
1860
RF Freq (MHz)
3.5
-7dBm
1870
1880
IIP3 vs Vdd Vs Frequency
Gain vs Vdd vs Frequency
-3
29
IIP3 (dBm)
Conversion Gain (dB)
-4
27
25
-5
-6
2_7
3
23
2_7V
3_2V
21
1830
1840
1850
2_8V
3V
1860
RF Freq(MHz)
-7
1830
1870
1840
1850
2_8
3_2
1860
1870
1880
Frequency (MHz)
1880
IP3 vs Vdd vs Temperature
Gain vs Temperature vs Frequency
-2
-3
27
IP3 (dBm)
Conversion Gain (dB)
29
25
-4
-5
-6
23
-7
-40C
21
-40C
19
1830
1840
1850
25C
1860
85C
1870
1880
25C
85C
-8
2.5
2.7
2.9
3.1
3.3
3.5
Vdd (V)
RF Freq (MHz)
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9
TQ5635
Data Sheet
IP3 vs Temperature vs Freq
Noise Figure vs Vdd vs Temp
0
Noise Figure (dB)
5
IP3 (dBm)
-2
-4
-6
-8
-40C
-10
1830
25C
4
3
2
1
-40C
85C
1850
1860
1870
2.5
1880
2.7
2.9
-4
4
Noise Figure (dB)
-3
IP3 (dBm)
-5
-6
-7
1840
-4dBm
1850
1860
3.5
3
2
1
-7dBm
1870
3.3
Noise Figure vs Temp vs Freq
5
-1dBm
3.1
Vdd (V)
IP3 vs LO Drive vs Frequency
-9
1830
85C
0
1840
RF Freq (MHz)
-8
25C
-40C
0
1830
1880
1840
25C
1850
RF Freq (MHz)
1860
85C
1870
1880
RF Freq (MHz)
Idd vs Vdd vs Temperature
Noise Figure vs LO vs Frequency
28
2.6
26
2.4
Idd (mA)
Noise Figure (dB)
2.5
2.3
24
22
2.2
20
2.1
-1
2
1830
-4
-40C
85C
18
1840
1850
1860
1870
1880
2.5
2.7
Frequency (MHz)
10
25C
-7
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2.9
3.1
Vdd (V)
3.3
3.5
TQ5635
Data Sheet
Idd vs Temperature vs Frequency
26
25
Idd (mA)
24
23
22
21
20
1830
-40C
1840
1850
25C
1860
85C
1870
1880
RF Freq (MHz)
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11
TQ5635
Data Sheet
The IF signal from the mixer is fed to an amplifier. The IF
Pinout Description:
amplifier is an open drain type with output at Pin 7. An
The TQ5635 is a complete front-end for a Korea high
band CDMA handset receiver. It combines a high IP3
low noise amplifier, a high intercept mixer, and an IF
amplifier.
The LNA uses an off-chip matching network which connects to
the input at pin 2. The amplifier was designed so that the
match for maximum gain also gives very low noise figure.
The LNA has a single high gain mode that typically provides
15-16dB of gain.
The LNA also provides several ways of setting gain and
external matching circuit is required to match the IF output to
a filter. The IF amplifier also has a GIC pin (Gain-InterceptCurrent). It is used to set the DC current and gain of the IF
stage.
Application Information:
Half IF Spur Rejection Considerations:
The TQ5635 has a single ended mixer so Half-IF spur
rejection is set by the image filter. Thus we do not
intercept in the design phase. The LNA FET source is
recommend using an IF that is less than 2.5 times the image
brought out to Pins 15 and 16, where a small value of
filter.
inductance to ground can be added. The inductor can be
Grounding:
discrete or simply a small length of pc board trace. Several
With good layout techniques there should not be any stability
dB of adjustment is possible. For most applications,
maximum gain will be desired. In that case, pins 15 and 16
problems. Poor circuit board design can result in a circuit that
should be connected to ground with multiple vias. A bias
oscillates. Good grounding is especially important for the
resistor on pin 4 is used to set the LNA supply current. A
nominal value of 2.7kohm is recommended.
provides one more potential ground loop path. One could
The LNA output signal is at Pin 14. It is a 50 ohm line and can
be connected directly to a SAW image filter. The image filter
TQ5635 since it uses an outboard LO tuning inductor that
use the evaluation board as an example of proper layout
techniques.
output connects to the mixer input at Pin 12. The mixer
It is important to position the LO tuning, GIC, and IF matching
receives its LO via a buffer which amplifies the signal from Pin
components as close to the chip as possible. If the
9. The buffer transistor drain comes out of Pin 10 where it
components are far enough away they and their
connects to an external LO tuning inductor.
corresponding pc board traces can act as quarter wave
resonators in the 5-10Ghz region. If both the IF and the LO
GND/LNA
Gain
GND/LNA
Gain
Mixer
Vdd
LNA Out
paths to ground resonate at the same frequency, oscillation
can result.
Active
Bias
1
GND
RF In
It is most important that the ground on the GIC bypass cap,
MXR In
LNA
GND
the ground on the LO tuning bypass capacitor, and the IF
shunt cap ground return back to the chip grounds with minimal
inductance (Figure 2).
Mixer
LO
Vdd
GND
Also, improving the ground at the LO tuning inductor bypass
cap will increase circuit Q. Thus mixer drive is improved with
LNA
Bias
active
bias
LO Buffer
IF Amp
LO
In
a resultant higher IP3. Improved ground here means minimal
inductance between the chip ground pins and the other
LNA Vdd
GND
IF Out
GIC
Figure 1. TQ5635 Block diagram
ground return points. Although it is not a stability issue,
proper grounding of pins 15 and 16 is necessary for maximum
LNA gain. Multiple vias to ground should be placed very close
to those pins.
12
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TQ5635
Data Sheet
Use multiple ground vias for
maximum LNA gain
Figure 3 shows a much simplified block diagram of the LNA,
GND
RF In
TQ5635
MXR
In
quiescent current in the IF amplifier is set by the GIC network.
GND
Both the filter and the mixer terminate the RF signal with
VDD
IF Bias
IF Out
GND
VDD
GND
LNA
Bias
LNA, passes through the image filter, and is converted down
to the IF where it is amplified by the IF output FET. The
VDD
GND
LNA Out
GND
image filter, and mixer. The RF signal is amplified by the
50ohms.
LO
In
Vdd
However, the situation is much different with the LO signal. At
the LO frequency the image filter looks like a short circuit.
Vdd
Minimize These
Lengths
IFout
Some LO energy leaks out of the mixer input, bounces back
off of the image filter and returns back into the mixer with
some phase or delay. The delayed LO signal mixes with the
normal LO to create a DC offset in the passive FET. A DC
Figure 2. Critical signal Paths
blocking capacitor prevents the offset voltage from affecting IF
stage current.
It has been found empirically that varying the delay between
the filter and mixer can have positive or negative
Mixer – Filter Interaction:
consequences on IP3, CG, and NF. It is for this reason that
Before attempting a new TQ5635 application, it is important to
understand the nonlinear interaction between the image filter
an LC network is useful between the SAW and mixer input,
and the mixer subcircuit. The device IP3 is a strong function
the RF frequency without any external components.
even though the mixer input can have an adequate match at
of this interaction. For this reason it is helpful to consider the
filter and mixer as one nonlinear block.
25-100 ohms at RFshort circuit at LO
LNA Portion
of TQ5635
LO Leakage
LNA Out
RF in
Mixer Portion
of TQ5635
IF Output
FET
Mixer
IF Output
Blocking Cap
12
2
14
7
Idd
Mixer in
band pass
IF + DC
Offset
LO Leakage ??????
LO
IF
to GIC
9
8
(LO Leakage ?????+ LO) = DC Offset
at Mixer IF Output
Figure 3. Non-linear filter-Mixer Interaction
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13
TQ5635
Data Sheet
LNA S-Parameters :
S-Parameters for the TQ5635 LNA taken in the high mode. We have not included noise parameters since for this device Gamma-Opt
is very close to the conjugate match.
14
Figure 4: LNA S11
Figure 6: LNA S21
Figure 5: LNA S12
Figure 7: LNA S22
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TQ5635
Data Sheet
SUGGESTED STEPS FOR TQ5635 TUNING:
The following order of steps is recommended for applying the
1. Determine LNA Bias Resistor Value and Source Inductor
Value
TQ5635. They are described in detail in the following sections:
For most designs we recommend an LNA bias resistor of 2.7K
Lay out board consistent with the grounding guidelines at the
ohms. All of the datasheet specs assume that value of resistor.
However, if LNA Idd < 7.5 mA is desired, then the resistor can
beginning of this note. See section 1 regarding LNA source
inductor.
be made larger. Refer to Figure 8 for graphs of LNA
performance vs. bias resistor.
1. Determine the LNA bias resistor value and source inductor
value
Please keep in mind that there are implications of reduced LNA
bias that are not reflected in IP3. For example, the LNA is
2. Determine the LNA input matching network component
values. Test the LNA by itself.
3. For the mixer, experimentally determine proper LO tuning
normally in front of the image filter so that it may need
resistance to blocking or other types of distortion that are not
adequately described by the IP3 figure of merit.
components. This step needs to be done first since all of the
later tuning is affected by it.
5635 LNA
NF, Gain, IIP3 and Idd vs bias
resistor
4. Determine a tentative GIC network. It will have to be finetuned later, since the image filter interaction will affect device
current.
dB
5. Synthesize a tentative IF output match. It may have to be
fine-tuned later, as the final GIC configuration affects IF stage
current. LO is turned ON.
Idd (mA)
12
18
16
11
14
10
12
NF
Gain
IIP3
Idd
9
6. Experimentally determine a tentative mixer RF Input match.
10
8
LO is turned ON. Test the filter-mixer cascade. Verify that
8
7
the device has adequate IP3. If not, another RF Input
6
6
matching topology can be tried.
4
5
2
4
7. Fine tune GIC components for needed Idd. LO is turned ON.
0
3
1.1
8. Check IF match to see if it still is adequate. LO is turned ON.
1.5
2.2
2.7
3.3
4.7
6.8
8.2
10
Bias resistor (kOhms)
9. Test the device as a whole - LNA, filter, mixer
Figure 8: Gain, IIP3, Idd, and NF as a Function of Rbias
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15
TQ5635
Data Sheet
For most applications needing maximum LNA gain, it
component values on the evaluation board can be
will probably be sufficient to simply ground pins 15
used for a starting point. Alternately, a network can
and 16 as shown in the second diagram in Figure 9.
be synthesized from the S-parameter values at the
However, in some cases a small amount of
inductance may be needed from pins 15 and 16 to
end of this note.
ground in order to lower the LNA gain. Because of
stray inductance on the application board layout, it is
3. LO Buffer Tuning
difficult to give a precise value of L as a function of
The drain of the LO buffer is brought out to pin 10
gain reduction. The first diagram in Figure 9
where it is fed DC bias via an inductor. The inductor
illustrates one way of doing this. A short is placed
resonates with the internal and external parasitic
across the inductor until the needed gain is arrived at.
capacitance associated with that pin. For maximum
performance the resonance must be at or near the
desired LO frequency. Figure 10 shows a properly
2. Determine the LNA Matching Network
performance versus frequency. We have also found
adjustment to the L and C values may be needed for
empirically that tuning the LO slightly higher in
optimum noise figure. If the design uses 5-8mil
frequency results in much better LO input and RF
dielectric FR4 board, then it is likely that the
input matches.
VDD
IF Bias
IF Out
VDD
LNA
Bias
GND
GND
LO
In
For Lower Gain: add a
small inductance to pins
15 and 16
GND
RF In
TQ5635
GND
VDD
GND
LNA
Bias
LO
In
Recommended: Ground
pins 15 and 16 for
maximum gain
Figure 9: LNA Source Inductor Realization
16
MXR
In
IF Bias
GND
IF Out
TQ5635
GND
GND
RF In
MXR
In
VDD
GND
V DD
once a match to 50ohms is attained, only a slight
LNA Out
side of the slope. Thus there is less change in
GND
that the desired band is on the lower, more gradual
match is very close to the conjugate match. Thus
V DD
TQ5635 LNA was designed so that the optimum noise
LNA Out
that the LO is tuned slightly higher in frequency, so
GND
simpler than designing with discrete transistors. The
GND
Matching network design for the TQ5635 LNA is much
tuned LO buffer. Notice that the LO frequency range
of interest is to the left of the peak. We recommend
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TQ5635
Data Sheet
Figure 10: Suggested LO Tuning Response
A first approximation to the needed inductor can be found by
Figure 11 shows the recommended test setup for tuning the
the following equation:
TQ5635 LO buffer. A network analyzer is set to the center of
the LO band +/- 300Mhz, with an output power of –4dBm. It is
1
L = ---------------- - 1nH
important to set the frequency range to be quite a bit wider
where C=1.5pF
than the LO band, so that the shape of the tuning curve can
be seen. A two port calibration is performed and the analyzer
C (2*pi*F)2
It is likely that when the design is prototyped, the needed
inductance will fall between two standard inductor values. It is
advised to use a slightly larger inductor and then use the
bypass capacitor for fine tuning. When using this method it is
important to isolate the tuning inductor/bypass cap node from
the Vdd bus, since loading on the bus can affect tuning. A
is set to monitor S21. Port 1 of the analyzer is connected to
the LO port of the TQ5635, while Port 2 is connected via cable
to a short length of semi- rigid coaxial probe. The center of the
probe should protrude 1 to 2 mm beyond the ground shield.
The end of the probe with the exposed center conductor is
held close to the LO tuning inductor.
resistor of 3.3ohm to 20ohm has been found to work well for
this purpose (R2).
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17
TQ5635
Data Sheet
RF In
inductance back to the die. Furthermore, although some
COAXIAL
PROBE
V DD
GND
GND
LNA Out
GND
since there is always some package and bond wire
additional IP3 performance may be gained by increasing the
VDD
MXR
In
quiescent current, in practice it makes no sense to increase
Idd beyond that which provides maximum input intercept. At
GND
TQ5635
VDD
IF Bias
IF Out
V DD
LNA
Bias
GND
GND
LO
In
some point IP3 is limited by the mixer FET, and no further
increase in input intercept can be obtained by adjusting the IF
stage.
LO IN
There are two GIC schemes that are recommended for the
PORT 1
TQ5635 (Figure 12). The first uses a small resistor (1.0 to 5
MEASURE S21
ohms) in series with a bypass capacitor to set the AC gain.
NETWORK
ANALYZER
The IF stage current is then set by the larger resistor (40 to 80
ohms) that connects directly from the GIC pin to ground. The
small degeneration resistor lowers the IF stage gain.
Figure 11: LO Tuning Test Setup
The second scheme, which is recommended for maximum
gain, uses a resistor in parallel with capacitor. The resistor
sets the DC current, while the capacitor bypasses it at the IF
4. GIC Network Design
frequency. For highest gain, place the capacitor as close to
The GIC pin on the TQ5635 is connected internally to the
Pin 7 as possible. Try to avoid capacitors which are self-
source of the IF output stage. By adding one or two resistors
resonant at the IF frequency.
and a capacitor to this pin, it is possible to vary both the IF
stage AC gain, and the IF stage quiescent current. However,
Here is an approximate equation for Rgic as a function of IF
there is a limit to the amo unt of gain increase that is possible,
GIC PIN
stage Idd:
Chip
GND
Rgic ~ 0.6 / IDD_IF
GIC PIN
0 to 5 ohms
40 to 80 ohms
AC degen
40 to 80 ohms
sets IF
current
sets IF
current
Zc bypass
at IF Freq
Figure 12: GIC Pin Networks
18
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Chip
GND
Zc bypass
at IF Freq
TQ5635
Data Sheet
circuit topology must contain either a RF choke or shunt
dB
5635 Mixer
NF, Gain, IIP3 and Idd vs GIC resistor
inductor.
Idd (mA)
16
12
NF
Gain
11
IIP3
14
Idd
10
For purposes of 50 ohm evaluation, the shunt L, series C,
shunt C circuit shown in Figure 14 is the simplest and requires
the fewest components. DC current can be easily injected
through the shunt inductor and the series C provides a DC
block, if needed. The shunt C, in particular can be used to
9
12
improve the return loss and to reduce the LO leakage. The
circuit is used on our evaluation board.
8
10
7
For matching into a filter, the circuit of Figure 15 works well.
The network provides the needed impedance transformation
6
47
56
68
82
100
8
110
GIC resistor (kOhms)
Figure 13: Mixer Performance as a Function of Rgic
with a lower loaded Q using reasonable inductor values.
Thus matching circuit loss is minimized. The ratio between
(L1+L2) and L2 is proportional to the square root of the
impedances to be matched, Z1 and Z2. The sum of L1 and
L2 must be chosen so that the total inductance resonates with
the SAW input capacitance. If this resonant frequency is
5. IF Match Design
much higher than the IF frequency, then Copt can be added to
The Mixer IF output (Pin 7) is an "open-drain" configuration,
lower it. Please note that because of parasitic capacitance
allowing for flexibility in efficient matching to various filter
and the discrete values of commercial inductors, the formulas
types and at various IF frequencies. An optimum lumped-
of Figure 15 only serve as a starting point for experimentation.
element-matching network must be designed for maximum
In order to minimize loss, any inductors used should have high
Q. Typically 0805 size inductors perform better than the 0603
TQ5635 conversion gain and minimum matching network loss.
When designing the IF output matching circuit, one has to
consider the output impedance, which will vary somewhat
depending on the quiescent current and the LO drive. The IF
frequency can be tuned from 45 to 400 MHz by varying
component values of the IF output matching circuit. The IF
output pin also provides the DC bias for the output FET.
In the user's application, the IF output is most commonly
connected to a narrow band SAW or crystal filter with
size. If 0603 inductors must be used for space
considerations, make certain to use High-Q types. It is
possible to introduce 3dB of additional loss by using low Q
inductors. Additionally, it is recommended to place the IF filter
very close to the TQ5635. If the two are far apart a
transmission line will be needed between them. In that case
two matching networks will be needed, one to match down to
50ohms and one to match back up to 1000ohms. Twice the
loss can be expected for such a scheme.
impedance from 500 -1000? with 1 - 2 pF of capacitance. A
conjugate match to a higher filter impedance is generally less
sensitive than matching to 50? . When verifying or adjusting
the matching circuit on the prototype circuit board, the LO
drive should be injected at the nominal power level (-4 dBm),
since the LO level does have an impact on the IF port
impedance.
There are several networks that can be used to properly
match the IF port to the SAW or crystal IF filter. The IF FET
bias is applied through the IF output Pin 7, so the matching
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19
TQ5635
Data Sheet
6. Mixer RF Input Matching Network:
Vdd
Although the TQ5635 can present <2:1 SWR to the SAW filter
bypass
without a matching circuit, it is still recommended to use an
inter-stage network. We have found that the Mixer-Filter
interaction discussed earlier can result in degraded OIP3 at
L
higher LO power levels with no network. Probably more time
Cseries
50 will be needed for this phase of the design than for any other,
ohms since it involves a process of trial- and-error.
IF
OUT
For example, the evaluation board network was chosen after
Cshunt
trying all three of the types of Figure 16. For each type, there
was found component L and C values which gave >10dB
return loss at the RF frequency (LO is turned on for this
testing). Then a SAW filter was added in cascade and IP3
was tested. The circuit of Figure 12-C was found to have
Figure 14: IF Output Match to 50 ohms
superior IP3.
The final test of the filter-network-mixer cascade is to connect
a network analyzer at the SAW input and measure S11 with
the mixer turned on. A 2:1 or better SWR should be seen in
the RF pass band of the SAW. At that point, the filter-
Vdd
network-cascade is ready to be tested with the LNA.
bypass
RF In
14
2
L2
Z2
IF
OUT
TQ5635
Mixer
A
12
TQ5635
Mixer
B
12
TQ5635
Mixer
C
SAW
IF
SAW
L1
Z1
12
Csaw
TQ5635
LNA
balanced
IF Out
Copt
RF In
14
2
SAW
L1 ? L 2
Z2
? L2
Z1
TQ5635
LNA
1
? CSAW
4? FIF (L1 ? L 2)
2
2
RF In
Z2
14
2
SAW
L1
Z1
Csaw
Equivalent
Circuit
L2
TQ5635
LNA
Figure 16: SAW -Mixer Input Networks
Figure 15: IF Match to a SAW Filter
20
For additional information and latest specifications, see our website: www.triquint.com
TQ5635
Data Sheet
7. Redo GIC Components:
A match to a 1000ohm filter will not be as sensitive. The LO
After obtaining the optimum network between the SAW and
must be turned ON during the test.
Mixer RF input, most likely Idd will have changed slightly.
Determine a new GIC resistor to bring Idd to the desired
value.
9. Test the TQ5635 Cascade:
Finally after the LNA and Mixer are properly tuned the device
performance as a whole should be measured.
8.
Double Check IF Match
After any change which affects IF stage current it is importa nt
to recheck the IF output match. This is especially true when
matching down to 50ohms, since the match is more sensitive.
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21
TQ5635
Data Sheet
Package Pinout:
GND/LNA
Gain
GND/LNA
Gain
Mixer
Vdd
LNA Out
Active
Bias
1
GND
RF In
MXR In
LNA
GND
Mixer
LO
Vdd
GND
LNA
Bias
active
bias
LNA Vdd
LO Buffer
IF Amp
GND
IF Out
LO
In
GIC
Pin Descriptions:
Pin #
Pin Name
1
GND
Description and Usage
2
LNA IN
3
GND
4
LNA BIAS
An external resistor is connected between this pin and Vdd in order to set the LNA bias current. A value of
~ 2.5 KOhm will give an LNA IDD of ~ 7 mA.
5
LNA VDD
LNA supply voltage. An external decoupling/bypass network should be used.
6
GND
7
IF OUT
Mixer IF output (~ 500 Ohm, open drain). Connection to Vdd required. External matching required.
8
IF BIAS
IF amp FET source. An RF by -passed resistor is placed form this pin to ground in order to set the current in
Ground connection. Connect as closely as possible to ground or to package paddle ground.
LNA RF input (DC blocked internally). An external match is required which can be chosen for a gain/NF
trade-off.
Ground connection. Connect as closely as possible to ground or to package paddle ground.
Ground connection. Connect as closely as possible to ground or to package paddle ground.
this stage.
9
LO IN
Mixer LO input (DC blocked internally). Internally matched to ~ 50 Ohms.
10
LO TUNE
11
GND
12
MXR IN
Mixer RF input (DC blocked internally). An external matching network is recommended to optimized
cascaded IIP3
13
MXR Vdd
Supply voltage for the internal bias circuit that sets IF amp current (in conjunction with the external IF BIAS
resistor).
14
LNA OUT
LNA RF output. It is DC blocked and internally matched to better than 2:1.
15, 16
LNA SOURCE
Paddle
GND
Mixer LO buffer supply voltage. An external bypass capacitor required. An external series inductor is
required for peaking LO gain.
Ground connection. Connect as closely as possible to ground or to package paddle ground.
The source node of the cascade LNA section. A hard ground provides maximum gain and minimum IIP3. A
small amount of external inductance will reduce gain and improve IIP3.
Ground connection. It is very important to place multiple via holes under the paddle. Provides RF
grounding for the part.
22
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TQ5635
Data Sheet
Recommended PC board Layout to Accept 16 Pin Lead-less Plastic Package:
0.13 [0.005]
1.10 [0.043]
0.25 [0.010]
0.55 [0.022]
A
0.53 [0.021]
1.10 [0.043]
DETAIL A
0.50 [0.020] PITCH 4X SIDES
1.10 [0.043]
PACKAGE OUTLINE
LEADLESS 3x3-16 PCB FOOTPRINT
NOTES:
1. ONLY GROUND SIGNAL TRACES ARE ALLOWED DIRECTLY UNDER THE PACKAGE.
2. PRIMARY DIMENSIONS ARE IN MILLIMETERS, ALTERNATE DIMENSIONS ARE IN INCHES.
23
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23
TQ5635
Data Sheet
Package Type: QFN 3x3-16 Lead-less Plastic Package
D
D2
PIN 1
PIN 1
L
E
E2
LASER
MARK
PIN 1 ID
e
A
b
JEDEC DESIGNATION
A
b
D
D2
e
E
E2
L
DESCRIPTION
OVERALL HEIGHT
TERMINAL WIDTH
PACKAGE LENGTH
EXOPSED PAD LENGTH
TERMINAL PITCH
PACKAGE WIDTH
EXPOSED PAD WIDTH
TERMINAL LENGTH
METRIC
0.90 +/-.10 mm
.250 +/-.025 mm
3.00 mm BSC
1.80 +/-.15 mm
.50 mm BSC
3.00 mm BSC
1.80 +/-.05 mm
.40 +/-.05 mm
ENGLISH
.035 +/-.004 in
.010 +/-.001 in
.118 in
.071 +/-.006 in
.020 in
.118 in
.071 +/-.002 in
.016 +/-.002 in
Notes
1
1
1
1
1
1
1
1
Notes:
1. Primary dimensions are in metric millimeters. The English equivalents are calculated and subject to rounding error.
Additional Information
Additional Information
For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint:
Web: www.triquint.com
Tel: (503) 615-9000
Email: [email protected]
Fax: (503) 615-8902
For technical questions and additional information on specific applications:
Email: [email protected]
The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of
this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or
licenses to any of the circuits described herein are implied or granted to any third party.
TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems.
Copyright © 2001 TriQuint Semiconductor, Inc. All rights reserved.
Revision A, February 22, 2001
24
For additional information and latest specifications, see our website: www.triquint.com
TQ5635
Data Sheet
For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint:
Web: www.triquint.com
Email: [email protected]
Tel: (503) 615-9000
Fax: (503) 615-8902
For technical questions and additional information on specific applications:
Email: [email protected]
The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of
this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or
licenses to any of the circuits described herein are implied or granted to any third party.
TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems.
Copyright © 2001 TriQuint Semiconductor, Inc. All rights reserved.
25
For additional information and latest specifications, see our website: www.triquint.com
25